12a81fa3bSSukadev Bhattiprolu[
2835e5bd9SJames Clark  {
32a81fa3bSSukadev Bhattiprolu    "EventCode": "0x1f05e",
42a81fa3bSSukadev Bhattiprolu    "EventName": "PM_1LPAR_CYC",
52a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Number of cycles in single lpar mode. All threads in the core are assigned to the same lpar",
62a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
72a81fa3bSSukadev Bhattiprolu  },
8835e5bd9SJames Clark  {
92a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2006e",
102a81fa3bSSukadev Bhattiprolu    "EventName": "PM_2LPAR_CYC",
112a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Cycles in 2-lpar mode. Threads 0-3 belong to Lpar0 and threads 4-7 belong to Lpar1",
122a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Number of cycles in 2 lpar mode"
132a81fa3bSSukadev Bhattiprolu  },
14835e5bd9SJames Clark  {
152a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4e05e",
162a81fa3bSSukadev Bhattiprolu    "EventName": "PM_4LPAR_CYC",
172a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Number of cycles in 4 LPAR mode. Threads 0-1 belong to lpar0, threads 2-3 belong to lpar1, threads 4-5 belong to lpar2, and threads 6-7 belong to lpar3",
182a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
192a81fa3bSSukadev Bhattiprolu  },
20835e5bd9SJames Clark  {
212a81fa3bSSukadev Bhattiprolu    "EventCode": "0x610050",
222a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ALL_CHIP_PUMP_CPRED",
232a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Initial and Final Pump Scope was chip pump (prediction=correct) for all data types (demand load,data prefetch,inst prefetch,inst fetch,xlate)",
242a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was chip pump (prediction=correct) for all data types ( demand load,data,inst prefetch,inst fetch,xlate (I or d)"
252a81fa3bSSukadev Bhattiprolu  },
26835e5bd9SJames Clark  {
272a81fa3bSSukadev Bhattiprolu    "EventCode": "0x520050",
282a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ALL_GRP_PUMP_CPRED",
292a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Initial and Final Pump Scope and data sourced across this scope was group pump for all data types (demand load,data prefetch,inst prefetch,inst fetch,xlate)",
302a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was group pump for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)"
312a81fa3bSSukadev Bhattiprolu  },
32835e5bd9SJames Clark  {
332a81fa3bSSukadev Bhattiprolu    "EventCode": "0x620052",
342a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ALL_GRP_PUMP_MPRED",
352a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Final Pump Scope (Group) ended up either larger or smaller than Initial Pump Scope for all data types (demand load,data prefetch,inst prefetch,inst fetch,xlate)",
362a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope OR Final Pump Scope(Group) got data from source that was at smaller scope(Chip) Final pump was group pump and initial pump was chip or final and initial pump was gro"
372a81fa3bSSukadev Bhattiprolu  },
38835e5bd9SJames Clark  {
392a81fa3bSSukadev Bhattiprolu    "EventCode": "0x610052",
402a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ALL_GRP_PUMP_MPRED_RTY",
412a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for all data types (demand load,data prefetch,inst prefetch,inst fetch,xlate)",
422a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope (Chip) Final pump was group pump and initial pump was chip pumpfor all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)"
432a81fa3bSSukadev Bhattiprolu  },
44835e5bd9SJames Clark  {
452a81fa3bSSukadev Bhattiprolu    "EventCode": "0x610054",
462a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ALL_PUMP_CPRED",
472a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Pump prediction correct. Counts across all types of pumps for all data types (demand load,data prefetch,inst prefetch,inst fetch,xlate)",
482a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Pump prediction correct. Counts across all types of pumpsfor all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)"
492a81fa3bSSukadev Bhattiprolu  },
50835e5bd9SJames Clark  {
512a81fa3bSSukadev Bhattiprolu    "EventCode": "0x640052",
522a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ALL_PUMP_MPRED",
532a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Pump misprediction. Counts across all types of pumps for all data types (demand load,data prefetch,inst prefetch,inst fetch,xlate)",
542a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Pump Mis prediction Counts across all types of pumpsfor all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)"
552a81fa3bSSukadev Bhattiprolu  },
56835e5bd9SJames Clark  {
572a81fa3bSSukadev Bhattiprolu    "EventCode": "0x630050",
582a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ALL_SYS_PUMP_CPRED",
592a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Initial and Final Pump Scope was system pump for all data types (demand load,data prefetch,inst prefetch,inst fetch,xlate)",
602a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was system pump for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)"
612a81fa3bSSukadev Bhattiprolu  },
62835e5bd9SJames Clark  {
632a81fa3bSSukadev Bhattiprolu    "EventCode": "0x630052",
642a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ALL_SYS_PUMP_MPRED",
652a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Final Pump Scope (system) mispredicted. Either the original scope was too small (Chip/Group) or the original scope was System and it should have been smaller. Counts for all data types (demand load,data prefetch,inst prefetch,inst fetch,xlate)",
662a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope(Chip/Group) OR Final Pump Scope(system) got data from source that was at smaller scope(Chip/group) Final pump was system pump and initial pump was chip or group or"
672a81fa3bSSukadev Bhattiprolu  },
68835e5bd9SJames Clark  {
692a81fa3bSSukadev Bhattiprolu    "EventCode": "0x640050",
702a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ALL_SYS_PUMP_MPRED_RTY",
712a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Final Pump Scope (system) ended up larger than Initial Pump Scope (Chip/Group) for all data types (demand load,data prefetch,inst prefetch,inst fetch,xlate)",
722a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope (Chip or Group) for all data types excluding data prefetch (demand load,inst prefetch,inst fetch,xlate)"
732a81fa3bSSukadev Bhattiprolu  },
74835e5bd9SJames Clark  {
752a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4082",
762a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BANK_CONFLICT",
772a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Read blocked due to interleave conflict. The ifar logic will detect an interleave conflict and kill the data that was read that cycle",
782a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
792a81fa3bSSukadev Bhattiprolu  },
80835e5bd9SJames Clark  {
812a81fa3bSSukadev Bhattiprolu    "EventCode": "0x5086",
822a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_BC_8",
832a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Pairable BC+8 branch that has not been converted to a Resolve Finished in the BRU pipeline",
842a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
852a81fa3bSSukadev Bhattiprolu  },
86835e5bd9SJames Clark  {
872a81fa3bSSukadev Bhattiprolu    "EventCode": "0x5084",
882a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_BC_8_CONV",
892a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Pairable BC+8 branch that was converted to a Resolve Finished in the BRU pipeline",
902a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
912a81fa3bSSukadev Bhattiprolu  },
92835e5bd9SJames Clark  {
932a81fa3bSSukadev Bhattiprolu    "EventCode": "0x40ac",
942a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_MPRED_CCACHE",
952a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Conditional Branch Completed that was Mispredicted due to the Count Cache Target Prediction",
962a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
972a81fa3bSSukadev Bhattiprolu  },
98835e5bd9SJames Clark  {
992a81fa3bSSukadev Bhattiprolu    "EventCode": "0x40b8",
1002a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_MPRED_CR",
1012a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Conditional Branch Completed that was Mispredicted due to the BHT Direction Prediction (taken/not taken)",
1022a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
1032a81fa3bSSukadev Bhattiprolu  },
104835e5bd9SJames Clark  {
1052a81fa3bSSukadev Bhattiprolu    "EventCode": "0x40ae",
1062a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_MPRED_LSTACK",
1072a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Conditional Branch Completed that was Mispredicted due to the Link Stack Target Prediction",
1082a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
1092a81fa3bSSukadev Bhattiprolu  },
110835e5bd9SJames Clark  {
1112a81fa3bSSukadev Bhattiprolu    "EventCode": "0x40ba",
1122a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_MPRED_TA",
1132a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Conditional Branch Completed that was Mispredicted due to the Target Address Prediction from the Count Cache or Link Stack. Only XL-form branches that resolved Taken set this event",
1142a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
1152a81fa3bSSukadev Bhattiprolu  },
116835e5bd9SJames Clark  {
1172a81fa3bSSukadev Bhattiprolu    "EventCode": "0x10138",
1182a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_MRK_2PATH",
1192a81fa3bSSukadev Bhattiprolu    "BriefDescription": "marked two path branch",
1202a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
1212a81fa3bSSukadev Bhattiprolu  },
122835e5bd9SJames Clark  {
1232a81fa3bSSukadev Bhattiprolu    "EventCode": "0x409c",
1242a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_PRED_BR0",
1252a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Conditional Branch Completed on BR0 (1st branch in group) in which the HW predicted the Direction or Target",
1262a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
1272a81fa3bSSukadev Bhattiprolu  },
128835e5bd9SJames Clark  {
1292a81fa3bSSukadev Bhattiprolu    "EventCode": "0x409e",
1302a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_PRED_BR1",
1312a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Conditional Branch Completed on BR1 (2nd branch in group) in which the HW predicted the Direction or Target. Note: BR1 can only be used in Single Thread Mode. In all of the SMT modes, only one branch can complete, thus BR1 is unused",
1322a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
1332a81fa3bSSukadev Bhattiprolu  },
134835e5bd9SJames Clark  {
1352a81fa3bSSukadev Bhattiprolu    "EventCode": "0x489c",
1362a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_PRED_BR_CMPL",
1372a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion Time Event. This event can also be calculated from the direct bus as follows: if_pc_br0_br_pred(0) OR if_pc_br0_br_pred(1)",
1382a81fa3bSSukadev Bhattiprolu    "PublicDescription": "IFU"
1392a81fa3bSSukadev Bhattiprolu  },
140835e5bd9SJames Clark  {
1412a81fa3bSSukadev Bhattiprolu    "EventCode": "0x40a4",
1422a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_PRED_CCACHE_BR0",
1432a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Conditional Branch Completed on BR0 that used the Count Cache for Target Prediction",
1442a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
1452a81fa3bSSukadev Bhattiprolu  },
146835e5bd9SJames Clark  {
1472a81fa3bSSukadev Bhattiprolu    "EventCode": "0x40a6",
1482a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_PRED_CCACHE_BR1",
1492a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Conditional Branch Completed on BR1 that used the Count Cache for Target Prediction",
1502a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
1512a81fa3bSSukadev Bhattiprolu  },
152835e5bd9SJames Clark  {
1532a81fa3bSSukadev Bhattiprolu    "EventCode": "0x48a4",
1542a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_PRED_CCACHE_CMPL",
1552a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion Time Event. This event can also be calculated from the direct bus as follows: if_pc_br0_br_pred(0) AND if_pc_br0_pred_type",
1562a81fa3bSSukadev Bhattiprolu    "PublicDescription": "IFU"
1572a81fa3bSSukadev Bhattiprolu  },
158835e5bd9SJames Clark  {
1592a81fa3bSSukadev Bhattiprolu    "EventCode": "0x40b0",
1602a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_PRED_CR_BR0",
1612a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Conditional Branch Completed on BR0 that had its direction predicted. I-form branches do not set this event. In addition, B-form branches which do not use the BHT do not set this event - these are branches with BO-field set to 'always taken' and branches",
1622a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
1632a81fa3bSSukadev Bhattiprolu  },
164835e5bd9SJames Clark  {
1652a81fa3bSSukadev Bhattiprolu    "EventCode": "0x40b2",
1662a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_PRED_CR_BR1",
1672a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Conditional Branch Completed on BR1 that had its direction predicted. I-form branches do not set this event. In addition, B-form branches which do not use the BHT do not set this event - these are branches with BO-field set to 'always taken' and branches",
1682a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
1692a81fa3bSSukadev Bhattiprolu  },
170835e5bd9SJames Clark  {
1712a81fa3bSSukadev Bhattiprolu    "EventCode": "0x48b0",
1722a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_PRED_CR_CMPL",
1732a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion Time Event. This event can also be calculated from the direct bus as follows: if_pc_br0_br_pred(1)='1'",
1742a81fa3bSSukadev Bhattiprolu    "PublicDescription": "IFU"
1752a81fa3bSSukadev Bhattiprolu  },
176835e5bd9SJames Clark  {
1772a81fa3bSSukadev Bhattiprolu    "EventCode": "0x40a8",
1782a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_PRED_LSTACK_BR0",
1792a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Conditional Branch Completed on BR0 that used the Link Stack for Target Prediction",
1802a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
1812a81fa3bSSukadev Bhattiprolu  },
182835e5bd9SJames Clark  {
1832a81fa3bSSukadev Bhattiprolu    "EventCode": "0x40aa",
1842a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_PRED_LSTACK_BR1",
1852a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Conditional Branch Completed on BR1 that used the Link Stack for Target Prediction",
1862a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
1872a81fa3bSSukadev Bhattiprolu  },
188835e5bd9SJames Clark  {
1892a81fa3bSSukadev Bhattiprolu    "EventCode": "0x48a8",
1902a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_PRED_LSTACK_CMPL",
1912a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion Time Event. This event can also be calculated from the direct bus as follows: if_pc_br0_br_pred(0) AND (not if_pc_br0_pred_type)",
1922a81fa3bSSukadev Bhattiprolu    "PublicDescription": "IFU"
1932a81fa3bSSukadev Bhattiprolu  },
194835e5bd9SJames Clark  {
1952a81fa3bSSukadev Bhattiprolu    "EventCode": "0x40b4",
1962a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_PRED_TA_BR0",
1972a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Conditional Branch Completed on BR0 that had its target address predicted. Only XL-form branches set this event",
1982a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
1992a81fa3bSSukadev Bhattiprolu  },
200835e5bd9SJames Clark  {
2012a81fa3bSSukadev Bhattiprolu    "EventCode": "0x40b6",
2022a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_PRED_TA_BR1",
2032a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Conditional Branch Completed on BR1 that had its target address predicted. Only XL-form branches set this event",
2042a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
2052a81fa3bSSukadev Bhattiprolu  },
206835e5bd9SJames Clark  {
2072a81fa3bSSukadev Bhattiprolu    "EventCode": "0x48b4",
2082a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_PRED_TA_CMPL",
2092a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion Time Event. This event can also be calculated from the direct bus as follows: if_pc_br0_br_pred(0)='1'",
2102a81fa3bSSukadev Bhattiprolu    "PublicDescription": "IFU"
2112a81fa3bSSukadev Bhattiprolu  },
212835e5bd9SJames Clark  {
2132a81fa3bSSukadev Bhattiprolu    "EventCode": "0x40a0",
2142a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_UNCOND_BR0",
2152a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Unconditional Branch Completed on BR0. HW branch prediction was not used for this branch. This can be an I-form branch, a B-form branch with BO-field set to branch always, or a B-form branch which was coverted to a Resolve",
2162a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
2172a81fa3bSSukadev Bhattiprolu  },
218835e5bd9SJames Clark  {
2192a81fa3bSSukadev Bhattiprolu    "EventCode": "0x40a2",
2202a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_UNCOND_BR1",
2212a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Unconditional Branch Completed on BR1. HW branch prediction was not used for this branch. This can be an I-form branch, a B-form branch with BO-field set to branch always, or a B-form branch which was coverted to a Resolve",
2222a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
2232a81fa3bSSukadev Bhattiprolu  },
224835e5bd9SJames Clark  {
2252a81fa3bSSukadev Bhattiprolu    "EventCode": "0x48a0",
2262a81fa3bSSukadev Bhattiprolu    "EventName": "PM_BR_UNCOND_CMPL",
2272a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion Time Event. This event can also be calculated from the direct bus as follows: if_pc_br0_br_pred=00 AND if_pc_br0_completed",
2282a81fa3bSSukadev Bhattiprolu    "PublicDescription": "IFU"
2292a81fa3bSSukadev Bhattiprolu  },
230835e5bd9SJames Clark  {
2312a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3094",
2322a81fa3bSSukadev Bhattiprolu    "EventName": "PM_CASTOUT_ISSUED",
2332a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Castouts issued",
2342a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
2352a81fa3bSSukadev Bhattiprolu  },
236835e5bd9SJames Clark  {
2372a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3096",
2382a81fa3bSSukadev Bhattiprolu    "EventName": "PM_CASTOUT_ISSUED_GPR",
2392a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Castouts issued GPR",
2402a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
2412a81fa3bSSukadev Bhattiprolu  },
242835e5bd9SJames Clark  {
2432a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2090",
2442a81fa3bSSukadev Bhattiprolu    "EventName": "PM_CLB_HELD",
2452a81fa3bSSukadev Bhattiprolu    "BriefDescription": "CLB Hold: Any Reason",
2462a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
2472a81fa3bSSukadev Bhattiprolu  },
248835e5bd9SJames Clark  {
2492a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2d018",
2502a81fa3bSSukadev Bhattiprolu    "EventName": "PM_CMPLU_STALL_BRU_CRU",
2512a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion stall due to IFU",
2522a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
2532a81fa3bSSukadev Bhattiprolu  },
254835e5bd9SJames Clark  {
2552a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30026",
2562a81fa3bSSukadev Bhattiprolu    "EventName": "PM_CMPLU_STALL_COQ_FULL",
2572a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion stall due to CO q full",
2582a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
2592a81fa3bSSukadev Bhattiprolu  },
260835e5bd9SJames Clark  {
2612a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30038",
2622a81fa3bSSukadev Bhattiprolu    "EventName": "PM_CMPLU_STALL_FLUSH",
2632a81fa3bSSukadev Bhattiprolu    "BriefDescription": "completion stall due to flush by own thread",
2642a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
2652a81fa3bSSukadev Bhattiprolu  },
266835e5bd9SJames Clark  {
2672a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30028",
2682a81fa3bSSukadev Bhattiprolu    "EventName": "PM_CMPLU_STALL_MEM_ECC_DELAY",
2692a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion stall due to mem ECC delay",
2702a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
2712a81fa3bSSukadev Bhattiprolu  },
272835e5bd9SJames Clark  {
2732a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2e01c",
2742a81fa3bSSukadev Bhattiprolu    "EventName": "PM_CMPLU_STALL_NO_NTF",
2752a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion stall due to nop",
2762a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
2772a81fa3bSSukadev Bhattiprolu  },
278835e5bd9SJames Clark  {
2792a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2e01e",
2802a81fa3bSSukadev Bhattiprolu    "EventName": "PM_CMPLU_STALL_NTCG_FLUSH",
2812a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion stall due to ntcg flush",
2822a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Completion stall due to reject (load hit store)"
2832a81fa3bSSukadev Bhattiprolu  },
284835e5bd9SJames Clark  {
2852a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4c010",
2862a81fa3bSSukadev Bhattiprolu    "EventName": "PM_CMPLU_STALL_REJECT",
2872a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion stall due to LSU reject",
2882a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
2892a81fa3bSSukadev Bhattiprolu  },
290835e5bd9SJames Clark  {
2912a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2c01a",
2922a81fa3bSSukadev Bhattiprolu    "EventName": "PM_CMPLU_STALL_REJECT_LHS",
2932a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion stall due to reject (load hit store)",
2942a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
2952a81fa3bSSukadev Bhattiprolu  },
296835e5bd9SJames Clark  {
2972a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4c014",
2982a81fa3bSSukadev Bhattiprolu    "EventName": "PM_CMPLU_STALL_REJ_LMQ_FULL",
2992a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion stall due to LSU reject LMQ full",
3002a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
3012a81fa3bSSukadev Bhattiprolu  },
302835e5bd9SJames Clark  {
3032a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4d010",
3042a81fa3bSSukadev Bhattiprolu    "EventName": "PM_CMPLU_STALL_SCALAR",
3052a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion stall due to VSU scalar instruction",
3062a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
3072a81fa3bSSukadev Bhattiprolu  },
308835e5bd9SJames Clark  {
3092a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2d010",
3102a81fa3bSSukadev Bhattiprolu    "EventName": "PM_CMPLU_STALL_SCALAR_LONG",
3112a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion stall due to VSU scalar long latency instruction",
3122a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
3132a81fa3bSSukadev Bhattiprolu  },
314835e5bd9SJames Clark  {
3152a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2c014",
3162a81fa3bSSukadev Bhattiprolu    "EventName": "PM_CMPLU_STALL_STORE",
3172a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion stall by stores this includes store agen finishes in pipe LS0/LS1 and store data finishes in LS2/LS3",
3182a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
3192a81fa3bSSukadev Bhattiprolu  },
320835e5bd9SJames Clark  {
3212a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2d014",
3222a81fa3bSSukadev Bhattiprolu    "EventName": "PM_CMPLU_STALL_VECTOR",
3232a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion stall due to VSU vector instruction",
3242a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
3252a81fa3bSSukadev Bhattiprolu  },
326835e5bd9SJames Clark  {
3272a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4d012",
3282a81fa3bSSukadev Bhattiprolu    "EventName": "PM_CMPLU_STALL_VECTOR_LONG",
3292a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion stall due to VSU vector long instruction",
3302a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
3312a81fa3bSSukadev Bhattiprolu  },
332835e5bd9SJames Clark  {
3332a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2d012",
3342a81fa3bSSukadev Bhattiprolu    "EventName": "PM_CMPLU_STALL_VSU",
3352a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion stall due to VSU instruction",
3362a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
3372a81fa3bSSukadev Bhattiprolu  },
338835e5bd9SJames Clark  {
3392a81fa3bSSukadev Bhattiprolu    "EventCode": "0x16083",
3402a81fa3bSSukadev Bhattiprolu    "EventName": "PM_CO0_ALLOC",
3412a81fa3bSSukadev Bhattiprolu    "BriefDescription": "CO mach 0 Busy. Used by PMU to sample ave RC livetime(mach0 used as sample point)",
3422a81fa3bSSukadev Bhattiprolu    "PublicDescription": "0.0"
3432a81fa3bSSukadev Bhattiprolu  },
344835e5bd9SJames Clark  {
3452a81fa3bSSukadev Bhattiprolu    "EventCode": "0x16082",
3462a81fa3bSSukadev Bhattiprolu    "EventName": "PM_CO0_BUSY",
3472a81fa3bSSukadev Bhattiprolu    "BriefDescription": "CO mach 0 Busy. Used by PMU to sample ave RC livetime(mach0 used as sample point)",
3482a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
3492a81fa3bSSukadev Bhattiprolu  },
350835e5bd9SJames Clark  {
3512a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3608a",
3522a81fa3bSSukadev Bhattiprolu    "EventName": "PM_CO_USAGE",
3532a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Continuous 16 cycle(2to1) window where this signals rotates thru sampling each L2 CO machine busy. PMU uses this wave to then do 16 cyc count to sample total number of machs running",
3542a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
3552a81fa3bSSukadev Bhattiprolu  },
356835e5bd9SJames Clark  {
3572a81fa3bSSukadev Bhattiprolu    "EventCode": "0x40066",
3582a81fa3bSSukadev Bhattiprolu    "EventName": "PM_CRU_FIN",
3592a81fa3bSSukadev Bhattiprolu    "BriefDescription": "IFU Finished a (non-branch) instruction",
3602a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
3612a81fa3bSSukadev Bhattiprolu  },
362835e5bd9SJames Clark  {
3632a81fa3bSSukadev Bhattiprolu    "EventCode": "0x61c050",
3642a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_CHIP_PUMP_CPRED",
3652a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Initial and Final Pump Scope was chip pump (prediction=correct) for either demand loads or data prefetch",
3662a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was chip pump (prediction=correct) for a demand load"
3672a81fa3bSSukadev Bhattiprolu  },
368835e5bd9SJames Clark  {
3692a81fa3bSSukadev Bhattiprolu    "EventCode": "0x64c048",
3702a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_DL2L3_MOD",
3712a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either demand loads or data prefetch",
3722a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
3732a81fa3bSSukadev Bhattiprolu  },
374835e5bd9SJames Clark  {
3752a81fa3bSSukadev Bhattiprolu    "EventCode": "0x63c048",
3762a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_DL2L3_SHR",
3772a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either demand loads or data prefetch",
3782a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
3792a81fa3bSSukadev Bhattiprolu  },
380835e5bd9SJames Clark  {
3812a81fa3bSSukadev Bhattiprolu    "EventCode": "0x63c04c",
3822a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_DL4",
3832a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to either demand loads or data prefetch",
3842a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
3852a81fa3bSSukadev Bhattiprolu  },
386835e5bd9SJames Clark  {
3872a81fa3bSSukadev Bhattiprolu    "EventCode": "0x64c04c",
3882a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_DMEM",
3892a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded from another chip's memory on the same Node or Group (Distant) due to either demand loads or data prefetch",
3902a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded from another chip's memory on the same Node or Group (Distant) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
3912a81fa3bSSukadev Bhattiprolu  },
392835e5bd9SJames Clark  {
3932a81fa3bSSukadev Bhattiprolu    "EventCode": "0x61c042",
3942a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_L2",
3952a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded from local core's L2 due to either demand loads or data prefetch",
3962a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded from local core's L2 due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
3972a81fa3bSSukadev Bhattiprolu  },
398835e5bd9SJames Clark  {
3992a81fa3bSSukadev Bhattiprolu    "EventCode": "0x64c046",
4002a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_L21_MOD",
4012a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L2 on the same chip due to either demand loads or data prefetch",
4022a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L2 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
4032a81fa3bSSukadev Bhattiprolu  },
404835e5bd9SJames Clark  {
4052a81fa3bSSukadev Bhattiprolu    "EventCode": "0x63c046",
4062a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_L21_SHR",
4072a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L2 on the same chip due to either demand loads or data prefetch",
4082a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L2 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
4092a81fa3bSSukadev Bhattiprolu  },
410835e5bd9SJames Clark  {
4112a81fa3bSSukadev Bhattiprolu    "EventCode": "0x61c04e",
4122a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_L2MISS_MOD",
41370830f97SSandipan Das    "BriefDescription": "The processor's data cache was reloaded from a location other than the local core's L2 due to either demand loads or data prefetch",
41470830f97SSandipan Das    "PublicDescription": "The processor's data cache was reloaded from a location other than the local core's L2 due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
4152a81fa3bSSukadev Bhattiprolu  },
416835e5bd9SJames Clark  {
4172a81fa3bSSukadev Bhattiprolu    "EventCode": "0x63c040",
4182a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_L2_DISP_CONFLICT_LDHITST",
4192a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded from local core's L2 with load hit store conflict due to either demand loads or data prefetch",
4202a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded from local core's L2 with load hit store conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
4212a81fa3bSSukadev Bhattiprolu  },
422835e5bd9SJames Clark  {
4232a81fa3bSSukadev Bhattiprolu    "EventCode": "0x64c040",
4242a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_L2_DISP_CONFLICT_OTHER",
4252a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded from local core's L2 with dispatch conflict due to either demand loads or data prefetch",
4262a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded from local core's L2 with dispatch conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
4272a81fa3bSSukadev Bhattiprolu  },
428835e5bd9SJames Clark  {
4292a81fa3bSSukadev Bhattiprolu    "EventCode": "0x62c040",
4302a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_L2_MEPF",
4312a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state due to either demand loads or data prefetch",
4322a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
4332a81fa3bSSukadev Bhattiprolu  },
434835e5bd9SJames Clark  {
4352a81fa3bSSukadev Bhattiprolu    "EventCode": "0x61c040",
4362a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_L2_NO_CONFLICT",
4372a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded from local core's L2 without conflict due to either demand loads or data prefetch",
4382a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded from local core's L2 without conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
4392a81fa3bSSukadev Bhattiprolu  },
440835e5bd9SJames Clark  {
4412a81fa3bSSukadev Bhattiprolu    "EventCode": "0x64c042",
4422a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_L3",
4432a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded from local core's L3 due to either demand loads or data prefetch",
4442a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded from local core's L3 due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
4452a81fa3bSSukadev Bhattiprolu  },
446835e5bd9SJames Clark  {
4472a81fa3bSSukadev Bhattiprolu    "EventCode": "0x64c044",
4482a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_L31_ECO_MOD",
4492a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to either demand loads or data prefetch",
4502a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
4512a81fa3bSSukadev Bhattiprolu  },
452835e5bd9SJames Clark  {
4532a81fa3bSSukadev Bhattiprolu    "EventCode": "0x63c044",
4542a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_L31_ECO_SHR",
4552a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to either demand loads or data prefetch",
4562a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
4572a81fa3bSSukadev Bhattiprolu  },
458835e5bd9SJames Clark  {
4592a81fa3bSSukadev Bhattiprolu    "EventCode": "0x62c044",
4602a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_L31_MOD",
4612a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L3 on the same chip due to either demand loads or data prefetch",
4622a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
4632a81fa3bSSukadev Bhattiprolu  },
464835e5bd9SJames Clark  {
4652a81fa3bSSukadev Bhattiprolu    "EventCode": "0x61c046",
4662a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_L31_SHR",
4672a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L3 on the same chip due to either demand loads or data prefetch",
4682a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
4692a81fa3bSSukadev Bhattiprolu  },
470835e5bd9SJames Clark  {
4712a81fa3bSSukadev Bhattiprolu    "EventCode": "0x64c04e",
4722a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_L3MISS_MOD",
47370830f97SSandipan Das    "BriefDescription": "The processor's data cache was reloaded from a location other than the local core's L3 due to either demand loads or data prefetch",
47470830f97SSandipan Das    "PublicDescription": "The processor's data cache was reloaded from a location other than the local core's L3 due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
4752a81fa3bSSukadev Bhattiprolu  },
476835e5bd9SJames Clark  {
4772a81fa3bSSukadev Bhattiprolu    "EventCode": "0x63c042",
4782a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_L3_DISP_CONFLICT",
4792a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded from local core's L3 with dispatch conflict due to either demand loads or data prefetch",
4802a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded from local core's L3 with dispatch conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
4812a81fa3bSSukadev Bhattiprolu  },
482835e5bd9SJames Clark  {
4832a81fa3bSSukadev Bhattiprolu    "EventCode": "0x62c042",
4842a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_L3_MEPF",
4852a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state due to either demand loads or data prefetch",
4862a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
4872a81fa3bSSukadev Bhattiprolu  },
488835e5bd9SJames Clark  {
4892a81fa3bSSukadev Bhattiprolu    "EventCode": "0x61c044",
4902a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_L3_NO_CONFLICT",
4912a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded from local core's L3 without conflict due to either demand loads or data prefetch",
4922a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded from local core's L3 without conflict due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
4932a81fa3bSSukadev Bhattiprolu  },
494835e5bd9SJames Clark  {
4952a81fa3bSSukadev Bhattiprolu    "EventCode": "0x61c04c",
4962a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_LL4",
4972a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded from the local chip's L4 cache due to either demand loads or data prefetch",
4982a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded from the local chip's L4 cache due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
4992a81fa3bSSukadev Bhattiprolu  },
500835e5bd9SJames Clark  {
5012a81fa3bSSukadev Bhattiprolu    "EventCode": "0x62c048",
5022a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_LMEM",
5032a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded from the local chip's Memory due to either demand loads or data prefetch",
5042a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded from the local chip's Memory due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
5052a81fa3bSSukadev Bhattiprolu  },
506835e5bd9SJames Clark  {
5072a81fa3bSSukadev Bhattiprolu    "EventCode": "0x62c04c",
5082a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_MEMORY",
5092a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded from a memory location including L4 from local remote or distant due to either demand loads or data prefetch",
5102a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded from a memory location including L4 from local remote or distant due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
5112a81fa3bSSukadev Bhattiprolu  },
512835e5bd9SJames Clark  {
5132a81fa3bSSukadev Bhattiprolu    "EventCode": "0x64c04a",
5142a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_OFF_CHIP_CACHE",
5152a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to either demand loads or data prefetch",
5162a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
5172a81fa3bSSukadev Bhattiprolu  },
518835e5bd9SJames Clark  {
5192a81fa3bSSukadev Bhattiprolu    "EventCode": "0x61c048",
5202a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_ON_CHIP_CACHE",
5212a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to either demand loads or data prefetch",
5222a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
5232a81fa3bSSukadev Bhattiprolu  },
524835e5bd9SJames Clark  {
5252a81fa3bSSukadev Bhattiprolu    "EventCode": "0x62c046",
5262a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_RL2L3_MOD",
5272a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either demand loads or data prefetch",
5282a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
5292a81fa3bSSukadev Bhattiprolu  },
530835e5bd9SJames Clark  {
5312a81fa3bSSukadev Bhattiprolu    "EventCode": "0x61c04a",
5322a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_RL2L3_SHR",
5332a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either demand loads or data prefetch",
5342a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
5352a81fa3bSSukadev Bhattiprolu  },
536835e5bd9SJames Clark  {
5372a81fa3bSSukadev Bhattiprolu    "EventCode": "0x62c04a",
5382a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_RL4",
5392a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to either demand loads or data prefetch",
5402a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
5412a81fa3bSSukadev Bhattiprolu  },
542835e5bd9SJames Clark  {
5432a81fa3bSSukadev Bhattiprolu    "EventCode": "0x63c04a",
5442a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_FROM_RMEM",
5452a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to either demand loads or data prefetch",
5462a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
5472a81fa3bSSukadev Bhattiprolu  },
548835e5bd9SJames Clark  {
5492a81fa3bSSukadev Bhattiprolu    "EventCode": "0x62c050",
5502a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_GRP_PUMP_CPRED",
5512a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Initial and Final Pump Scope was group pump (prediction=correct) for either demand loads or data prefetch",
5522a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was group pump for a demand load"
5532a81fa3bSSukadev Bhattiprolu  },
554835e5bd9SJames Clark  {
5552a81fa3bSSukadev Bhattiprolu    "EventCode": "0x62c052",
5562a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_GRP_PUMP_MPRED",
5572a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Final Pump Scope (Group) ended up either larger or smaller than Initial Pump Scope for either demand loads or data prefetch",
5582a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope OR Final Pump Scope(Group) got data from source that was at smaller scope(Chip) Final pump was group pump and initial pump was chip or final and initial pump was gro"
5592a81fa3bSSukadev Bhattiprolu  },
560835e5bd9SJames Clark  {
5612a81fa3bSSukadev Bhattiprolu    "EventCode": "0x61c052",
5622a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_GRP_PUMP_MPRED_RTY",
5632a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for either demand loads or data prefetch",
5642a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope (Chip) Final pump was group pump and initial pump was chip pumpfor a demand load"
5652a81fa3bSSukadev Bhattiprolu  },
566835e5bd9SJames Clark  {
5672a81fa3bSSukadev Bhattiprolu    "EventCode": "0x61c054",
5682a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_PUMP_CPRED",
5692a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Pump prediction correct. Counts across all types of pumps for either demand loads or data prefetch",
5702a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Pump prediction correct. Counts across all types of pumps for a demand load"
5712a81fa3bSSukadev Bhattiprolu  },
572835e5bd9SJames Clark  {
5732a81fa3bSSukadev Bhattiprolu    "EventCode": "0x64c052",
5742a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_PUMP_MPRED",
5752a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Pump misprediction. Counts across all types of pumps for either demand loads or data prefetch",
5762a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Pump Mis prediction Counts across all types of pumpsfor a demand load"
5772a81fa3bSSukadev Bhattiprolu  },
578835e5bd9SJames Clark  {
5792a81fa3bSSukadev Bhattiprolu    "EventCode": "0x63c050",
5802a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_SYS_PUMP_CPRED",
5812a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Initial and Final Pump Scope was system pump (prediction=correct) for either demand loads or data prefetch",
5822a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was system pump for a demand load"
5832a81fa3bSSukadev Bhattiprolu  },
584835e5bd9SJames Clark  {
5852a81fa3bSSukadev Bhattiprolu    "EventCode": "0x63c052",
5862a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_SYS_PUMP_MPRED",
5872a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Final Pump Scope (system) mispredicted. Either the original scope was too small (Chip/Group) or the original scope was System and it should have been smaller. Counts for either demand loads or data prefetch",
5882a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope(Chip/Group) OR Final Pump Scope(system) got data from source that was at smaller scope(Chip/group) Final pump was system pump and initial pump was chip or group or"
5892a81fa3bSSukadev Bhattiprolu  },
590835e5bd9SJames Clark  {
5912a81fa3bSSukadev Bhattiprolu    "EventCode": "0x64c050",
5922a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_ALL_SYS_PUMP_MPRED_RTY",
5932a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Final Pump Scope (system) ended up larger than Initial Pump Scope (Chip/Group) for either demand loads or data prefetch",
5942a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope (Chip or Group) for a demand load"
5952a81fa3bSSukadev Bhattiprolu  },
596835e5bd9SJames Clark  {
5972a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4c046",
5982a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_FROM_L21_MOD",
5992a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L2 on the same chip due to a demand load",
6002a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L2 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
6012a81fa3bSSukadev Bhattiprolu  },
602835e5bd9SJames Clark  {
6032a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3c046",
6042a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_FROM_L21_SHR",
6052a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L2 on the same chip due to a demand load",
6062a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L2 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
6072a81fa3bSSukadev Bhattiprolu  },
608835e5bd9SJames Clark  {
6092a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4c044",
6102a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_FROM_L31_ECO_MOD",
6112a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to a demand load",
6122a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
6132a81fa3bSSukadev Bhattiprolu  },
614835e5bd9SJames Clark  {
6152a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3c044",
6162a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_FROM_L31_ECO_SHR",
6172a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to a demand load",
6182a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
6192a81fa3bSSukadev Bhattiprolu  },
620835e5bd9SJames Clark  {
6212a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2c044",
6222a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_FROM_L31_MOD",
6232a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L3 on the same chip due to a demand load",
6242a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
6252a81fa3bSSukadev Bhattiprolu  },
626835e5bd9SJames Clark  {
6272a81fa3bSSukadev Bhattiprolu    "EventCode": "0x1c046",
6282a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_FROM_L31_SHR",
6292a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L3 on the same chip due to a demand load",
6302a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L3 on the same chip due to either only demand loads or demand loads plus prefetches if MMCR1[16] is 1"
6312a81fa3bSSukadev Bhattiprolu  },
632835e5bd9SJames Clark  {
6332a81fa3bSSukadev Bhattiprolu    "EventCode": "0x400fe",
6342a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DATA_FROM_MEM",
6352a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded from a memory location including L4 from local remote or distant due to a demand load",
6362a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Data cache reload from memory (including L4)"
6372a81fa3bSSukadev Bhattiprolu  },
638835e5bd9SJames Clark  {
6392a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe0bc",
6402a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DC_COLLISIONS",
6412a81fa3bSSukadev Bhattiprolu    "BriefDescription": "DATA Cache collisions",
6422a81fa3bSSukadev Bhattiprolu    "PublicDescription": "DATA Cache collisions42"
6432a81fa3bSSukadev Bhattiprolu  },
644835e5bd9SJames Clark  {
6452a81fa3bSSukadev Bhattiprolu    "EventCode": "0x1e050",
6462a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DC_PREF_STREAM_ALLOC",
6472a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Stream marked valid. The stream could have been allocated through the hardware prefetch mechanism or through software. This is combined ls0 and ls1",
6482a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
6492a81fa3bSSukadev Bhattiprolu  },
650835e5bd9SJames Clark  {
6512a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2e050",
6522a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DC_PREF_STREAM_CONF",
6532a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A demand load referenced a line in an active prefetch stream. The stream could have been allocated through the hardware prefetch mechanism or through software. Combine up + down",
6542a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
6552a81fa3bSSukadev Bhattiprolu  },
656835e5bd9SJames Clark  {
6572a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4e050",
6582a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DC_PREF_STREAM_FUZZY_CONF",
6592a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A demand load referenced a line in an active fuzzy prefetch stream. The stream could have been allocated through the hardware prefetch mechanism or through software.Fuzzy stream confirm (out of order effects, or pf cant keep up)",
6602a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
6612a81fa3bSSukadev Bhattiprolu  },
662835e5bd9SJames Clark  {
6632a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3e050",
6642a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DC_PREF_STREAM_STRIDED_CONF",
6652a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A demand load referenced a line in an active strided prefetch stream. The stream could have been allocated through the hardware prefetch mechanism or through software",
6662a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
6672a81fa3bSSukadev Bhattiprolu  },
668835e5bd9SJames Clark  {
6692a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb0ba",
6702a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DFU",
6712a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Finish DFU (all finish)",
6722a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
6732a81fa3bSSukadev Bhattiprolu  },
674835e5bd9SJames Clark  {
6752a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb0be",
6762a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DFU_DCFFIX",
6772a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Convert from fixed opcode finish (dcffix,dcffixq)",
6782a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
6792a81fa3bSSukadev Bhattiprolu  },
680835e5bd9SJames Clark  {
6812a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb0bc",
6822a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DFU_DENBCD",
6832a81fa3bSSukadev Bhattiprolu    "BriefDescription": "BCD->DPD opcode finish (denbcd, denbcdq)",
6842a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
6852a81fa3bSSukadev Bhattiprolu  },
686835e5bd9SJames Clark  {
6872a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb0b8",
6882a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DFU_MC",
6892a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Finish DFU multicycle",
6902a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
6912a81fa3bSSukadev Bhattiprolu  },
692835e5bd9SJames Clark  {
6932a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2092",
6942a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DISP_CLB_HELD_BAL",
6952a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Dispatch/CLB Hold: Balance",
6962a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
6972a81fa3bSSukadev Bhattiprolu  },
698835e5bd9SJames Clark  {
6992a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2094",
7002a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DISP_CLB_HELD_RES",
7012a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Dispatch/CLB Hold: Resource",
7022a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
7032a81fa3bSSukadev Bhattiprolu  },
704835e5bd9SJames Clark  {
7052a81fa3bSSukadev Bhattiprolu    "EventCode": "0x20a8",
7062a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DISP_CLB_HELD_SB",
7072a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Dispatch/CLB Hold: Scoreboard",
7082a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
7092a81fa3bSSukadev Bhattiprolu  },
710835e5bd9SJames Clark  {
7112a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2098",
7122a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DISP_CLB_HELD_SYNC",
7132a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Dispatch/CLB Hold: Sync type instruction",
7142a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
7152a81fa3bSSukadev Bhattiprolu  },
716835e5bd9SJames Clark  {
7172a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2096",
7182a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DISP_CLB_HELD_TLBIE",
7192a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Dispatch Hold: Due to TLBIE",
7202a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
7212a81fa3bSSukadev Bhattiprolu  },
722835e5bd9SJames Clark  {
7232a81fa3bSSukadev Bhattiprolu    "EventCode": "0x20006",
7242a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DISP_HELD_IQ_FULL",
7252a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Dispatch held due to Issue q full",
7262a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
7272a81fa3bSSukadev Bhattiprolu  },
728835e5bd9SJames Clark  {
7292a81fa3bSSukadev Bhattiprolu    "EventCode": "0x1002a",
7302a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DISP_HELD_MAP_FULL",
7312a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Dispatch for this thread was held because the Mappers were full",
7322a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Dispatch held due to Mapper full"
7332a81fa3bSSukadev Bhattiprolu  },
734835e5bd9SJames Clark  {
7352a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30018",
7362a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DISP_HELD_SRQ_FULL",
7372a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Dispatch held due SRQ no room",
7382a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
7392a81fa3bSSukadev Bhattiprolu  },
740835e5bd9SJames Clark  {
7412a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30a6",
7422a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DISP_HOLD_GCT_FULL",
7432a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Dispatch Hold Due to no space in the GCT",
7442a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
7452a81fa3bSSukadev Bhattiprolu  },
746835e5bd9SJames Clark  {
7472a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30008",
7482a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DISP_WT",
7492a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Dispatched Starved",
7502a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Dispatched Starved (not held, nothing to dispatch)"
7512a81fa3bSSukadev Bhattiprolu  },
752835e5bd9SJames Clark  {
7532a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4e046",
7542a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DPTEG_FROM_L21_MOD",
7552a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L2 on the same chip due to a data side request",
7562a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
7572a81fa3bSSukadev Bhattiprolu  },
758835e5bd9SJames Clark  {
7592a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3e046",
7602a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DPTEG_FROM_L21_SHR",
7612a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L2 on the same chip due to a data side request",
7622a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
7632a81fa3bSSukadev Bhattiprolu  },
764835e5bd9SJames Clark  {
7652a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3e040",
7662a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DPTEG_FROM_L2_DISP_CONFLICT_LDHITST",
7672a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 with load hit store conflict due to a data side request",
7682a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
7692a81fa3bSSukadev Bhattiprolu  },
770835e5bd9SJames Clark  {
7712a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4e040",
7722a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DPTEG_FROM_L2_DISP_CONFLICT_OTHER",
7732a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 with dispatch conflict due to a data side request",
7742a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
7752a81fa3bSSukadev Bhattiprolu  },
776835e5bd9SJames Clark  {
7772a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4e044",
7782a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DPTEG_FROM_L31_ECO_MOD",
7792a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's ECO L3 on the same chip due to a data side request",
7802a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
7812a81fa3bSSukadev Bhattiprolu  },
782835e5bd9SJames Clark  {
7832a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3e044",
7842a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DPTEG_FROM_L31_ECO_SHR",
7852a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to a data side request",
7862a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
7872a81fa3bSSukadev Bhattiprolu  },
788835e5bd9SJames Clark  {
7892a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2e044",
7902a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DPTEG_FROM_L31_MOD",
7912a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L3 on the same chip due to a data side request",
7922a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
7932a81fa3bSSukadev Bhattiprolu  },
794835e5bd9SJames Clark  {
7952a81fa3bSSukadev Bhattiprolu    "EventCode": "0x1e046",
7962a81fa3bSSukadev Bhattiprolu    "EventName": "PM_DPTEG_FROM_L31_SHR",
7972a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L3 on the same chip due to a data side request",
7982a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
7992a81fa3bSSukadev Bhattiprolu  },
800835e5bd9SJames Clark  {
8012a81fa3bSSukadev Bhattiprolu    "EventCode": "0x50a8",
8022a81fa3bSSukadev Bhattiprolu    "EventName": "PM_EAT_FORCE_MISPRED",
8032a81fa3bSSukadev Bhattiprolu    "BriefDescription": "XL-form branch was mispredicted due to the predicted target address missing from EAT. The EAT forces a mispredict in this case since there is no predicated target to validate. This is a rare case that may occur when the EAT is full and a branch is issue",
8042a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
8052a81fa3bSSukadev Bhattiprolu  },
806835e5bd9SJames Clark  {
8072a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4084",
8082a81fa3bSSukadev Bhattiprolu    "EventName": "PM_EAT_FULL_CYC",
8092a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Cycles No room in EAT",
8102a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Cycles No room in EATSet on bank conflict and case where no ibuffers available"
8112a81fa3bSSukadev Bhattiprolu  },
812835e5bd9SJames Clark  {
8132a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2080",
8142a81fa3bSSukadev Bhattiprolu    "EventName": "PM_EE_OFF_EXT_INT",
8152a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Ee off and external interrupt",
8162a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
8172a81fa3bSSukadev Bhattiprolu  },
818835e5bd9SJames Clark  {
8192a81fa3bSSukadev Bhattiprolu    "EventCode": "0x20b4",
8202a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FAV_TBEGIN",
8212a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Dispatch time Favored tbegin",
8222a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
8232a81fa3bSSukadev Bhattiprolu  },
824835e5bd9SJames Clark  {
8252a81fa3bSSukadev Bhattiprolu    "EventCode": "0x100f4",
8262a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FLOP",
8272a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Floating Point Operation Finished",
8282a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Floating Point Operations Finished"
8292a81fa3bSSukadev Bhattiprolu  },
830835e5bd9SJames Clark  {
8312a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa0ae",
8322a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FLOP_SUM_SCALAR",
8332a81fa3bSSukadev Bhattiprolu    "BriefDescription": "flops summary scalar instructions",
8342a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
8352a81fa3bSSukadev Bhattiprolu  },
836835e5bd9SJames Clark  {
8372a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa0ac",
8382a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FLOP_SUM_VEC",
8392a81fa3bSSukadev Bhattiprolu    "BriefDescription": "flops summary vector instructions",
8402a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
8412a81fa3bSSukadev Bhattiprolu  },
842835e5bd9SJames Clark  {
8432a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2084",
8442a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FLUSH_BR_MPRED",
8452a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Flush caused by branch mispredict",
8462a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
8472a81fa3bSSukadev Bhattiprolu  },
848835e5bd9SJames Clark  {
8492a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2082",
8502a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FLUSH_DISP",
8512a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Dispatch flush",
8522a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
8532a81fa3bSSukadev Bhattiprolu  },
854835e5bd9SJames Clark  {
8552a81fa3bSSukadev Bhattiprolu    "EventCode": "0x208c",
8562a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FLUSH_DISP_SB",
8572a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Dispatch Flush: Scoreboard",
8582a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
8592a81fa3bSSukadev Bhattiprolu  },
860835e5bd9SJames Clark  {
8612a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2088",
8622a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FLUSH_DISP_SYNC",
8632a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Dispatch Flush: Sync",
8642a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
8652a81fa3bSSukadev Bhattiprolu  },
866835e5bd9SJames Clark  {
8672a81fa3bSSukadev Bhattiprolu    "EventCode": "0x208a",
8682a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FLUSH_DISP_TLBIE",
8692a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Dispatch Flush: TLBIE",
8702a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
8712a81fa3bSSukadev Bhattiprolu  },
872835e5bd9SJames Clark  {
8732a81fa3bSSukadev Bhattiprolu    "EventCode": "0x208e",
8742a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FLUSH_LSU",
8752a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Flush initiated by LSU",
8762a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
8772a81fa3bSSukadev Bhattiprolu  },
878835e5bd9SJames Clark  {
8792a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2086",
8802a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FLUSH_PARTIAL",
8812a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Partial flush",
8822a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
8832a81fa3bSSukadev Bhattiprolu  },
884835e5bd9SJames Clark  {
8852a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa0b0",
8862a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FPU0_FCONV",
8872a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Convert instruction executed",
8882a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
8892a81fa3bSSukadev Bhattiprolu  },
890835e5bd9SJames Clark  {
8912a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa0b8",
8922a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FPU0_FEST",
8932a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Estimate instruction executed",
8942a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
8952a81fa3bSSukadev Bhattiprolu  },
896835e5bd9SJames Clark  {
8972a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa0b4",
8982a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FPU0_FRSP",
8992a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Round to single precision instruction executed",
9002a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
9012a81fa3bSSukadev Bhattiprolu  },
902835e5bd9SJames Clark  {
9032a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa0b2",
9042a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FPU1_FCONV",
9052a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Convert instruction executed",
9062a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
9072a81fa3bSSukadev Bhattiprolu  },
908835e5bd9SJames Clark  {
9092a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa0ba",
9102a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FPU1_FEST",
9112a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Estimate instruction executed",
9122a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
9132a81fa3bSSukadev Bhattiprolu  },
914835e5bd9SJames Clark  {
9152a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa0b6",
9162a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FPU1_FRSP",
9172a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Round to single precision instruction executed",
9182a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
9192a81fa3bSSukadev Bhattiprolu  },
920835e5bd9SJames Clark  {
9212a81fa3bSSukadev Bhattiprolu    "EventCode": "0x50b0",
9222a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FUSION_TOC_GRP0_1",
9232a81fa3bSSukadev Bhattiprolu    "BriefDescription": "One pair of instructions fused with TOC in Group0",
9242a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
9252a81fa3bSSukadev Bhattiprolu  },
926835e5bd9SJames Clark  {
9272a81fa3bSSukadev Bhattiprolu    "EventCode": "0x50ae",
9282a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FUSION_TOC_GRP0_2",
9292a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Two pairs of instructions fused with TOCin Group0",
9302a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
9312a81fa3bSSukadev Bhattiprolu  },
932835e5bd9SJames Clark  {
9332a81fa3bSSukadev Bhattiprolu    "EventCode": "0x50ac",
9342a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FUSION_TOC_GRP0_3",
9352a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Three pairs of instructions fused with TOC in Group0",
9362a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
9372a81fa3bSSukadev Bhattiprolu  },
938835e5bd9SJames Clark  {
9392a81fa3bSSukadev Bhattiprolu    "EventCode": "0x50b2",
9402a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FUSION_TOC_GRP1_1",
9412a81fa3bSSukadev Bhattiprolu    "BriefDescription": "One pair of instructions fused with TOX in Group1",
9422a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
9432a81fa3bSSukadev Bhattiprolu  },
944835e5bd9SJames Clark  {
9452a81fa3bSSukadev Bhattiprolu    "EventCode": "0x50b8",
9462a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FUSION_VSX_GRP0_1",
9472a81fa3bSSukadev Bhattiprolu    "BriefDescription": "One pair of instructions fused with VSX in Group0",
9482a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
9492a81fa3bSSukadev Bhattiprolu  },
950835e5bd9SJames Clark  {
9512a81fa3bSSukadev Bhattiprolu    "EventCode": "0x50b6",
9522a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FUSION_VSX_GRP0_2",
9532a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Two pairs of instructions fused with VSX in Group0",
9542a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
9552a81fa3bSSukadev Bhattiprolu  },
956835e5bd9SJames Clark  {
9572a81fa3bSSukadev Bhattiprolu    "EventCode": "0x50b4",
9582a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FUSION_VSX_GRP0_3",
9592a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Three pairs of instructions fused with VSX in Group0",
9602a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
9612a81fa3bSSukadev Bhattiprolu  },
962835e5bd9SJames Clark  {
9632a81fa3bSSukadev Bhattiprolu    "EventCode": "0x50ba",
9642a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FUSION_VSX_GRP1_1",
9652a81fa3bSSukadev Bhattiprolu    "BriefDescription": "One pair of instructions fused with VSX in Group1",
9662a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
9672a81fa3bSSukadev Bhattiprolu  },
968835e5bd9SJames Clark  {
9692a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3000e",
9702a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FXU0_BUSY_FXU1_IDLE",
9712a81fa3bSSukadev Bhattiprolu    "BriefDescription": "fxu0 busy and fxu1 idle",
9722a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
9732a81fa3bSSukadev Bhattiprolu  },
974835e5bd9SJames Clark  {
9752a81fa3bSSukadev Bhattiprolu    "EventCode": "0x10004",
9762a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FXU0_FIN",
9772a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The fixed point unit Unit 0 finished an instruction. Instructions that finish may not necessary complete",
9782a81fa3bSSukadev Bhattiprolu    "PublicDescription": "FXU0 Finished"
9792a81fa3bSSukadev Bhattiprolu  },
980835e5bd9SJames Clark  {
9812a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4000e",
9822a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FXU1_BUSY_FXU0_IDLE",
9832a81fa3bSSukadev Bhattiprolu    "BriefDescription": "fxu0 idle and fxu1 busy",
9842a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
9852a81fa3bSSukadev Bhattiprolu  },
986835e5bd9SJames Clark  {
9872a81fa3bSSukadev Bhattiprolu    "EventCode": "0x40004",
9882a81fa3bSSukadev Bhattiprolu    "EventName": "PM_FXU1_FIN",
9892a81fa3bSSukadev Bhattiprolu    "BriefDescription": "FXU1 Finished",
9902a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
9912a81fa3bSSukadev Bhattiprolu  },
992835e5bd9SJames Clark  {
9932a81fa3bSSukadev Bhattiprolu    "EventCode": "0x20008",
9942a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GCT_EMPTY_CYC",
9952a81fa3bSSukadev Bhattiprolu    "BriefDescription": "No itags assigned either thread (GCT Empty)",
9962a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
9972a81fa3bSSukadev Bhattiprolu  },
998835e5bd9SJames Clark  {
9992a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30a4",
10002a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GCT_MERGE",
10012a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Group dispatched on a merged GCT empty. GCT entries can be merged only within the same thread",
10022a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
10032a81fa3bSSukadev Bhattiprolu  },
1004835e5bd9SJames Clark  {
10052a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4d01e",
10062a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GCT_NOSLOT_BR_MPRED",
10072a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Gct empty for this thread due to branch mispred",
10082a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
10092a81fa3bSSukadev Bhattiprolu  },
1010835e5bd9SJames Clark  {
10112a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4d01a",
10122a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GCT_NOSLOT_BR_MPRED_ICMISS",
10132a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Gct empty for this thread due to Icache Miss and branch mispred",
10142a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
10152a81fa3bSSukadev Bhattiprolu  },
1016835e5bd9SJames Clark  {
10172a81fa3bSSukadev Bhattiprolu    "EventCode": "0x100f8",
10182a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GCT_NOSLOT_CYC",
10192a81fa3bSSukadev Bhattiprolu    "BriefDescription": "No itags assigned",
10202a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Pipeline empty (No itags assigned , no GCT slots used)"
10212a81fa3bSSukadev Bhattiprolu  },
1022835e5bd9SJames Clark  {
10232a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2d01e",
10242a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GCT_NOSLOT_DISP_HELD_ISSQ",
10252a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Gct empty for this thread due to dispatch hold on this thread due to Issue q full",
10262a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
10272a81fa3bSSukadev Bhattiprolu  },
1028835e5bd9SJames Clark  {
10292a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4d01c",
10302a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GCT_NOSLOT_DISP_HELD_MAP",
10312a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Gct empty for this thread due to dispatch hold on this thread due to Mapper full",
10322a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
10332a81fa3bSSukadev Bhattiprolu  },
1034835e5bd9SJames Clark  {
10352a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2e010",
10362a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GCT_NOSLOT_DISP_HELD_OTHER",
10372a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Gct empty for this thread due to dispatch hold on this thread due to sync",
10382a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
10392a81fa3bSSukadev Bhattiprolu  },
1040835e5bd9SJames Clark  {
10412a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2d01c",
10422a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GCT_NOSLOT_DISP_HELD_SRQ",
10432a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Gct empty for this thread due to dispatch hold on this thread due to SRQ full",
10442a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
10452a81fa3bSSukadev Bhattiprolu  },
1046835e5bd9SJames Clark  {
10472a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4e010",
10482a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GCT_NOSLOT_IC_L3MISS",
1049*774f2c08SColin Ian King    "BriefDescription": "Gct empty for this thread due to icache l3 miss",
10502a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
10512a81fa3bSSukadev Bhattiprolu  },
1052835e5bd9SJames Clark  {
10532a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2d01a",
10542a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GCT_NOSLOT_IC_MISS",
10552a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Gct empty for this thread due to Icache Miss",
10562a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
10572a81fa3bSSukadev Bhattiprolu  },
1058835e5bd9SJames Clark  {
10592a81fa3bSSukadev Bhattiprolu    "EventCode": "0x20a2",
10602a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GCT_UTIL_11_14_ENTRIES",
10612a81fa3bSSukadev Bhattiprolu    "BriefDescription": "GCT Utilization 11-14 entries",
10622a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
10632a81fa3bSSukadev Bhattiprolu  },
1064835e5bd9SJames Clark  {
10652a81fa3bSSukadev Bhattiprolu    "EventCode": "0x20a4",
10662a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GCT_UTIL_15_17_ENTRIES",
10672a81fa3bSSukadev Bhattiprolu    "BriefDescription": "GCT Utilization 15-17 entries",
10682a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
10692a81fa3bSSukadev Bhattiprolu  },
1070835e5bd9SJames Clark  {
10712a81fa3bSSukadev Bhattiprolu    "EventCode": "0x20a6",
10722a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GCT_UTIL_18_ENTRIES",
10732a81fa3bSSukadev Bhattiprolu    "BriefDescription": "GCT Utilization 18+ entries",
10742a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
10752a81fa3bSSukadev Bhattiprolu  },
1076835e5bd9SJames Clark  {
10772a81fa3bSSukadev Bhattiprolu    "EventCode": "0x209c",
10782a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GCT_UTIL_1_2_ENTRIES",
10792a81fa3bSSukadev Bhattiprolu    "BriefDescription": "GCT Utilization 1-2 entries",
10802a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
10812a81fa3bSSukadev Bhattiprolu  },
1082835e5bd9SJames Clark  {
10832a81fa3bSSukadev Bhattiprolu    "EventCode": "0x209e",
10842a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GCT_UTIL_3_6_ENTRIES",
10852a81fa3bSSukadev Bhattiprolu    "BriefDescription": "GCT Utilization 3-6 entries",
10862a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
10872a81fa3bSSukadev Bhattiprolu  },
1088835e5bd9SJames Clark  {
10892a81fa3bSSukadev Bhattiprolu    "EventCode": "0x20a0",
10902a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GCT_UTIL_7_10_ENTRIES",
10912a81fa3bSSukadev Bhattiprolu    "BriefDescription": "GCT Utilization 7-10 entries",
10922a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
10932a81fa3bSSukadev Bhattiprolu  },
1094835e5bd9SJames Clark  {
10952a81fa3bSSukadev Bhattiprolu    "EventCode": "0x1000a",
10962a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GRP_BR_MPRED_NONSPEC",
10972a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Group experienced non-speculative branch redirect",
10982a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Group experienced Non-speculative br mispredicct"
10992a81fa3bSSukadev Bhattiprolu  },
1100835e5bd9SJames Clark  {
11012a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30004",
11022a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GRP_CMPL",
11032a81fa3bSSukadev Bhattiprolu    "BriefDescription": "group completed",
11042a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
11052a81fa3bSSukadev Bhattiprolu  },
1106835e5bd9SJames Clark  {
11072a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3000a",
11082a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GRP_DISP",
11092a81fa3bSSukadev Bhattiprolu    "BriefDescription": "group dispatch",
11102a81fa3bSSukadev Bhattiprolu    "PublicDescription": "dispatch_success (Group Dispatched)"
11112a81fa3bSSukadev Bhattiprolu  },
1112835e5bd9SJames Clark  {
11132a81fa3bSSukadev Bhattiprolu    "EventCode": "0x1000c",
11142a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GRP_IC_MISS_NONSPEC",
11152a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Group experienced non-speculative I cache miss",
11162a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Group experi enced Non-specu lative I cache miss"
11172a81fa3bSSukadev Bhattiprolu  },
1118835e5bd9SJames Clark  {
11192a81fa3bSSukadev Bhattiprolu    "EventCode": "0x10130",
11202a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GRP_MRK",
11212a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Instruction Marked",
11222a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Instruction marked in idu"
11232a81fa3bSSukadev Bhattiprolu  },
1124835e5bd9SJames Clark  {
11252a81fa3bSSukadev Bhattiprolu    "EventCode": "0x509c",
11262a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GRP_NON_FULL_GROUP",
11272a81fa3bSSukadev Bhattiprolu    "BriefDescription": "GROUPs where we did not have 6 non branch instructions in the group(ST mode), in SMT mode 3 non branches",
11282a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
11292a81fa3bSSukadev Bhattiprolu  },
1130835e5bd9SJames Clark  {
11312a81fa3bSSukadev Bhattiprolu    "EventCode": "0x50a4",
11322a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GRP_TERM_2ND_BRANCH",
11332a81fa3bSSukadev Bhattiprolu    "BriefDescription": "There were enough instructions in the Ibuffer, but 2nd branch ends group",
11342a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
11352a81fa3bSSukadev Bhattiprolu  },
1136835e5bd9SJames Clark  {
11372a81fa3bSSukadev Bhattiprolu    "EventCode": "0x50a6",
11382a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GRP_TERM_FPU_AFTER_BR",
11392a81fa3bSSukadev Bhattiprolu    "BriefDescription": "There were enough instructions in the Ibuffer, but FPU OP IN same group after a branch terminates a group, cant do partial flushes",
11402a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
11412a81fa3bSSukadev Bhattiprolu  },
1142835e5bd9SJames Clark  {
11432a81fa3bSSukadev Bhattiprolu    "EventCode": "0x509e",
11442a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GRP_TERM_NOINST",
11452a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Do not fill every slot in the group, Not enough instructions in the Ibuffer. This includes cases where the group started with enough instructions, but some got knocked out by a cache miss or branch redirect (which would also empty the Ibuffer)",
11462a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
11472a81fa3bSSukadev Bhattiprolu  },
1148835e5bd9SJames Clark  {
11492a81fa3bSSukadev Bhattiprolu    "EventCode": "0x50a0",
11502a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GRP_TERM_OTHER",
11512a81fa3bSSukadev Bhattiprolu    "BriefDescription": "There were enough instructions in the Ibuffer, but the group terminated early for some other reason, most likely due to a First or Last",
11522a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
11532a81fa3bSSukadev Bhattiprolu  },
1154835e5bd9SJames Clark  {
11552a81fa3bSSukadev Bhattiprolu    "EventCode": "0x50a2",
11562a81fa3bSSukadev Bhattiprolu    "EventName": "PM_GRP_TERM_SLOT_LIMIT",
11572a81fa3bSSukadev Bhattiprolu    "BriefDescription": "There were enough instructions in the Ibuffer, but 3 src RA/RB/RC , 2 way crack caused a group termination",
11582a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
11592a81fa3bSSukadev Bhattiprolu  },
1160835e5bd9SJames Clark  {
11612a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4086",
11622a81fa3bSSukadev Bhattiprolu    "EventName": "PM_IBUF_FULL_CYC",
11632a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Cycles No room in ibuff",
11642a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Cycles No room in ibufffully qualified transfer (if5 valid)"
11652a81fa3bSSukadev Bhattiprolu  },
1166835e5bd9SJames Clark  {
11672a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4098",
11682a81fa3bSSukadev Bhattiprolu    "EventName": "PM_IC_DEMAND_L2_BHT_REDIRECT",
11692a81fa3bSSukadev Bhattiprolu    "BriefDescription": "L2 I cache demand request due to BHT redirect, branch redirect ( 2 bubbles 3 cycles)",
11702a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
11712a81fa3bSSukadev Bhattiprolu  },
1172835e5bd9SJames Clark  {
11732a81fa3bSSukadev Bhattiprolu    "EventCode": "0x409a",
11742a81fa3bSSukadev Bhattiprolu    "EventName": "PM_IC_DEMAND_L2_BR_REDIRECT",
11752a81fa3bSSukadev Bhattiprolu    "BriefDescription": "L2 I cache demand request due to branch Mispredict ( 15 cycle path)",
11762a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
11772a81fa3bSSukadev Bhattiprolu  },
1178835e5bd9SJames Clark  {
11792a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4088",
11802a81fa3bSSukadev Bhattiprolu    "EventName": "PM_IC_DEMAND_REQ",
11812a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Demand Instruction fetch request",
11822a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
11832a81fa3bSSukadev Bhattiprolu  },
1184835e5bd9SJames Clark  {
11852a81fa3bSSukadev Bhattiprolu    "EventCode": "0x508a",
11862a81fa3bSSukadev Bhattiprolu    "EventName": "PM_IC_INVALIDATE",
11872a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Ic line invalidated",
11882a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
11892a81fa3bSSukadev Bhattiprolu  },
1190835e5bd9SJames Clark  {
11912a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4092",
11922a81fa3bSSukadev Bhattiprolu    "EventName": "PM_IC_PREF_CANCEL_HIT",
11932a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Prefetch Canceled due to icache hit",
11942a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
11952a81fa3bSSukadev Bhattiprolu  },
1196835e5bd9SJames Clark  {
11972a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4094",
11982a81fa3bSSukadev Bhattiprolu    "EventName": "PM_IC_PREF_CANCEL_L2",
11992a81fa3bSSukadev Bhattiprolu    "BriefDescription": "L2 Squashed request",
12002a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
12012a81fa3bSSukadev Bhattiprolu  },
1202835e5bd9SJames Clark  {
12032a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4090",
12042a81fa3bSSukadev Bhattiprolu    "EventName": "PM_IC_PREF_CANCEL_PAGE",
12052a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Prefetch Canceled due to page boundary",
12062a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
12072a81fa3bSSukadev Bhattiprolu  },
1208835e5bd9SJames Clark  {
12092a81fa3bSSukadev Bhattiprolu    "EventCode": "0x408a",
12102a81fa3bSSukadev Bhattiprolu    "EventName": "PM_IC_PREF_REQ",
12112a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Instruction prefetch requests",
12122a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
12132a81fa3bSSukadev Bhattiprolu  },
1214835e5bd9SJames Clark  {
12152a81fa3bSSukadev Bhattiprolu    "EventCode": "0x408e",
12162a81fa3bSSukadev Bhattiprolu    "EventName": "PM_IC_PREF_WRITE",
12172a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Instruction prefetch written into IL1",
12182a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
12192a81fa3bSSukadev Bhattiprolu  },
1220835e5bd9SJames Clark  {
12212a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4096",
12222a81fa3bSSukadev Bhattiprolu    "EventName": "PM_IC_RELOAD_PRIVATE",
12232a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Reloading line was brought in private for a specific thread. Most lines are brought in shared for all eight thrreads. If RA does not match then invalidates and then brings it shared to other thread. In P7 line brought in private , then line was invalidat",
12242a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
12252a81fa3bSSukadev Bhattiprolu  },
1226835e5bd9SJames Clark  {
12272a81fa3bSSukadev Bhattiprolu    "EventCode": "0x5088",
12282a81fa3bSSukadev Bhattiprolu    "EventName": "PM_IFU_L2_TOUCH",
12292a81fa3bSSukadev Bhattiprolu    "BriefDescription": "L2 touch to update MRU on a line",
12302a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
12312a81fa3bSSukadev Bhattiprolu  },
1232835e5bd9SJames Clark  {
12332a81fa3bSSukadev Bhattiprolu    "EventCode": "0x514050",
12342a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_CHIP_PUMP_CPRED",
12352a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Initial and Final Pump Scope was chip pump (prediction=correct) for instruction fetches and prefetches",
12362a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was chip pump (prediction=correct) for an instruction fetch"
12372a81fa3bSSukadev Bhattiprolu  },
1238835e5bd9SJames Clark  {
12392a81fa3bSSukadev Bhattiprolu    "EventCode": "0x544048",
12402a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_DL2L3_MOD",
12412a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to instruction fetches and prefetches",
12422a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
12432a81fa3bSSukadev Bhattiprolu  },
1244835e5bd9SJames Clark  {
12452a81fa3bSSukadev Bhattiprolu    "EventCode": "0x534048",
12462a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_DL2L3_SHR",
12472a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to instruction fetches and prefetches",
12482a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
12492a81fa3bSSukadev Bhattiprolu  },
1250835e5bd9SJames Clark  {
12512a81fa3bSSukadev Bhattiprolu    "EventCode": "0x53404c",
12522a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_DL4",
12532a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to instruction fetches and prefetches",
12542a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a different Node or Group (Distant) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
12552a81fa3bSSukadev Bhattiprolu  },
1256835e5bd9SJames Clark  {
12572a81fa3bSSukadev Bhattiprolu    "EventCode": "0x54404c",
12582a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_DMEM",
12592a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded from another chip's memory on the same Node or Group (Distant) due to instruction fetches and prefetches",
12602a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded from another chip's memory on the same Node or Group (Distant) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
12612a81fa3bSSukadev Bhattiprolu  },
1262835e5bd9SJames Clark  {
12632a81fa3bSSukadev Bhattiprolu    "EventCode": "0x514042",
12642a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_L2",
12652a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 due to instruction fetches and prefetches",
12662a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
12672a81fa3bSSukadev Bhattiprolu  },
1268835e5bd9SJames Clark  {
12692a81fa3bSSukadev Bhattiprolu    "EventCode": "0x544046",
12702a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_L21_MOD",
12712a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's L2 on the same chip due to instruction fetches and prefetches",
12722a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's L2 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
12732a81fa3bSSukadev Bhattiprolu  },
1274835e5bd9SJames Clark  {
12752a81fa3bSSukadev Bhattiprolu    "EventCode": "0x534046",
12762a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_L21_SHR",
12772a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's L2 on the same chip due to instruction fetches and prefetches",
12782a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's L2 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
12792a81fa3bSSukadev Bhattiprolu  },
1280835e5bd9SJames Clark  {
12812a81fa3bSSukadev Bhattiprolu    "EventCode": "0x51404e",
12822a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_L2MISS",
128370830f97SSandipan Das    "BriefDescription": "The processor's Instruction cache was reloaded from a location other than the local core's L2 due to instruction fetches and prefetches",
128470830f97SSandipan Das    "PublicDescription": "The processor's Instruction cache was reloaded from a location other than the local core's L2 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
12852a81fa3bSSukadev Bhattiprolu  },
1286835e5bd9SJames Clark  {
12872a81fa3bSSukadev Bhattiprolu    "EventCode": "0x534040",
12882a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_L2_DISP_CONFLICT_LDHITST",
12892a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 with load hit store conflict due to instruction fetches and prefetches",
12902a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 with load hit store conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
12912a81fa3bSSukadev Bhattiprolu  },
1292835e5bd9SJames Clark  {
12932a81fa3bSSukadev Bhattiprolu    "EventCode": "0x544040",
12942a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_L2_DISP_CONFLICT_OTHER",
12952a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 with dispatch conflict due to instruction fetches and prefetches",
12962a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 with dispatch conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
12972a81fa3bSSukadev Bhattiprolu  },
1298835e5bd9SJames Clark  {
12992a81fa3bSSukadev Bhattiprolu    "EventCode": "0x524040",
13002a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_L2_MEPF",
13012a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state. due to instruction fetches and prefetches",
13022a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 hit without dispatch conflicts on Mepf state. due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
13032a81fa3bSSukadev Bhattiprolu  },
1304835e5bd9SJames Clark  {
13052a81fa3bSSukadev Bhattiprolu    "EventCode": "0x514040",
13062a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_L2_NO_CONFLICT",
13072a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded from local core's L2 without conflict due to instruction fetches and prefetches",
13082a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded from local core's L2 without conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
13092a81fa3bSSukadev Bhattiprolu  },
1310835e5bd9SJames Clark  {
13112a81fa3bSSukadev Bhattiprolu    "EventCode": "0x544042",
13122a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_L3",
13132a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 due to instruction fetches and prefetches",
13142a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
13152a81fa3bSSukadev Bhattiprolu  },
1316835e5bd9SJames Clark  {
13172a81fa3bSSukadev Bhattiprolu    "EventCode": "0x544044",
13182a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_L31_ECO_MOD",
13192a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to instruction fetches and prefetches",
13202a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
13212a81fa3bSSukadev Bhattiprolu  },
1322835e5bd9SJames Clark  {
13232a81fa3bSSukadev Bhattiprolu    "EventCode": "0x534044",
13242a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_L31_ECO_SHR",
13252a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to instruction fetches and prefetches",
13262a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
13272a81fa3bSSukadev Bhattiprolu  },
1328835e5bd9SJames Clark  {
13292a81fa3bSSukadev Bhattiprolu    "EventCode": "0x524044",
13302a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_L31_MOD",
13312a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's L3 on the same chip due to instruction fetches and prefetches",
13322a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
13332a81fa3bSSukadev Bhattiprolu  },
1334835e5bd9SJames Clark  {
13352a81fa3bSSukadev Bhattiprolu    "EventCode": "0x514046",
13362a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_L31_SHR",
13372a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's L3 on the same chip due to instruction fetches and prefetches",
13382a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
13392a81fa3bSSukadev Bhattiprolu  },
1340835e5bd9SJames Clark  {
13412a81fa3bSSukadev Bhattiprolu    "EventCode": "0x54404e",
13422a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_L3MISS_MOD",
134370830f97SSandipan Das    "BriefDescription": "The processor's Instruction cache was reloaded from a location other than the local core's L3 due to a instruction fetch",
134470830f97SSandipan Das    "PublicDescription": "The processor's Instruction cache was reloaded from a location other than the local core's L3 due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
13452a81fa3bSSukadev Bhattiprolu  },
1346835e5bd9SJames Clark  {
13472a81fa3bSSukadev Bhattiprolu    "EventCode": "0x534042",
13482a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_L3_DISP_CONFLICT",
13492a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 with dispatch conflict due to instruction fetches and prefetches",
13502a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 with dispatch conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
13512a81fa3bSSukadev Bhattiprolu  },
1352835e5bd9SJames Clark  {
13532a81fa3bSSukadev Bhattiprolu    "EventCode": "0x524042",
13542a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_L3_MEPF",
13552a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state. due to instruction fetches and prefetches",
13562a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 without dispatch conflicts hit on Mepf state. due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
13572a81fa3bSSukadev Bhattiprolu  },
1358835e5bd9SJames Clark  {
13592a81fa3bSSukadev Bhattiprolu    "EventCode": "0x514044",
13602a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_L3_NO_CONFLICT",
13612a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded from local core's L3 without conflict due to instruction fetches and prefetches",
13622a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded from local core's L3 without conflict due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
13632a81fa3bSSukadev Bhattiprolu  },
1364835e5bd9SJames Clark  {
13652a81fa3bSSukadev Bhattiprolu    "EventCode": "0x51404c",
13662a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_LL4",
13672a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded from the local chip's L4 cache due to instruction fetches and prefetches",
13682a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded from the local chip's L4 cache due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
13692a81fa3bSSukadev Bhattiprolu  },
1370835e5bd9SJames Clark  {
13712a81fa3bSSukadev Bhattiprolu    "EventCode": "0x524048",
13722a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_LMEM",
13732a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded from the local chip's Memory due to instruction fetches and prefetches",
13742a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded from the local chip's Memory due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
13752a81fa3bSSukadev Bhattiprolu  },
1376835e5bd9SJames Clark  {
13772a81fa3bSSukadev Bhattiprolu    "EventCode": "0x52404c",
13782a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_MEMORY",
13792a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded from a memory location including L4 from local remote or distant due to instruction fetches and prefetches",
13802a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded from a memory location including L4 from local remote or distant due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
13812a81fa3bSSukadev Bhattiprolu  },
1382835e5bd9SJames Clark  {
13832a81fa3bSSukadev Bhattiprolu    "EventCode": "0x54404a",
13842a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_OFF_CHIP_CACHE",
13852a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to instruction fetches and prefetches",
13862a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
13872a81fa3bSSukadev Bhattiprolu  },
1388835e5bd9SJames Clark  {
13892a81fa3bSSukadev Bhattiprolu    "EventCode": "0x514048",
13902a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_ON_CHIP_CACHE",
13912a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to instruction fetches and prefetches",
13922a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
13932a81fa3bSSukadev Bhattiprolu  },
1394835e5bd9SJames Clark  {
13952a81fa3bSSukadev Bhattiprolu    "EventCode": "0x524046",
13962a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_RL2L3_MOD",
13972a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to instruction fetches and prefetches",
13982a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
13992a81fa3bSSukadev Bhattiprolu  },
1400835e5bd9SJames Clark  {
14012a81fa3bSSukadev Bhattiprolu    "EventCode": "0x51404a",
14022a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_RL2L3_SHR",
14032a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to instruction fetches and prefetches",
14042a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
14052a81fa3bSSukadev Bhattiprolu  },
1406835e5bd9SJames Clark  {
14072a81fa3bSSukadev Bhattiprolu    "EventCode": "0x52404a",
14082a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_RL4",
14092a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to instruction fetches and prefetches",
14102a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded from another chip's L4 on the same Node or Group ( Remote) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
14112a81fa3bSSukadev Bhattiprolu  },
1412835e5bd9SJames Clark  {
14132a81fa3bSSukadev Bhattiprolu    "EventCode": "0x53404a",
14142a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_FROM_RMEM",
14152a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to instruction fetches and prefetches",
14162a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded from another chip's memory on the same Node or Group ( Remote) due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
14172a81fa3bSSukadev Bhattiprolu  },
1418835e5bd9SJames Clark  {
14192a81fa3bSSukadev Bhattiprolu    "EventCode": "0x524050",
14202a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_GRP_PUMP_CPRED",
14212a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Initial and Final Pump Scope was group pump (prediction=correct) for instruction fetches and prefetches",
14222a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was group pump for an instruction fetch"
14232a81fa3bSSukadev Bhattiprolu  },
1424835e5bd9SJames Clark  {
14252a81fa3bSSukadev Bhattiprolu    "EventCode": "0x524052",
14262a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_GRP_PUMP_MPRED",
14272a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Final Pump Scope (Group) ended up either larger or smaller than Initial Pump Scope for instruction fetches and prefetches",
14282a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope OR Final Pump Scope(Group) got data from source that was at smaller scope(Chip) Final pump was group pump and initial pump was chip or final and initial pump was gro"
14292a81fa3bSSukadev Bhattiprolu  },
1430835e5bd9SJames Clark  {
14312a81fa3bSSukadev Bhattiprolu    "EventCode": "0x514052",
14322a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_GRP_PUMP_MPRED_RTY",
14332a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for instruction fetches and prefetches",
14342a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Final Pump Scope(Group) to get data sourced, ended up larger than Initial Pump Scope (Chip) Final pump was group pump and initial pump was chip pumpfor an instruction fetch"
14352a81fa3bSSukadev Bhattiprolu  },
1436835e5bd9SJames Clark  {
14372a81fa3bSSukadev Bhattiprolu    "EventCode": "0x514054",
14382a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_PUMP_CPRED",
14392a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Pump prediction correct. Counts across all types of pumps for instruction fetches and prefetches",
14402a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Pump prediction correct. Counts across all types of pumpsfor an instruction fetch"
14412a81fa3bSSukadev Bhattiprolu  },
1442835e5bd9SJames Clark  {
14432a81fa3bSSukadev Bhattiprolu    "EventCode": "0x544052",
14442a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_PUMP_MPRED",
14452a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Pump misprediction. Counts across all types of pumps for instruction fetches and prefetches",
14462a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Pump Mis prediction Counts across all types of pumpsfor an instruction fetch"
14472a81fa3bSSukadev Bhattiprolu  },
1448835e5bd9SJames Clark  {
14492a81fa3bSSukadev Bhattiprolu    "EventCode": "0x534050",
14502a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_SYS_PUMP_CPRED",
14512a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Initial and Final Pump Scope was system pump (prediction=correct) for instruction fetches and prefetches",
14522a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was system pump for an instruction fetch"
14532a81fa3bSSukadev Bhattiprolu  },
1454835e5bd9SJames Clark  {
14552a81fa3bSSukadev Bhattiprolu    "EventCode": "0x534052",
14562a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_SYS_PUMP_MPRED",
14572a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Final Pump Scope (system) mispredicted. Either the original scope was too small (Chip/Group) or the original scope was System and it should have been smaller. Counts for instruction fetches and prefetches",
14582a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope(Chip/Group) OR Final Pump Scope(system) got data from source that was at smaller scope(Chip/group) Final pump was system pump and initial pump was chip or group or"
14592a81fa3bSSukadev Bhattiprolu  },
1460835e5bd9SJames Clark  {
14612a81fa3bSSukadev Bhattiprolu    "EventCode": "0x544050",
14622a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_ALL_SYS_PUMP_MPRED_RTY",
14632a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Final Pump Scope (system) ended up larger than Initial Pump Scope (Chip/Group) for instruction fetches and prefetches",
14642a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Final Pump Scope(system) to get data sourced, ended up larger than Initial Pump Scope (Chip or Group) for an instruction fetch"
14652a81fa3bSSukadev Bhattiprolu  },
1466835e5bd9SJames Clark  {
14672a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4080",
14682a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_FROM_L1",
14692a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Instruction fetches from L1",
14702a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
14712a81fa3bSSukadev Bhattiprolu  },
1472835e5bd9SJames Clark  {
14732a81fa3bSSukadev Bhattiprolu    "EventCode": "0x44046",
14742a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_FROM_L21_MOD",
14752a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's L2 on the same chip due to an instruction fetch (not prefetch)",
14762a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's L2 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
14772a81fa3bSSukadev Bhattiprolu  },
1478835e5bd9SJames Clark  {
14792a81fa3bSSukadev Bhattiprolu    "EventCode": "0x34046",
14802a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_FROM_L21_SHR",
14812a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's L2 on the same chip due to an instruction fetch (not prefetch)",
14822a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's L2 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
14832a81fa3bSSukadev Bhattiprolu  },
1484835e5bd9SJames Clark  {
14852a81fa3bSSukadev Bhattiprolu    "EventCode": "0x44044",
14862a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_FROM_L31_ECO_MOD",
14872a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to an instruction fetch (not prefetch)",
14882a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
14892a81fa3bSSukadev Bhattiprolu  },
1490835e5bd9SJames Clark  {
14912a81fa3bSSukadev Bhattiprolu    "EventCode": "0x34044",
14922a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_FROM_L31_ECO_SHR",
14932a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to an instruction fetch (not prefetch)",
14942a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
14952a81fa3bSSukadev Bhattiprolu  },
1496835e5bd9SJames Clark  {
14972a81fa3bSSukadev Bhattiprolu    "EventCode": "0x24044",
14982a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_FROM_L31_MOD",
14992a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's L3 on the same chip due to an instruction fetch (not prefetch)",
15002a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded with Modified (M) data from another core's L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
15012a81fa3bSSukadev Bhattiprolu  },
1502835e5bd9SJames Clark  {
15032a81fa3bSSukadev Bhattiprolu    "EventCode": "0x14046",
15042a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_FROM_L31_SHR",
15052a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's L3 on the same chip due to an instruction fetch (not prefetch)",
15062a81fa3bSSukadev Bhattiprolu    "PublicDescription": "The processor's Instruction cache was reloaded with Shared (S) data from another core's L3 on the same chip due to either an instruction fetch or instruction fetch plus prefetch if MMCR1[17] is 1"
15072a81fa3bSSukadev Bhattiprolu  },
1508835e5bd9SJames Clark  {
15092a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30016",
15102a81fa3bSSukadev Bhattiprolu    "EventName": "PM_INST_IMC_MATCH_DISP",
15112a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Matched Instructions Dispatched",
15122a81fa3bSSukadev Bhattiprolu    "PublicDescription": "IMC Matches dispatched"
15132a81fa3bSSukadev Bhattiprolu  },
1514835e5bd9SJames Clark  {
15152a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30014",
15162a81fa3bSSukadev Bhattiprolu    "EventName": "PM_IOPS_DISP",
15172a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Internal Operations dispatched",
15182a81fa3bSSukadev Bhattiprolu    "PublicDescription": "IOPS dispatched"
15192a81fa3bSSukadev Bhattiprolu  },
1520835e5bd9SJames Clark  {
15212a81fa3bSSukadev Bhattiprolu    "EventCode": "0x45046",
15222a81fa3bSSukadev Bhattiprolu    "EventName": "PM_IPTEG_FROM_L21_MOD",
15232a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L2 on the same chip due to a instruction side request",
15242a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
15252a81fa3bSSukadev Bhattiprolu  },
1526835e5bd9SJames Clark  {
15272a81fa3bSSukadev Bhattiprolu    "EventCode": "0x35046",
15282a81fa3bSSukadev Bhattiprolu    "EventName": "PM_IPTEG_FROM_L21_SHR",
15292a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L2 on the same chip due to a instruction side request",
15302a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
15312a81fa3bSSukadev Bhattiprolu  },
1532835e5bd9SJames Clark  {
15332a81fa3bSSukadev Bhattiprolu    "EventCode": "0x35040",
15342a81fa3bSSukadev Bhattiprolu    "EventName": "PM_IPTEG_FROM_L2_DISP_CONFLICT_LDHITST",
15352a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 with load hit store conflict due to a instruction side request",
15362a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
15372a81fa3bSSukadev Bhattiprolu  },
1538835e5bd9SJames Clark  {
15392a81fa3bSSukadev Bhattiprolu    "EventCode": "0x45040",
15402a81fa3bSSukadev Bhattiprolu    "EventName": "PM_IPTEG_FROM_L2_DISP_CONFLICT_OTHER",
15412a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 with dispatch conflict due to a instruction side request",
15422a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
15432a81fa3bSSukadev Bhattiprolu  },
1544835e5bd9SJames Clark  {
15452a81fa3bSSukadev Bhattiprolu    "EventCode": "0x45044",
15462a81fa3bSSukadev Bhattiprolu    "EventName": "PM_IPTEG_FROM_L31_ECO_MOD",
15472a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's ECO L3 on the same chip due to a instruction side request",
15482a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
15492a81fa3bSSukadev Bhattiprolu  },
1550835e5bd9SJames Clark  {
15512a81fa3bSSukadev Bhattiprolu    "EventCode": "0x35044",
15522a81fa3bSSukadev Bhattiprolu    "EventName": "PM_IPTEG_FROM_L31_ECO_SHR",
15532a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to a instruction side request",
15542a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
15552a81fa3bSSukadev Bhattiprolu  },
1556835e5bd9SJames Clark  {
15572a81fa3bSSukadev Bhattiprolu    "EventCode": "0x25044",
15582a81fa3bSSukadev Bhattiprolu    "EventName": "PM_IPTEG_FROM_L31_MOD",
15592a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L3 on the same chip due to a instruction side request",
15602a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
15612a81fa3bSSukadev Bhattiprolu  },
1562835e5bd9SJames Clark  {
15632a81fa3bSSukadev Bhattiprolu    "EventCode": "0x15046",
15642a81fa3bSSukadev Bhattiprolu    "EventName": "PM_IPTEG_FROM_L31_SHR",
15652a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L3 on the same chip due to a instruction side request",
15662a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
15672a81fa3bSSukadev Bhattiprolu  },
1568835e5bd9SJames Clark  {
15692a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4608e",
15702a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ISIDE_L2MEMACC",
15712a81fa3bSSukadev Bhattiprolu    "BriefDescription": "valid when first beat of data comes in for an i-side fetch where data came from mem(or L4)",
15722a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
15732a81fa3bSSukadev Bhattiprolu  },
1574835e5bd9SJames Clark  {
15752a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30ac",
15762a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ISU_REF_FX0",
15772a81fa3bSSukadev Bhattiprolu    "BriefDescription": "FX0 ISU reject",
15782a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
15792a81fa3bSSukadev Bhattiprolu  },
1580835e5bd9SJames Clark  {
15812a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30ae",
15822a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ISU_REF_FX1",
15832a81fa3bSSukadev Bhattiprolu    "BriefDescription": "FX1 ISU reject",
15842a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
15852a81fa3bSSukadev Bhattiprolu  },
1586835e5bd9SJames Clark  {
15872a81fa3bSSukadev Bhattiprolu    "EventCode": "0x38ac",
15882a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ISU_REF_FXU",
15892a81fa3bSSukadev Bhattiprolu    "BriefDescription": "FXU ISU reject from either pipe",
15902a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
15912a81fa3bSSukadev Bhattiprolu  },
1592835e5bd9SJames Clark  {
15932a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30b0",
15942a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ISU_REF_LS0",
15952a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS0 ISU reject",
15962a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
15972a81fa3bSSukadev Bhattiprolu  },
1598835e5bd9SJames Clark  {
15992a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30b2",
16002a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ISU_REF_LS1",
16012a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS1 ISU reject",
16022a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
16032a81fa3bSSukadev Bhattiprolu  },
1604835e5bd9SJames Clark  {
16052a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30b4",
16062a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ISU_REF_LS2",
16072a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS2 ISU reject",
16082a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
16092a81fa3bSSukadev Bhattiprolu  },
1610835e5bd9SJames Clark  {
16112a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30b6",
16122a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ISU_REF_LS3",
16132a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS3 ISU reject",
16142a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
16152a81fa3bSSukadev Bhattiprolu  },
1616835e5bd9SJames Clark  {
16172a81fa3bSSukadev Bhattiprolu    "EventCode": "0x309c",
16182a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ISU_REJECTS_ALL",
16192a81fa3bSSukadev Bhattiprolu    "BriefDescription": "All isu rejects could be more than 1 per cycle",
16202a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
16212a81fa3bSSukadev Bhattiprolu  },
1622835e5bd9SJames Clark  {
16232a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30a2",
16242a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ISU_REJECT_RES_NA",
16252a81fa3bSSukadev Bhattiprolu    "BriefDescription": "ISU reject due to resource not available",
16262a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
16272a81fa3bSSukadev Bhattiprolu  },
1628835e5bd9SJames Clark  {
16292a81fa3bSSukadev Bhattiprolu    "EventCode": "0x309e",
16302a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ISU_REJECT_SAR_BYPASS",
16312a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Reject because of SAR bypass",
16322a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
16332a81fa3bSSukadev Bhattiprolu  },
1634835e5bd9SJames Clark  {
16352a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30a0",
16362a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ISU_REJECT_SRC_NA",
16372a81fa3bSSukadev Bhattiprolu    "BriefDescription": "ISU reject due to source not available",
16382a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
16392a81fa3bSSukadev Bhattiprolu  },
1640835e5bd9SJames Clark  {
16412a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30a8",
16422a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ISU_REJ_VS0",
16432a81fa3bSSukadev Bhattiprolu    "BriefDescription": "VS0 ISU reject",
16442a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
16452a81fa3bSSukadev Bhattiprolu  },
1646835e5bd9SJames Clark  {
16472a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30aa",
16482a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ISU_REJ_VS1",
16492a81fa3bSSukadev Bhattiprolu    "BriefDescription": "VS1 ISU reject",
16502a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
16512a81fa3bSSukadev Bhattiprolu  },
1652835e5bd9SJames Clark  {
16532a81fa3bSSukadev Bhattiprolu    "EventCode": "0x38a8",
16542a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ISU_REJ_VSU",
16552a81fa3bSSukadev Bhattiprolu    "BriefDescription": "VSU ISU reject from either pipe",
16562a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
16572a81fa3bSSukadev Bhattiprolu  },
1658835e5bd9SJames Clark  {
16592a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30b8",
16602a81fa3bSSukadev Bhattiprolu    "EventName": "PM_ISYNC",
16612a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Isync count per thread",
16622a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
16632a81fa3bSSukadev Bhattiprolu  },
1664835e5bd9SJames Clark  {
16652a81fa3bSSukadev Bhattiprolu    "EventCode": "0x200301ea",
16662a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L1MISS_LAT_EXC_1024",
16672a81fa3bSSukadev Bhattiprolu    "BriefDescription": "L1 misses that took longer than 1024 cyles to resolve (miss to reload)",
16682a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Reload latency exceeded 1024 cyc"
16692a81fa3bSSukadev Bhattiprolu  },
1670835e5bd9SJames Clark  {
16712a81fa3bSSukadev Bhattiprolu    "EventCode": "0x200401ec",
16722a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L1MISS_LAT_EXC_2048",
16732a81fa3bSSukadev Bhattiprolu    "BriefDescription": "L1 misses that took longer than 2048 cyles to resolve (miss to reload)",
16742a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Reload latency exceeded 2048 cyc"
16752a81fa3bSSukadev Bhattiprolu  },
1676835e5bd9SJames Clark  {
16772a81fa3bSSukadev Bhattiprolu    "EventCode": "0x200101e8",
16782a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L1MISS_LAT_EXC_256",
16792a81fa3bSSukadev Bhattiprolu    "BriefDescription": "L1 misses that took longer than 256 cyles to resolve (miss to reload)",
16802a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Reload latency exceeded 256 cyc"
16812a81fa3bSSukadev Bhattiprolu  },
1682835e5bd9SJames Clark  {
16832a81fa3bSSukadev Bhattiprolu    "EventCode": "0x200201e6",
16842a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L1MISS_LAT_EXC_32",
16852a81fa3bSSukadev Bhattiprolu    "BriefDescription": "L1 misses that took longer than 32 cyles to resolve (miss to reload)",
16862a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Reload latency exceeded 32 cyc"
16872a81fa3bSSukadev Bhattiprolu  },
1688835e5bd9SJames Clark  {
16892a81fa3bSSukadev Bhattiprolu    "EventCode": "0x26086",
16902a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L1PF_L2MEMACC",
16912a81fa3bSSukadev Bhattiprolu    "BriefDescription": "valid when first beat of data comes in for an L1pref where data came from mem(or L4)",
16922a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
16932a81fa3bSSukadev Bhattiprolu  },
1694835e5bd9SJames Clark  {
16952a81fa3bSSukadev Bhattiprolu    "EventCode": "0x408c",
16962a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L1_DEMAND_WRITE",
16972a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Instruction Demand sectors wriittent into IL1",
16982a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
16992a81fa3bSSukadev Bhattiprolu  },
1700835e5bd9SJames Clark  {
17012a81fa3bSSukadev Bhattiprolu    "EventCode": "0x27084",
17022a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L2_CHIP_PUMP",
17032a81fa3bSSukadev Bhattiprolu    "BriefDescription": "RC requests that were local on chip pump attempts",
17042a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
17052a81fa3bSSukadev Bhattiprolu  },
1706835e5bd9SJames Clark  {
17072a81fa3bSSukadev Bhattiprolu    "EventCode": "0x27086",
17082a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L2_GROUP_PUMP",
17092a81fa3bSSukadev Bhattiprolu    "BriefDescription": "RC requests that were on Node Pump attempts",
17102a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
17112a81fa3bSSukadev Bhattiprolu  },
1712835e5bd9SJames Clark  {
17132a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3708a",
17142a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L2_RTY_ST",
17152a81fa3bSSukadev Bhattiprolu    "BriefDescription": "RC retries on PB for any store from core",
17162a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
17172a81fa3bSSukadev Bhattiprolu  },
1718835e5bd9SJames Clark  {
17192a81fa3bSSukadev Bhattiprolu    "EventCode": "0x17080",
17202a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L2_ST",
17212a81fa3bSSukadev Bhattiprolu    "BriefDescription": "All successful D-side store dispatches for this thread",
17222a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
17232a81fa3bSSukadev Bhattiprolu  },
1724835e5bd9SJames Clark  {
17252a81fa3bSSukadev Bhattiprolu    "EventCode": "0x17082",
17262a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L2_ST_MISS",
17272a81fa3bSSukadev Bhattiprolu    "BriefDescription": "All successful D-side store dispatches for this thread that were L2 Miss",
17282a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
17292a81fa3bSSukadev Bhattiprolu  },
1730835e5bd9SJames Clark  {
17312a81fa3bSSukadev Bhattiprolu    "EventCode": "0x1e05e",
17322a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L2_TM_REQ_ABORT",
17332a81fa3bSSukadev Bhattiprolu    "BriefDescription": "TM abort",
17342a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
17352a81fa3bSSukadev Bhattiprolu  },
1736835e5bd9SJames Clark  {
17372a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3e05c",
17382a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L2_TM_ST_ABORT_SISTER",
17392a81fa3bSSukadev Bhattiprolu    "BriefDescription": "TM marked store abort",
17402a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
17412a81fa3bSSukadev Bhattiprolu  },
1742835e5bd9SJames Clark  {
17432a81fa3bSSukadev Bhattiprolu    "EventCode": "0x819082",
17442a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_CI_USAGE",
17452a81fa3bSSukadev Bhattiprolu    "BriefDescription": "rotating sample of 16 CI or CO actives",
17462a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
17472a81fa3bSSukadev Bhattiprolu  },
1748835e5bd9SJames Clark  {
17492a81fa3bSSukadev Bhattiprolu    "EventCode": "0x83908b",
17502a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_CO0_ALLOC",
17512a81fa3bSSukadev Bhattiprolu    "BriefDescription": "lifetime, sample of CO machine 0 valid",
17522a81fa3bSSukadev Bhattiprolu    "PublicDescription": "0.0"
17532a81fa3bSSukadev Bhattiprolu  },
1754835e5bd9SJames Clark  {
17552a81fa3bSSukadev Bhattiprolu    "EventCode": "0x83908a",
17562a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_CO0_BUSY",
17572a81fa3bSSukadev Bhattiprolu    "BriefDescription": "lifetime, sample of CO machine 0 valid",
17582a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
17592a81fa3bSSukadev Bhattiprolu  },
1760835e5bd9SJames Clark  {
17612a81fa3bSSukadev Bhattiprolu    "EventCode": "0x28086",
17622a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_CO_L31",
17632a81fa3bSSukadev Bhattiprolu    "BriefDescription": "L3 CO to L3.1 OR of port 0 and 1 ( lossy)",
17642a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
17652a81fa3bSSukadev Bhattiprolu  },
1766835e5bd9SJames Clark  {
17672a81fa3bSSukadev Bhattiprolu    "EventCode": "0x28084",
17682a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_CO_MEM",
17692a81fa3bSSukadev Bhattiprolu    "BriefDescription": "L3 CO to memory OR of port 0 and 1 ( lossy)",
17702a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
17712a81fa3bSSukadev Bhattiprolu  },
1772835e5bd9SJames Clark  {
17732a81fa3bSSukadev Bhattiprolu    "EventCode": "0x1e052",
17742a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_LD_PREF",
17752a81fa3bSSukadev Bhattiprolu    "BriefDescription": "L3 Load Prefetches",
17762a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
17772a81fa3bSSukadev Bhattiprolu  },
1778835e5bd9SJames Clark  {
17792a81fa3bSSukadev Bhattiprolu    "EventCode": "0x84908d",
17802a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_PF0_ALLOC",
17812a81fa3bSSukadev Bhattiprolu    "BriefDescription": "lifetime, sample of PF machine 0 valid",
17822a81fa3bSSukadev Bhattiprolu    "PublicDescription": "0.0"
17832a81fa3bSSukadev Bhattiprolu  },
1784835e5bd9SJames Clark  {
17852a81fa3bSSukadev Bhattiprolu    "EventCode": "0x84908c",
17862a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_PF0_BUSY",
17872a81fa3bSSukadev Bhattiprolu    "BriefDescription": "lifetime, sample of PF machine 0 valid",
17882a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
17892a81fa3bSSukadev Bhattiprolu  },
1790835e5bd9SJames Clark  {
17912a81fa3bSSukadev Bhattiprolu    "EventCode": "0x18080",
17922a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_PF_MISS_L3",
17932a81fa3bSSukadev Bhattiprolu    "BriefDescription": "L3 Prefetch missed in L3",
17942a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
17952a81fa3bSSukadev Bhattiprolu  },
1796835e5bd9SJames Clark  {
17972a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3808a",
17982a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_PF_OFF_CHIP_CACHE",
17992a81fa3bSSukadev Bhattiprolu    "BriefDescription": "L3 Prefetch from Off chip cache",
18002a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
18012a81fa3bSSukadev Bhattiprolu  },
1802835e5bd9SJames Clark  {
18032a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4808e",
18042a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_PF_OFF_CHIP_MEM",
18052a81fa3bSSukadev Bhattiprolu    "BriefDescription": "L3 Prefetch from Off chip memory",
18062a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
18072a81fa3bSSukadev Bhattiprolu  },
1808835e5bd9SJames Clark  {
18092a81fa3bSSukadev Bhattiprolu    "EventCode": "0x38088",
18102a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_PF_ON_CHIP_CACHE",
18112a81fa3bSSukadev Bhattiprolu    "BriefDescription": "L3 Prefetch from On chip cache",
18122a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
18132a81fa3bSSukadev Bhattiprolu  },
1814835e5bd9SJames Clark  {
18152a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4808c",
18162a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_PF_ON_CHIP_MEM",
18172a81fa3bSSukadev Bhattiprolu    "BriefDescription": "L3 Prefetch from On chip memory",
18182a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
18192a81fa3bSSukadev Bhattiprolu  },
1820835e5bd9SJames Clark  {
18212a81fa3bSSukadev Bhattiprolu    "EventCode": "0x829084",
18222a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_PF_USAGE",
18232a81fa3bSSukadev Bhattiprolu    "BriefDescription": "rotating sample of 32 PF actives",
18242a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
18252a81fa3bSSukadev Bhattiprolu  },
1826835e5bd9SJames Clark  {
18272a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4e052",
18282a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_PREF_ALL",
18292a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Total HW L3 prefetches(Load+store)",
18302a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
18312a81fa3bSSukadev Bhattiprolu  },
1832835e5bd9SJames Clark  {
18332a81fa3bSSukadev Bhattiprolu    "EventCode": "0x84908f",
18342a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_RD0_ALLOC",
18352a81fa3bSSukadev Bhattiprolu    "BriefDescription": "lifetime, sample of RD machine 0 valid",
18362a81fa3bSSukadev Bhattiprolu    "PublicDescription": "0.0"
18372a81fa3bSSukadev Bhattiprolu  },
1838835e5bd9SJames Clark  {
18392a81fa3bSSukadev Bhattiprolu    "EventCode": "0x84908e",
18402a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_RD0_BUSY",
18412a81fa3bSSukadev Bhattiprolu    "BriefDescription": "lifetime, sample of RD machine 0 valid",
18422a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
18432a81fa3bSSukadev Bhattiprolu  },
1844835e5bd9SJames Clark  {
18452a81fa3bSSukadev Bhattiprolu    "EventCode": "0x829086",
18462a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_RD_USAGE",
18472a81fa3bSSukadev Bhattiprolu    "BriefDescription": "rotating sample of 16 RD actives",
18482a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
18492a81fa3bSSukadev Bhattiprolu  },
1850835e5bd9SJames Clark  {
18512a81fa3bSSukadev Bhattiprolu    "EventCode": "0x839089",
18522a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_SN0_ALLOC",
18532a81fa3bSSukadev Bhattiprolu    "BriefDescription": "lifetime, sample of snooper machine 0 valid",
18542a81fa3bSSukadev Bhattiprolu    "PublicDescription": "0.0"
18552a81fa3bSSukadev Bhattiprolu  },
1856835e5bd9SJames Clark  {
18572a81fa3bSSukadev Bhattiprolu    "EventCode": "0x839088",
18582a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_SN0_BUSY",
18592a81fa3bSSukadev Bhattiprolu    "BriefDescription": "lifetime, sample of snooper machine 0 valid",
18602a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
18612a81fa3bSSukadev Bhattiprolu  },
1862835e5bd9SJames Clark  {
18632a81fa3bSSukadev Bhattiprolu    "EventCode": "0x819080",
18642a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_SN_USAGE",
18652a81fa3bSSukadev Bhattiprolu    "BriefDescription": "rotating sample of 8 snoop valids",
18662a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
18672a81fa3bSSukadev Bhattiprolu  },
1868835e5bd9SJames Clark  {
18692a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2e052",
18702a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_ST_PREF",
18712a81fa3bSSukadev Bhattiprolu    "BriefDescription": "L3 store Prefetches",
18722a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
18732a81fa3bSSukadev Bhattiprolu  },
1874835e5bd9SJames Clark  {
18752a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3e052",
18762a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_SW_PREF",
18772a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Data stream touchto L3",
18782a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
18792a81fa3bSSukadev Bhattiprolu  },
1880835e5bd9SJames Clark  {
18812a81fa3bSSukadev Bhattiprolu    "EventCode": "0x18081",
18822a81fa3bSSukadev Bhattiprolu    "EventName": "PM_L3_WI0_ALLOC",
18832a81fa3bSSukadev Bhattiprolu    "BriefDescription": "lifetime, sample of Write Inject machine 0 valid",
18842a81fa3bSSukadev Bhattiprolu    "PublicDescription": "0.0"
18852a81fa3bSSukadev Bhattiprolu  },
1886835e5bd9SJames Clark  {
18872a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc080",
18882a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LD_REF_L1_LSU0",
18892a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS0 L1 D cache load references counted at finish, gated by reject",
18902a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS0 L1 D cache load references counted at finish, gated by rejectLSU0 L1 D cache load references"
18912a81fa3bSSukadev Bhattiprolu  },
1892835e5bd9SJames Clark  {
18932a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc082",
18942a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LD_REF_L1_LSU1",
18952a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS1 L1 D cache load references counted at finish, gated by reject",
18962a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS1 L1 D cache load references counted at finish, gated by rejectLSU1 L1 D cache load references"
18972a81fa3bSSukadev Bhattiprolu  },
1898835e5bd9SJames Clark  {
18992a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc094",
19002a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LD_REF_L1_LSU2",
19012a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS2 L1 D cache load references counted at finish, gated by reject",
19022a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS2 L1 D cache load references counted at finish, gated by reject42"
19032a81fa3bSSukadev Bhattiprolu  },
1904835e5bd9SJames Clark  {
19052a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc096",
19062a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LD_REF_L1_LSU3",
19072a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS3 L1 D cache load references counted at finish, gated by reject",
19082a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS3 L1 D cache load references counted at finish, gated by reject42"
19092a81fa3bSSukadev Bhattiprolu  },
1910835e5bd9SJames Clark  {
19112a81fa3bSSukadev Bhattiprolu    "EventCode": "0x509a",
19122a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LINK_STACK_INVALID_PTR",
19132a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A flush were LS ptr is invalid, results in a pop , A lot of interrupts between push and pops",
19142a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
19152a81fa3bSSukadev Bhattiprolu  },
1916835e5bd9SJames Clark  {
19172a81fa3bSSukadev Bhattiprolu    "EventCode": "0x5098",
19182a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LINK_STACK_WRONG_ADD_PRED",
19192a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Link stack predicts wrong address, because of link stack design limitation",
19202a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
19212a81fa3bSSukadev Bhattiprolu  },
1922835e5bd9SJames Clark  {
19232a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe080",
19242a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LS0_ERAT_MISS_PREF",
19252a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS0 Erat miss due to prefetch",
19262a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS0 Erat miss due to prefetch42"
19272a81fa3bSSukadev Bhattiprolu  },
1928835e5bd9SJames Clark  {
19292a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd0b8",
19302a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LS0_L1_PREF",
19312a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS0 L1 cache data prefetches",
19322a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS0 L1 cache data prefetches42"
19332a81fa3bSSukadev Bhattiprolu  },
1934835e5bd9SJames Clark  {
19352a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc098",
19362a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LS0_L1_SW_PREF",
19372a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Software L1 Prefetches, including SW Transient Prefetches",
19382a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Software L1 Prefetches, including SW Transient Prefetches42"
19392a81fa3bSSukadev Bhattiprolu  },
1940835e5bd9SJames Clark  {
19412a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe082",
19422a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LS1_ERAT_MISS_PREF",
19432a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS1 Erat miss due to prefetch",
19442a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS1 Erat miss due to prefetch42"
19452a81fa3bSSukadev Bhattiprolu  },
1946835e5bd9SJames Clark  {
19472a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd0ba",
19482a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LS1_L1_PREF",
19492a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS1 L1 cache data prefetches",
19502a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS1 L1 cache data prefetches42"
19512a81fa3bSSukadev Bhattiprolu  },
1952835e5bd9SJames Clark  {
19532a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc09a",
19542a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LS1_L1_SW_PREF",
19552a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Software L1 Prefetches, including SW Transient Prefetches",
19562a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Software L1 Prefetches, including SW Transient Prefetches42"
19572a81fa3bSSukadev Bhattiprolu  },
1958835e5bd9SJames Clark  {
19592a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc0b0",
19602a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU0_FLUSH_LRQ",
19612a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS0 Flush: LRQ",
19622a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS0 Flush: LRQLSU0 LRQ flushes"
19632a81fa3bSSukadev Bhattiprolu  },
1964835e5bd9SJames Clark  {
19652a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc0b8",
19662a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU0_FLUSH_SRQ",
19672a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS0 Flush: SRQ",
19682a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS0 Flush: SRQLSU0 SRQ lhs flushes"
19692a81fa3bSSukadev Bhattiprolu  },
1970835e5bd9SJames Clark  {
19712a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc0a4",
19722a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU0_FLUSH_ULD",
19732a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS0 Flush: Unaligned Load",
19742a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS0 Flush: Unaligned LoadLSU0 unaligned load flushes"
19752a81fa3bSSukadev Bhattiprolu  },
1976835e5bd9SJames Clark  {
19772a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc0ac",
19782a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU0_FLUSH_UST",
19792a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS0 Flush: Unaligned Store",
19802a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS0 Flush: Unaligned StoreLSU0 unaligned store flushes"
19812a81fa3bSSukadev Bhattiprolu  },
1982835e5bd9SJames Clark  {
19832a81fa3bSSukadev Bhattiprolu    "EventCode": "0xf088",
19842a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU0_L1_CAM_CANCEL",
19852a81fa3bSSukadev Bhattiprolu    "BriefDescription": "ls0 l1 tm cam cancel",
19862a81fa3bSSukadev Bhattiprolu    "PublicDescription": "ls0 l1 tm cam cancel42"
19872a81fa3bSSukadev Bhattiprolu  },
1988835e5bd9SJames Clark  {
19892a81fa3bSSukadev Bhattiprolu    "EventCode": "0x1e056",
19902a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU0_LARX_FIN",
19912a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Larx finished in LSU pipe0",
19922a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
19932a81fa3bSSukadev Bhattiprolu  },
1994835e5bd9SJames Clark  {
19952a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd08c",
19962a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU0_LMQ_LHR_MERGE",
19972a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS0 Load Merged with another cacheline request",
19982a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS0 Load Merged with another cacheline request42"
19992a81fa3bSSukadev Bhattiprolu  },
2000835e5bd9SJames Clark  {
20012a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc08c",
20022a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU0_NCLD",
20032a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS0 Non-cachable Loads counted at finish",
20042a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS0 Non-cachable Loads counted at finishLSU0 non-cacheable loads"
20052a81fa3bSSukadev Bhattiprolu  },
2006835e5bd9SJames Clark  {
20072a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe090",
20082a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU0_PRIMARY_ERAT_HIT",
20092a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Primary ERAT hit",
20102a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Primary ERAT hit42"
20112a81fa3bSSukadev Bhattiprolu  },
2012835e5bd9SJames Clark  {
20132a81fa3bSSukadev Bhattiprolu    "EventCode": "0x1e05a",
20142a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU0_REJECT",
20152a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LSU0 reject",
20162a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
20172a81fa3bSSukadev Bhattiprolu  },
2018835e5bd9SJames Clark  {
20192a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc09c",
20202a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU0_SRQ_STFWD",
20212a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS0 SRQ forwarded data to a load",
20222a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS0 SRQ forwarded data to a loadLSU0 SRQ store forwarded"
20232a81fa3bSSukadev Bhattiprolu  },
2024835e5bd9SJames Clark  {
20252a81fa3bSSukadev Bhattiprolu    "EventCode": "0xf084",
20262a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU0_STORE_REJECT",
20272a81fa3bSSukadev Bhattiprolu    "BriefDescription": "ls0 store reject",
20282a81fa3bSSukadev Bhattiprolu    "PublicDescription": "ls0 store reject42"
20292a81fa3bSSukadev Bhattiprolu  },
2030835e5bd9SJames Clark  {
20312a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe0a8",
20322a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU0_TMA_REQ_L2",
20332a81fa3bSSukadev Bhattiprolu    "BriefDescription": "addrs only req to L2 only on the first one,Indication that Load footprint is not expanding",
20342a81fa3bSSukadev Bhattiprolu    "PublicDescription": "addrs only req to L2 only on the first one,Indication that Load footprint is not expanding42"
20352a81fa3bSSukadev Bhattiprolu  },
2036835e5bd9SJames Clark  {
20372a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe098",
20382a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU0_TM_L1_HIT",
20392a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Load tm hit in L1",
20402a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Load tm hit in L142"
20412a81fa3bSSukadev Bhattiprolu  },
2042835e5bd9SJames Clark  {
20432a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe0a0",
20442a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU0_TM_L1_MISS",
20452a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Load tm L1 miss",
20462a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Load tm L1 miss42"
20472a81fa3bSSukadev Bhattiprolu  },
2048835e5bd9SJames Clark  {
20492a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc0b2",
20502a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU1_FLUSH_LRQ",
20512a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS1 Flush: LRQ",
20522a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS1 Flush: LRQLSU1 LRQ flushes"
20532a81fa3bSSukadev Bhattiprolu  },
2054835e5bd9SJames Clark  {
20552a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc0ba",
20562a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU1_FLUSH_SRQ",
20572a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS1 Flush: SRQ",
20582a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS1 Flush: SRQLSU1 SRQ lhs flushes"
20592a81fa3bSSukadev Bhattiprolu  },
2060835e5bd9SJames Clark  {
20612a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc0a6",
20622a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU1_FLUSH_ULD",
20632a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS 1 Flush: Unaligned Load",
20642a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS 1 Flush: Unaligned LoadLSU1 unaligned load flushes"
20652a81fa3bSSukadev Bhattiprolu  },
2066835e5bd9SJames Clark  {
20672a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc0ae",
20682a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU1_FLUSH_UST",
20692a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS1 Flush: Unaligned Store",
20702a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS1 Flush: Unaligned StoreLSU1 unaligned store flushes"
20712a81fa3bSSukadev Bhattiprolu  },
2072835e5bd9SJames Clark  {
20732a81fa3bSSukadev Bhattiprolu    "EventCode": "0xf08a",
20742a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU1_L1_CAM_CANCEL",
20752a81fa3bSSukadev Bhattiprolu    "BriefDescription": "ls1 l1 tm cam cancel",
20762a81fa3bSSukadev Bhattiprolu    "PublicDescription": "ls1 l1 tm cam cancel42"
20772a81fa3bSSukadev Bhattiprolu  },
2078835e5bd9SJames Clark  {
20792a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2e056",
20802a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU1_LARX_FIN",
20812a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Larx finished in LSU pipe1",
20822a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
20832a81fa3bSSukadev Bhattiprolu  },
2084835e5bd9SJames Clark  {
20852a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd08e",
20862a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU1_LMQ_LHR_MERGE",
20872a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS1 Load Merge with another cacheline request",
20882a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS1 Load Merge with another cacheline request42"
20892a81fa3bSSukadev Bhattiprolu  },
2090835e5bd9SJames Clark  {
20912a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc08e",
20922a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU1_NCLD",
20932a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS1 Non-cachable Loads counted at finish",
20942a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS1 Non-cachable Loads counted at finishLSU1 non-cacheable loads"
20952a81fa3bSSukadev Bhattiprolu  },
2096835e5bd9SJames Clark  {
20972a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe092",
20982a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU1_PRIMARY_ERAT_HIT",
20992a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Primary ERAT hit",
21002a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Primary ERAT hit42"
21012a81fa3bSSukadev Bhattiprolu  },
2102835e5bd9SJames Clark  {
21032a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2e05a",
21042a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU1_REJECT",
21052a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LSU1 reject",
21062a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
21072a81fa3bSSukadev Bhattiprolu  },
2108835e5bd9SJames Clark  {
21092a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc09e",
21102a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU1_SRQ_STFWD",
21112a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS1 SRQ forwarded data to a load",
21122a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS1 SRQ forwarded data to a loadLSU1 SRQ store forwarded"
21132a81fa3bSSukadev Bhattiprolu  },
2114835e5bd9SJames Clark  {
21152a81fa3bSSukadev Bhattiprolu    "EventCode": "0xf086",
21162a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU1_STORE_REJECT",
21172a81fa3bSSukadev Bhattiprolu    "BriefDescription": "ls1 store reject",
21182a81fa3bSSukadev Bhattiprolu    "PublicDescription": "ls1 store reject42"
21192a81fa3bSSukadev Bhattiprolu  },
2120835e5bd9SJames Clark  {
21212a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe0aa",
21222a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU1_TMA_REQ_L2",
21232a81fa3bSSukadev Bhattiprolu    "BriefDescription": "addrs only req to L2 only on the first one,Indication that Load footprint is not expanding",
21242a81fa3bSSukadev Bhattiprolu    "PublicDescription": "addrs only req to L2 only on the first one,Indication that Load footprint is not expanding42"
21252a81fa3bSSukadev Bhattiprolu  },
2126835e5bd9SJames Clark  {
21272a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe09a",
21282a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU1_TM_L1_HIT",
21292a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Load tm hit in L1",
21302a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Load tm hit in L142"
21312a81fa3bSSukadev Bhattiprolu  },
2132835e5bd9SJames Clark  {
21332a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe0a2",
21342a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU1_TM_L1_MISS",
21352a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Load tm L1 miss",
21362a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Load tm L1 miss42"
21372a81fa3bSSukadev Bhattiprolu  },
2138835e5bd9SJames Clark  {
21392a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc0b4",
21402a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU2_FLUSH_LRQ",
21412a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS02Flush: LRQ",
21422a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS02Flush: LRQ42"
21432a81fa3bSSukadev Bhattiprolu  },
2144835e5bd9SJames Clark  {
21452a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc0bc",
21462a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU2_FLUSH_SRQ",
21472a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS2 Flush: SRQ",
21482a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS2 Flush: SRQ42"
21492a81fa3bSSukadev Bhattiprolu  },
2150835e5bd9SJames Clark  {
21512a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc0a8",
21522a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU2_FLUSH_ULD",
21532a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS3 Flush: Unaligned Load",
21542a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS3 Flush: Unaligned Load42"
21552a81fa3bSSukadev Bhattiprolu  },
2156835e5bd9SJames Clark  {
21572a81fa3bSSukadev Bhattiprolu    "EventCode": "0xf08c",
21582a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU2_L1_CAM_CANCEL",
21592a81fa3bSSukadev Bhattiprolu    "BriefDescription": "ls2 l1 tm cam cancel",
21602a81fa3bSSukadev Bhattiprolu    "PublicDescription": "ls2 l1 tm cam cancel42"
21612a81fa3bSSukadev Bhattiprolu  },
2162835e5bd9SJames Clark  {
21632a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3e056",
21642a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU2_LARX_FIN",
21652a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Larx finished in LSU pipe2",
21662a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
21672a81fa3bSSukadev Bhattiprolu  },
2168835e5bd9SJames Clark  {
21692a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc084",
21702a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU2_LDF",
21712a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS2 Scalar Loads",
21722a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS2 Scalar Loads42"
21732a81fa3bSSukadev Bhattiprolu  },
2174835e5bd9SJames Clark  {
21752a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc088",
21762a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU2_LDX",
21772a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS0 Vector Loads",
21782a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS0 Vector Loads42"
21792a81fa3bSSukadev Bhattiprolu  },
2180835e5bd9SJames Clark  {
21812a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd090",
21822a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU2_LMQ_LHR_MERGE",
21832a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS0 Load Merged with another cacheline request",
21842a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS0 Load Merged with another cacheline request42"
21852a81fa3bSSukadev Bhattiprolu  },
2186835e5bd9SJames Clark  {
21872a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe094",
21882a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU2_PRIMARY_ERAT_HIT",
21892a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Primary ERAT hit",
21902a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Primary ERAT hit42"
21912a81fa3bSSukadev Bhattiprolu  },
2192835e5bd9SJames Clark  {
21932a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3e05a",
21942a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU2_REJECT",
21952a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LSU2 reject",
21962a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
21972a81fa3bSSukadev Bhattiprolu  },
2198835e5bd9SJames Clark  {
21992a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc0a0",
22002a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU2_SRQ_STFWD",
22012a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS2 SRQ forwarded data to a load",
22022a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS2 SRQ forwarded data to a load42"
22032a81fa3bSSukadev Bhattiprolu  },
2204835e5bd9SJames Clark  {
22052a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe0ac",
22062a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU2_TMA_REQ_L2",
22072a81fa3bSSukadev Bhattiprolu    "BriefDescription": "addrs only req to L2 only on the first one,Indication that Load footprint is not expanding",
22082a81fa3bSSukadev Bhattiprolu    "PublicDescription": "addrs only req to L2 only on the first one,Indication that Load footprint is not expanding42"
22092a81fa3bSSukadev Bhattiprolu  },
2210835e5bd9SJames Clark  {
22112a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe09c",
22122a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU2_TM_L1_HIT",
22132a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Load tm hit in L1",
22142a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Load tm hit in L142"
22152a81fa3bSSukadev Bhattiprolu  },
2216835e5bd9SJames Clark  {
22172a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe0a4",
22182a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU2_TM_L1_MISS",
22192a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Load tm L1 miss",
22202a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Load tm L1 miss42"
22212a81fa3bSSukadev Bhattiprolu  },
2222835e5bd9SJames Clark  {
22232a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc0b6",
22242a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU3_FLUSH_LRQ",
22252a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS3 Flush: LRQ",
22262a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS3 Flush: LRQ42"
22272a81fa3bSSukadev Bhattiprolu  },
2228835e5bd9SJames Clark  {
22292a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc0be",
22302a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU3_FLUSH_SRQ",
22312a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS13 Flush: SRQ",
22322a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS13 Flush: SRQ42"
22332a81fa3bSSukadev Bhattiprolu  },
2234835e5bd9SJames Clark  {
22352a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc0aa",
22362a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU3_FLUSH_ULD",
22372a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS 14Flush: Unaligned Load",
22382a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS 14Flush: Unaligned Load42"
22392a81fa3bSSukadev Bhattiprolu  },
2240835e5bd9SJames Clark  {
22412a81fa3bSSukadev Bhattiprolu    "EventCode": "0xf08e",
22422a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU3_L1_CAM_CANCEL",
22432a81fa3bSSukadev Bhattiprolu    "BriefDescription": "ls3 l1 tm cam cancel",
22442a81fa3bSSukadev Bhattiprolu    "PublicDescription": "ls3 l1 tm cam cancel42"
22452a81fa3bSSukadev Bhattiprolu  },
2246835e5bd9SJames Clark  {
22472a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4e056",
22482a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU3_LARX_FIN",
22492a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Larx finished in LSU pipe3",
22502a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
22512a81fa3bSSukadev Bhattiprolu  },
2252835e5bd9SJames Clark  {
22532a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc086",
22542a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU3_LDF",
22552a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS3 Scalar Loads",
22562a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS3 Scalar Loads 42"
22572a81fa3bSSukadev Bhattiprolu  },
2258835e5bd9SJames Clark  {
22592a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc08a",
22602a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU3_LDX",
22612a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS1 Vector Loads",
22622a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS1 Vector Loads42"
22632a81fa3bSSukadev Bhattiprolu  },
2264835e5bd9SJames Clark  {
22652a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd092",
22662a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU3_LMQ_LHR_MERGE",
22672a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS1 Load Merge with another cacheline request",
22682a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS1 Load Merge with another cacheline request42"
22692a81fa3bSSukadev Bhattiprolu  },
2270835e5bd9SJames Clark  {
22712a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe096",
22722a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU3_PRIMARY_ERAT_HIT",
22732a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Primary ERAT hit",
22742a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Primary ERAT hit42"
22752a81fa3bSSukadev Bhattiprolu  },
2276835e5bd9SJames Clark  {
22772a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4e05a",
22782a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU3_REJECT",
22792a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LSU3 reject",
22802a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
22812a81fa3bSSukadev Bhattiprolu  },
2282835e5bd9SJames Clark  {
22832a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc0a2",
22842a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU3_SRQ_STFWD",
22852a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LS3 SRQ forwarded data to a load",
22862a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LS3 SRQ forwarded data to a load42"
22872a81fa3bSSukadev Bhattiprolu  },
2288835e5bd9SJames Clark  {
22892a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe0ae",
22902a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU3_TMA_REQ_L2",
22912a81fa3bSSukadev Bhattiprolu    "BriefDescription": "addrs only req to L2 only on the first one,Indication that Load footprint is not expanding",
22922a81fa3bSSukadev Bhattiprolu    "PublicDescription": "addrs only req to L2 only on the first one,Indication that Load footprint is not expanding42"
22932a81fa3bSSukadev Bhattiprolu  },
2294835e5bd9SJames Clark  {
22952a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe09e",
22962a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU3_TM_L1_HIT",
22972a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Load tm hit in L1",
22982a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Load tm hit in L142"
22992a81fa3bSSukadev Bhattiprolu  },
2300835e5bd9SJames Clark  {
23012a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe0a6",
23022a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU3_TM_L1_MISS",
23032a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Load tm L1 miss",
23042a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Load tm L1 miss42"
23052a81fa3bSSukadev Bhattiprolu  },
2306835e5bd9SJames Clark  {
23072a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe880",
23082a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_ERAT_MISS_PREF",
23092a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Erat miss due to prefetch, on either pipe",
23102a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LSU"
23112a81fa3bSSukadev Bhattiprolu  },
2312835e5bd9SJames Clark  {
23132a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc8ac",
23142a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_FLUSH_UST",
23152a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Unaligned Store Flush on either pipe",
23162a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LSU"
23172a81fa3bSSukadev Bhattiprolu  },
2318835e5bd9SJames Clark  {
23192a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd0a4",
23202a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_FOUR_TABLEWALK_CYC",
23212a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Cycles when four tablewalks pending on this thread",
23222a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Cycles when four tablewalks pending on this thread42"
23232a81fa3bSSukadev Bhattiprolu  },
2324835e5bd9SJames Clark  {
23252a81fa3bSSukadev Bhattiprolu    "EventCode": "0x10066",
23262a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_FX_FIN",
23272a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LSU Finished a FX operation (up to 2 per cycle",
23282a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
23292a81fa3bSSukadev Bhattiprolu  },
2330835e5bd9SJames Clark  {
23312a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd8b8",
23322a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_L1_PREF",
23332a81fa3bSSukadev Bhattiprolu    "BriefDescription": "hw initiated , include sw streaming forms as well , include sw streams as a separate event",
23342a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LSU"
23352a81fa3bSSukadev Bhattiprolu  },
2336835e5bd9SJames Clark  {
23372a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc898",
23382a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_L1_SW_PREF",
23392a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Software L1 Prefetches, including SW Transient Prefetches, on both pipes",
23402a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LSU"
23412a81fa3bSSukadev Bhattiprolu  },
2342835e5bd9SJames Clark  {
23432a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc884",
23442a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_LDF",
23452a81fa3bSSukadev Bhattiprolu    "BriefDescription": "FPU loads only on LS2/LS3 ie LU0/LU1",
23462a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LSU"
23472a81fa3bSSukadev Bhattiprolu  },
2348835e5bd9SJames Clark  {
23492a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc888",
23502a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_LDX",
23512a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Vector loads can issue only on LS2/LS3",
23522a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LSU"
23532a81fa3bSSukadev Bhattiprolu  },
2354835e5bd9SJames Clark  {
23552a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd0a2",
23562a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_LMQ_FULL_CYC",
23572a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LMQ full",
23582a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LMQ fullCycles LMQ full"
23592a81fa3bSSukadev Bhattiprolu  },
2360835e5bd9SJames Clark  {
23612a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd0a1",
23622a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_LMQ_S0_ALLOC",
23632a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Per thread - use edge detect to count allocates On a per thread basis, level signal indicating Slot 0 is valid. By instrumenting a single slot we can calculate service time for that slot. Previous machines required a separate signal indicating the slot was allocated. Because any signal can be routed to any counter in P8, we can count level in one PMC and edge detect in another PMC using the same signal",
23642a81fa3bSSukadev Bhattiprolu    "PublicDescription": "0.0"
23652a81fa3bSSukadev Bhattiprolu  },
2366835e5bd9SJames Clark  {
23672a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd0a0",
23682a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_LMQ_S0_VALID",
23692a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Slot 0 of LMQ valid",
23702a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Slot 0 of LMQ validLMQ slot 0 valid"
23712a81fa3bSSukadev Bhattiprolu  },
2372835e5bd9SJames Clark  {
23732a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3001c",
23742a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_LMQ_SRQ_EMPTY_ALL_CYC",
23752a81fa3bSSukadev Bhattiprolu    "BriefDescription": "ALL threads lsu empty (lmq and srq empty)",
23762a81fa3bSSukadev Bhattiprolu    "PublicDescription": "ALL threads lsu empty (lmq and srq empty). Issue HW016541"
23772a81fa3bSSukadev Bhattiprolu  },
2378835e5bd9SJames Clark  {
23792a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd09f",
23802a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_LRQ_S0_ALLOC",
23812a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Per thread - use edge detect to count allocates On a per thread basis, level signal indicating Slot 0 is valid. By instrumenting a single slot we can calculate service time for that slot. Previous machines required a separate signal indicating the slot was allocated. Because any signal can be routed to any counter in P8, we can count level in one PMC and edge detect in another PMC using the same signal",
23822a81fa3bSSukadev Bhattiprolu    "PublicDescription": "0.0"
23832a81fa3bSSukadev Bhattiprolu  },
2384835e5bd9SJames Clark  {
23852a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd09e",
23862a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_LRQ_S0_VALID",
23872a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Slot 0 of LRQ valid",
23882a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Slot 0 of LRQ validLRQ slot 0 valid"
23892a81fa3bSSukadev Bhattiprolu  },
2390835e5bd9SJames Clark  {
23912a81fa3bSSukadev Bhattiprolu    "EventCode": "0xf091",
23922a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_LRQ_S43_ALLOC",
23932a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LRQ slot 43 was released",
23942a81fa3bSSukadev Bhattiprolu    "PublicDescription": "0.0"
23952a81fa3bSSukadev Bhattiprolu  },
2396835e5bd9SJames Clark  {
23972a81fa3bSSukadev Bhattiprolu    "EventCode": "0xf090",
23982a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_LRQ_S43_VALID",
23992a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LRQ slot 43 was busy",
24002a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LRQ slot 43 was busy42"
24012a81fa3bSSukadev Bhattiprolu  },
2402835e5bd9SJames Clark  {
24032a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30162",
24042a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_MRK_DERAT_MISS",
24052a81fa3bSSukadev Bhattiprolu    "BriefDescription": "DERAT Reloaded (Miss)",
24062a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
24072a81fa3bSSukadev Bhattiprolu  },
2408835e5bd9SJames Clark  {
24092a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc88c",
24102a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_NCLD",
24112a81fa3bSSukadev Bhattiprolu    "BriefDescription": "count at finish so can return only on ls0 or ls1",
24122a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LSU"
24132a81fa3bSSukadev Bhattiprolu  },
2414835e5bd9SJames Clark  {
24152a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc092",
24162a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_NCST",
24172a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Non-cachable Stores sent to nest",
24182a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Non-cachable Stores sent to nest42"
24192a81fa3bSSukadev Bhattiprolu  },
2420835e5bd9SJames Clark  {
24212a81fa3bSSukadev Bhattiprolu    "EventCode": "0x10064",
24222a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_REJECT",
24232a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LSU Reject (up to 4 per cycle)",
24242a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
24252a81fa3bSSukadev Bhattiprolu  },
2426835e5bd9SJames Clark  {
24272a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd082",
24282a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_SET_MPRED",
24292a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Line already in cache at reload time",
24302a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Line already in cache at reload time42"
24312a81fa3bSSukadev Bhattiprolu  },
2432835e5bd9SJames Clark  {
24332a81fa3bSSukadev Bhattiprolu    "EventCode": "0x40008",
24342a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_SRQ_EMPTY_CYC",
24352a81fa3bSSukadev Bhattiprolu    "BriefDescription": "ALL threads srq empty",
24362a81fa3bSSukadev Bhattiprolu    "PublicDescription": "All threads srq empty"
24372a81fa3bSSukadev Bhattiprolu  },
2438835e5bd9SJames Clark  {
24392a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd09d",
24402a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_SRQ_S0_ALLOC",
24412a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Per thread - use edge detect to count allocates On a per thread basis, level signal indicating Slot 0 is valid. By instrumenting a single slot we can calculate service time for that slot. Previous machines required a separate signal indicating the slot was allocated. Because any signal can be routed to any counter in P8, we can count level in one PMC and edge detect in another PMC using the same signal",
24422a81fa3bSSukadev Bhattiprolu    "PublicDescription": "0.0"
24432a81fa3bSSukadev Bhattiprolu  },
2444835e5bd9SJames Clark  {
24452a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd09c",
24462a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_SRQ_S0_VALID",
24472a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Slot 0 of SRQ valid",
24482a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Slot 0 of SRQ validSRQ slot 0 valid"
24492a81fa3bSSukadev Bhattiprolu  },
2450835e5bd9SJames Clark  {
24512a81fa3bSSukadev Bhattiprolu    "EventCode": "0xf093",
24522a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_SRQ_S39_ALLOC",
24532a81fa3bSSukadev Bhattiprolu    "BriefDescription": "SRQ slot 39 was released",
24542a81fa3bSSukadev Bhattiprolu    "PublicDescription": "0.0"
24552a81fa3bSSukadev Bhattiprolu  },
2456835e5bd9SJames Clark  {
24572a81fa3bSSukadev Bhattiprolu    "EventCode": "0xf092",
24582a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_SRQ_S39_VALID",
24592a81fa3bSSukadev Bhattiprolu    "BriefDescription": "SRQ slot 39 was busy",
24602a81fa3bSSukadev Bhattiprolu    "PublicDescription": "SRQ slot 39 was busy42"
24612a81fa3bSSukadev Bhattiprolu  },
2462835e5bd9SJames Clark  {
24632a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd09b",
24642a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_SRQ_SYNC",
24652a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A sync in the SRQ ended",
24662a81fa3bSSukadev Bhattiprolu    "PublicDescription": "0.0"
24672a81fa3bSSukadev Bhattiprolu  },
2468835e5bd9SJames Clark  {
24692a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd09a",
24702a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_SRQ_SYNC_CYC",
24712a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A sync is in the SRQ (edge detect to count)",
24722a81fa3bSSukadev Bhattiprolu    "PublicDescription": "A sync is in the SRQ (edge detect to count)SRQ sync duration"
24732a81fa3bSSukadev Bhattiprolu  },
2474835e5bd9SJames Clark  {
24752a81fa3bSSukadev Bhattiprolu    "EventCode": "0xf084",
24762a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_STORE_REJECT",
24772a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Store reject on either pipe",
24782a81fa3bSSukadev Bhattiprolu    "PublicDescription": "LSU"
24792a81fa3bSSukadev Bhattiprolu  },
2480835e5bd9SJames Clark  {
24812a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd0a6",
24822a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LSU_TWO_TABLEWALK_CYC",
24832a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Cycles when two tablewalks pending on this thread",
24842a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Cycles when two tablewalks pending on this thread42"
24852a81fa3bSSukadev Bhattiprolu  },
2486835e5bd9SJames Clark  {
24872a81fa3bSSukadev Bhattiprolu    "EventCode": "0x5094",
24882a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LWSYNC",
24892a81fa3bSSukadev Bhattiprolu    "BriefDescription": "threaded version, IC Misses where we got EA dir hit but no sector valids were on. ICBI took line out",
24902a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
24912a81fa3bSSukadev Bhattiprolu  },
2492835e5bd9SJames Clark  {
24932a81fa3bSSukadev Bhattiprolu    "EventCode": "0x209a",
24942a81fa3bSSukadev Bhattiprolu    "EventName": "PM_LWSYNC_HELD",
24952a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LWSYNC held at dispatch",
24962a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
24972a81fa3bSSukadev Bhattiprolu  },
2498835e5bd9SJames Clark  {
24992a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3013a",
25002a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_CRU_FIN",
25012a81fa3bSSukadev Bhattiprolu    "BriefDescription": "IFU non-branch finished",
25022a81fa3bSSukadev Bhattiprolu    "PublicDescription": "IFU non-branch marked instruction finished"
25032a81fa3bSSukadev Bhattiprolu  },
2504835e5bd9SJames Clark  {
25052a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4d146",
25062a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_DATA_FROM_L21_MOD",
25072a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L2 on the same chip due to a marked load",
25082a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
25092a81fa3bSSukadev Bhattiprolu  },
2510835e5bd9SJames Clark  {
25112a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2d126",
25122a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_DATA_FROM_L21_MOD_CYC",
25132a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Duration in cycles to reload with Modified (M) data from another core's L2 on the same chip due to a marked load",
25142a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
25152a81fa3bSSukadev Bhattiprolu  },
2516835e5bd9SJames Clark  {
25172a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3d146",
25182a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_DATA_FROM_L21_SHR",
25192a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L2 on the same chip due to a marked load",
25202a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
25212a81fa3bSSukadev Bhattiprolu  },
2522835e5bd9SJames Clark  {
25232a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2c126",
25242a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_DATA_FROM_L21_SHR_CYC",
25252a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Duration in cycles to reload with Shared (S) data from another core's L2 on the same chip due to a marked load",
25262a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
25272a81fa3bSSukadev Bhattiprolu  },
2528835e5bd9SJames Clark  {
25292a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4d144",
25302a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_DATA_FROM_L31_ECO_MOD",
25312a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's ECO L3 on the same chip due to a marked load",
25322a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
25332a81fa3bSSukadev Bhattiprolu  },
2534835e5bd9SJames Clark  {
25352a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2d124",
25362a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_DATA_FROM_L31_ECO_MOD_CYC",
25372a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Duration in cycles to reload with Modified (M) data from another core's ECO L3 on the same chip due to a marked load",
25382a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
25392a81fa3bSSukadev Bhattiprolu  },
2540835e5bd9SJames Clark  {
25412a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3d144",
25422a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_DATA_FROM_L31_ECO_SHR",
25432a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's ECO L3 on the same chip due to a marked load",
25442a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
25452a81fa3bSSukadev Bhattiprolu  },
2546835e5bd9SJames Clark  {
25472a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2c124",
25482a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_DATA_FROM_L31_ECO_SHR_CYC",
25492a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Duration in cycles to reload with Shared (S) data from another core's ECO L3 on the same chip due to a marked load",
25502a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
25512a81fa3bSSukadev Bhattiprolu  },
2552835e5bd9SJames Clark  {
25532a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2d144",
25542a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_DATA_FROM_L31_MOD",
25552a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded with Modified (M) data from another core's L3 on the same chip due to a marked load",
25562a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
25572a81fa3bSSukadev Bhattiprolu  },
2558835e5bd9SJames Clark  {
25592a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4d124",
25602a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_DATA_FROM_L31_MOD_CYC",
25612a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Duration in cycles to reload with Modified (M) data from another core's L3 on the same chip due to a marked load",
25622a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
25632a81fa3bSSukadev Bhattiprolu  },
2564835e5bd9SJames Clark  {
25652a81fa3bSSukadev Bhattiprolu    "EventCode": "0x1d146",
25662a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_DATA_FROM_L31_SHR",
25672a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded with Shared (S) data from another core's L3 on the same chip due to a marked load",
25682a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
25692a81fa3bSSukadev Bhattiprolu  },
2570835e5bd9SJames Clark  {
25712a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4c126",
25722a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_DATA_FROM_L31_SHR_CYC",
25732a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Duration in cycles to reload with Shared (S) data from another core's L3 on the same chip due to a marked load",
25742a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
25752a81fa3bSSukadev Bhattiprolu  },
2576835e5bd9SJames Clark  {
25772a81fa3bSSukadev Bhattiprolu    "EventCode": "0x201e0",
25782a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_DATA_FROM_MEM",
25792a81fa3bSSukadev Bhattiprolu    "BriefDescription": "The processor's data cache was reloaded from a memory location including L4 from local remote or distant due to a marked load",
25802a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
25812a81fa3bSSukadev Bhattiprolu  },
2582835e5bd9SJames Clark  {
25832a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4f146",
25842a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_DPTEG_FROM_L21_MOD",
25852a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L2 on the same chip due to a marked data side request",
25862a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
25872a81fa3bSSukadev Bhattiprolu  },
2588835e5bd9SJames Clark  {
25892a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3f146",
25902a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_DPTEG_FROM_L21_SHR",
25912a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L2 on the same chip due to a marked data side request",
25922a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
25932a81fa3bSSukadev Bhattiprolu  },
2594835e5bd9SJames Clark  {
25952a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3f140",
25962a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_DPTEG_FROM_L2_DISP_CONFLICT_LDHITST",
25972a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 with load hit store conflict due to a marked data side request",
25982a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
25992a81fa3bSSukadev Bhattiprolu  },
2600835e5bd9SJames Clark  {
26012a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4f140",
26022a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_DPTEG_FROM_L2_DISP_CONFLICT_OTHER",
26032a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 with dispatch conflict due to a marked data side request",
26042a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
26052a81fa3bSSukadev Bhattiprolu  },
2606835e5bd9SJames Clark  {
26072a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4f144",
26082a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_DPTEG_FROM_L31_ECO_MOD",
26092a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's ECO L3 on the same chip due to a marked data side request",
26102a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
26112a81fa3bSSukadev Bhattiprolu  },
2612835e5bd9SJames Clark  {
26132a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3f144",
26142a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_DPTEG_FROM_L31_ECO_SHR",
26152a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to a marked data side request",
26162a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
26172a81fa3bSSukadev Bhattiprolu  },
2618835e5bd9SJames Clark  {
26192a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2f144",
26202a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_DPTEG_FROM_L31_MOD",
26212a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another core's L3 on the same chip due to a marked data side request",
26222a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
26232a81fa3bSSukadev Bhattiprolu  },
2624835e5bd9SJames Clark  {
26252a81fa3bSSukadev Bhattiprolu    "EventCode": "0x1f146",
26262a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_DPTEG_FROM_L31_SHR",
26272a81fa3bSSukadev Bhattiprolu    "BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another core's L3 on the same chip due to a marked data side request",
26282a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
26292a81fa3bSSukadev Bhattiprolu  },
2630835e5bd9SJames Clark  {
26312a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30156",
26322a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_FAB_RSP_MATCH",
26332a81fa3bSSukadev Bhattiprolu    "BriefDescription": "ttype and cresp matched as specified in MMCR1",
26342a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
26352a81fa3bSSukadev Bhattiprolu  },
2636835e5bd9SJames Clark  {
26372a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4f152",
26382a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_FAB_RSP_MATCH_CYC",
26392a81fa3bSSukadev Bhattiprolu    "BriefDescription": "cresp/ttype match cycles",
26402a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
26412a81fa3bSSukadev Bhattiprolu  },
2642835e5bd9SJames Clark  {
26432a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2013c",
26442a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_FILT_MATCH",
26452a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Marked filter Match",
26462a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
26472a81fa3bSSukadev Bhattiprolu  },
2648835e5bd9SJames Clark  {
26492a81fa3bSSukadev Bhattiprolu    "EventCode": "0x1013c",
26502a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_FIN_STALL_CYC",
26512a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Marked instruction Finish Stall cycles (marked finish after NTC) (use edge detect to count )",
26522a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Marked instruction Finish Stall cycles (marked finish after NTC) (use edge detect to count #)"
26532a81fa3bSSukadev Bhattiprolu  },
2654835e5bd9SJames Clark  {
26552a81fa3bSSukadev Bhattiprolu    "EventCode": "0x40130",
26562a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_GRP_CMPL",
26572a81fa3bSSukadev Bhattiprolu    "BriefDescription": "marked instruction finished (completed)",
26582a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
26592a81fa3bSSukadev Bhattiprolu  },
2660835e5bd9SJames Clark  {
26612a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4013a",
26622a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_GRP_IC_MISS",
26632a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Marked Group experienced I cache miss",
26642a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
26652a81fa3bSSukadev Bhattiprolu  },
2666835e5bd9SJames Clark  {
26672a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3013c",
26682a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_GRP_NTC",
26692a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Marked group ntc cycles",
26702a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
26712a81fa3bSSukadev Bhattiprolu  },
2672835e5bd9SJames Clark  {
26732a81fa3bSSukadev Bhattiprolu    "EventCode": "0x1013f",
26742a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_LD_MISS_EXPOSED",
26752a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Marked Load exposed Miss (exposed period ended)",
26762a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Marked Load exposed Miss (use edge detect to count #)"
26772a81fa3bSSukadev Bhattiprolu  },
2678835e5bd9SJames Clark  {
26792a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd180",
26802a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_LSU_FLUSH",
26812a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Flush: (marked) : All Cases",
26822a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Flush: (marked) : All Cases42"
26832a81fa3bSSukadev Bhattiprolu  },
2684835e5bd9SJames Clark  {
26852a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd188",
26862a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_LSU_FLUSH_LRQ",
26872a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Flush: (marked) LRQ",
26882a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Flush: (marked) LRQMarked LRQ flushes"
26892a81fa3bSSukadev Bhattiprolu  },
2690835e5bd9SJames Clark  {
26912a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd18a",
26922a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_LSU_FLUSH_SRQ",
26932a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Flush: (marked) SRQ",
26942a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Flush: (marked) SRQMarked SRQ lhs flushes"
26952a81fa3bSSukadev Bhattiprolu  },
2696835e5bd9SJames Clark  {
26972a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd184",
26982a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_LSU_FLUSH_ULD",
26992a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Flush: (marked) Unaligned Load",
27002a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Flush: (marked) Unaligned LoadMarked unaligned load flushes"
27012a81fa3bSSukadev Bhattiprolu  },
2702835e5bd9SJames Clark  {
27032a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd186",
27042a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_LSU_FLUSH_UST",
27052a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Flush: (marked) Unaligned Store",
27062a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Flush: (marked) Unaligned StoreMarked unaligned store flushes"
27072a81fa3bSSukadev Bhattiprolu  },
2708835e5bd9SJames Clark  {
27092a81fa3bSSukadev Bhattiprolu    "EventCode": "0x40164",
27102a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_LSU_REJECT",
27112a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LSU marked reject (up to 2 per cycle)",
27122a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
27132a81fa3bSSukadev Bhattiprolu  },
2714835e5bd9SJames Clark  {
27152a81fa3bSSukadev Bhattiprolu    "EventCode": "0x30164",
27162a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_LSU_REJECT_ERAT_MISS",
27172a81fa3bSSukadev Bhattiprolu    "BriefDescription": "LSU marked reject due to ERAT (up to 2 per cycle)",
27182a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
27192a81fa3bSSukadev Bhattiprolu  },
2720835e5bd9SJames Clark  {
27212a81fa3bSSukadev Bhattiprolu    "EventCode": "0x1d15a",
27222a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_SRC_PREF_TRACK_EFF",
27232a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Marked src pref track was effective",
27242a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
27252a81fa3bSSukadev Bhattiprolu  },
2726835e5bd9SJames Clark  {
27272a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3d15a",
27282a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_SRC_PREF_TRACK_INEFF",
27292a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Prefetch tracked was ineffective for marked src",
27302a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
27312a81fa3bSSukadev Bhattiprolu  },
2732835e5bd9SJames Clark  {
27332a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4d15c",
27342a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_SRC_PREF_TRACK_MOD",
27352a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Prefetch tracked was moderate for marked src",
27362a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
27372a81fa3bSSukadev Bhattiprolu  },
2738835e5bd9SJames Clark  {
27392a81fa3bSSukadev Bhattiprolu    "EventCode": "0x1d15c",
27402a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_SRC_PREF_TRACK_MOD_L2",
27412a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Marked src Prefetch Tracked was moderate (source L2)",
27422a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
27432a81fa3bSSukadev Bhattiprolu  },
2744835e5bd9SJames Clark  {
27452a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3d15c",
27462a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_SRC_PREF_TRACK_MOD_L3",
27472a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Prefetch tracked was moderate (L3 hit) for marked src",
27482a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
27492a81fa3bSSukadev Bhattiprolu  },
2750835e5bd9SJames Clark  {
27512a81fa3bSSukadev Bhattiprolu    "EventCode": "0x1c15a",
27522a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_TGT_PREF_TRACK_EFF",
27532a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Marked target pref track was effective",
27542a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
27552a81fa3bSSukadev Bhattiprolu  },
2756835e5bd9SJames Clark  {
27572a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3c15a",
27582a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_TGT_PREF_TRACK_INEFF",
27592a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Prefetch tracked was ineffective for marked target",
27602a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
27612a81fa3bSSukadev Bhattiprolu  },
2762835e5bd9SJames Clark  {
27632a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4c15c",
27642a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_TGT_PREF_TRACK_MOD",
27652a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Prefetch tracked was moderate for marked target",
27662a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
27672a81fa3bSSukadev Bhattiprolu  },
2768835e5bd9SJames Clark  {
27692a81fa3bSSukadev Bhattiprolu    "EventCode": "0x1c15c",
27702a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_TGT_PREF_TRACK_MOD_L2",
27712a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Marked target Prefetch Tracked was moderate (source L2)",
27722a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
27732a81fa3bSSukadev Bhattiprolu  },
2774835e5bd9SJames Clark  {
27752a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3c15c",
27762a81fa3bSSukadev Bhattiprolu    "EventName": "PM_MRK_TGT_PREF_TRACK_MOD_L3",
27772a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Prefetch tracked was moderate (L3 hit) for marked target",
27782a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
27792a81fa3bSSukadev Bhattiprolu  },
2780835e5bd9SJames Clark  {
27812a81fa3bSSukadev Bhattiprolu    "EventCode": "0x20b0",
27822a81fa3bSSukadev Bhattiprolu    "EventName": "PM_NESTED_TEND",
27832a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion time nested tend",
27842a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
27852a81fa3bSSukadev Bhattiprolu  },
2786835e5bd9SJames Clark  {
27872a81fa3bSSukadev Bhattiprolu    "EventCode": "0x20b6",
27882a81fa3bSSukadev Bhattiprolu    "EventName": "PM_NON_FAV_TBEGIN",
27892a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Dispatch time non favored tbegin",
27902a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
27912a81fa3bSSukadev Bhattiprolu  },
2792835e5bd9SJames Clark  {
27932a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2001a",
27942a81fa3bSSukadev Bhattiprolu    "EventName": "PM_NTCG_ALL_FIN",
27952a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Cycles after all instructions have finished to group completed",
27962a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Ccycles after all instructions have finished to group completed"
27972a81fa3bSSukadev Bhattiprolu  },
2798835e5bd9SJames Clark  {
27992a81fa3bSSukadev Bhattiprolu    "EventCode": "0x20ac",
28002a81fa3bSSukadev Bhattiprolu    "EventName": "PM_OUTER_TBEGIN",
28012a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion time outer tbegin",
28022a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
28032a81fa3bSSukadev Bhattiprolu  },
2804835e5bd9SJames Clark  {
28052a81fa3bSSukadev Bhattiprolu    "EventCode": "0x20ae",
28062a81fa3bSSukadev Bhattiprolu    "EventName": "PM_OUTER_TEND",
28072a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion time outer tend",
28082a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
28092a81fa3bSSukadev Bhattiprolu  },
2810835e5bd9SJames Clark  {
28112a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2005a",
28122a81fa3bSSukadev Bhattiprolu    "EventName": "PM_PREF_TRACKED",
28132a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Total number of Prefetch Operations that were tracked",
28142a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
28152a81fa3bSSukadev Bhattiprolu  },
2816835e5bd9SJames Clark  {
28172a81fa3bSSukadev Bhattiprolu    "EventCode": "0x1005a",
28182a81fa3bSSukadev Bhattiprolu    "EventName": "PM_PREF_TRACK_EFF",
28192a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Prefetch Tracked was effective",
28202a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
28212a81fa3bSSukadev Bhattiprolu  },
2822835e5bd9SJames Clark  {
28232a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3005a",
28242a81fa3bSSukadev Bhattiprolu    "EventName": "PM_PREF_TRACK_INEFF",
28252a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Prefetch tracked was ineffective",
28262a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
28272a81fa3bSSukadev Bhattiprolu  },
2828835e5bd9SJames Clark  {
28292a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4005a",
28302a81fa3bSSukadev Bhattiprolu    "EventName": "PM_PREF_TRACK_MOD",
28312a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Prefetch tracked was moderate",
28322a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
28332a81fa3bSSukadev Bhattiprolu  },
2834835e5bd9SJames Clark  {
28352a81fa3bSSukadev Bhattiprolu    "EventCode": "0x1005c",
28362a81fa3bSSukadev Bhattiprolu    "EventName": "PM_PREF_TRACK_MOD_L2",
28372a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Prefetch Tracked was moderate (source L2)",
28382a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
28392a81fa3bSSukadev Bhattiprolu  },
2840835e5bd9SJames Clark  {
28412a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3005c",
28422a81fa3bSSukadev Bhattiprolu    "EventName": "PM_PREF_TRACK_MOD_L3",
28432a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Prefetch tracked was moderate (L3)",
28442a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
28452a81fa3bSSukadev Bhattiprolu  },
2846835e5bd9SJames Clark  {
28472a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe084",
28482a81fa3bSSukadev Bhattiprolu    "EventName": "PM_PTE_PREFETCH",
28492a81fa3bSSukadev Bhattiprolu    "BriefDescription": "PTE prefetches",
28502a81fa3bSSukadev Bhattiprolu    "PublicDescription": "PTE prefetches42"
28512a81fa3bSSukadev Bhattiprolu  },
2852835e5bd9SJames Clark  {
28532a81fa3bSSukadev Bhattiprolu    "EventCode": "0x16081",
28542a81fa3bSSukadev Bhattiprolu    "EventName": "PM_RC0_ALLOC",
28552a81fa3bSSukadev Bhattiprolu    "BriefDescription": "RC mach 0 Busy. Used by PMU to sample ave RC livetime(mach0 used as sample point)",
28562a81fa3bSSukadev Bhattiprolu    "PublicDescription": "0.0"
28572a81fa3bSSukadev Bhattiprolu  },
2858835e5bd9SJames Clark  {
28592a81fa3bSSukadev Bhattiprolu    "EventCode": "0x16080",
28602a81fa3bSSukadev Bhattiprolu    "EventName": "PM_RC0_BUSY",
28612a81fa3bSSukadev Bhattiprolu    "BriefDescription": "RC mach 0 Busy. Used by PMU to sample ave RC livetime(mach0 used as sample point)",
28622a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
28632a81fa3bSSukadev Bhattiprolu  },
2864835e5bd9SJames Clark  {
28652a81fa3bSSukadev Bhattiprolu    "EventCode": "0x200301ea",
28662a81fa3bSSukadev Bhattiprolu    "EventName": "PM_RC_LIFETIME_EXC_1024",
28672a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Number of times the RC machine for a sampled instruction was active for more than 1024 cycles",
28682a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Reload latency exceeded 1024 cyc"
28692a81fa3bSSukadev Bhattiprolu  },
2870835e5bd9SJames Clark  {
28712a81fa3bSSukadev Bhattiprolu    "EventCode": "0x200401ec",
28722a81fa3bSSukadev Bhattiprolu    "EventName": "PM_RC_LIFETIME_EXC_2048",
28732a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Number of times the RC machine for a sampled instruction was active for more than 2048 cycles",
28742a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Threshold counter exceeded a value of 2048"
28752a81fa3bSSukadev Bhattiprolu  },
2876835e5bd9SJames Clark  {
28772a81fa3bSSukadev Bhattiprolu    "EventCode": "0x200101e8",
28782a81fa3bSSukadev Bhattiprolu    "EventName": "PM_RC_LIFETIME_EXC_256",
28792a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Number of times the RC machine for a sampled instruction was active for more than 256 cycles",
28802a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Threshold counter exceed a count of 256"
28812a81fa3bSSukadev Bhattiprolu  },
2882835e5bd9SJames Clark  {
28832a81fa3bSSukadev Bhattiprolu    "EventCode": "0x200201e6",
28842a81fa3bSSukadev Bhattiprolu    "EventName": "PM_RC_LIFETIME_EXC_32",
28852a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Number of times the RC machine for a sampled instruction was active for more than 32 cycles",
28862a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Reload latency exceeded 32 cyc"
28872a81fa3bSSukadev Bhattiprolu  },
2888835e5bd9SJames Clark  {
28892a81fa3bSSukadev Bhattiprolu    "EventCode": "0x36088",
28902a81fa3bSSukadev Bhattiprolu    "EventName": "PM_RC_USAGE",
28912a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Continuous 16 cycle(2to1) window where this signals rotates thru sampling each L2 RC machine busy. PMU uses this wave to then do 16 cyc count to sample total number of machs running",
28922a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
28932a81fa3bSSukadev Bhattiprolu  },
2894835e5bd9SJames Clark  {
28952a81fa3bSSukadev Bhattiprolu    "EventCode": "0x20004",
28962a81fa3bSSukadev Bhattiprolu    "EventName": "PM_REAL_SRQ_FULL",
28972a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Out of real srq entries",
28982a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
28992a81fa3bSSukadev Bhattiprolu  },
2900835e5bd9SJames Clark  {
29012a81fa3bSSukadev Bhattiprolu    "EventCode": "0x2006a",
29022a81fa3bSSukadev Bhattiprolu    "EventName": "PM_RUN_CYC_SMT2_SHRD_MODE",
29032a81fa3bSSukadev Bhattiprolu    "BriefDescription": "cycles this threads run latch is set and the core is in SMT2 shared mode",
29042a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Cycles run latch is set and core is in SMT2-shared mode"
29052a81fa3bSSukadev Bhattiprolu  },
2906835e5bd9SJames Clark  {
29072a81fa3bSSukadev Bhattiprolu    "EventCode": "0x1006a",
29082a81fa3bSSukadev Bhattiprolu    "EventName": "PM_RUN_CYC_SMT2_SPLIT_MODE",
29092a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Cycles run latch is set and core is in SMT2-split mode",
29102a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
29112a81fa3bSSukadev Bhattiprolu  },
2912835e5bd9SJames Clark  {
29132a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4006c",
29142a81fa3bSSukadev Bhattiprolu    "EventName": "PM_RUN_CYC_SMT8_MODE",
29152a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Cycles run latch is set and core is in SMT8 mode",
29162a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
29172a81fa3bSSukadev Bhattiprolu  },
2918835e5bd9SJames Clark  {
29192a81fa3bSSukadev Bhattiprolu    "EventCode": "0xf082",
29202a81fa3bSSukadev Bhattiprolu    "EventName": "PM_SEC_ERAT_HIT",
29212a81fa3bSSukadev Bhattiprolu    "BriefDescription": "secondary ERAT Hit",
29222a81fa3bSSukadev Bhattiprolu    "PublicDescription": "secondary ERAT Hit42"
29232a81fa3bSSukadev Bhattiprolu  },
2924835e5bd9SJames Clark  {
29252a81fa3bSSukadev Bhattiprolu    "EventCode": "0x508c",
29262a81fa3bSSukadev Bhattiprolu    "EventName": "PM_SHL_CREATED",
29272a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Store-Hit-Load Table Entry Created",
29282a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
29292a81fa3bSSukadev Bhattiprolu  },
2930835e5bd9SJames Clark  {
29312a81fa3bSSukadev Bhattiprolu    "EventCode": "0x508e",
29322a81fa3bSSukadev Bhattiprolu    "EventName": "PM_SHL_ST_CONVERT",
29332a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Store-Hit-Load Table Read Hit with entry Enabled",
29342a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
29352a81fa3bSSukadev Bhattiprolu  },
2936835e5bd9SJames Clark  {
29372a81fa3bSSukadev Bhattiprolu    "EventCode": "0x5090",
29382a81fa3bSSukadev Bhattiprolu    "EventName": "PM_SHL_ST_DISABLE",
29392a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Store-Hit-Load Table Read Hit with entry Disabled (entry was disabled due to the entry shown to not prevent the flush)",
29402a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
29412a81fa3bSSukadev Bhattiprolu  },
2942835e5bd9SJames Clark  {
29432a81fa3bSSukadev Bhattiprolu    "EventCode": "0x26085",
29442a81fa3bSSukadev Bhattiprolu    "EventName": "PM_SN0_ALLOC",
29452a81fa3bSSukadev Bhattiprolu    "BriefDescription": "SN mach 0 Busy. Used by PMU to sample ave RC livetime(mach0 used as sample point)",
29462a81fa3bSSukadev Bhattiprolu    "PublicDescription": "0.0"
29472a81fa3bSSukadev Bhattiprolu  },
2948835e5bd9SJames Clark  {
29492a81fa3bSSukadev Bhattiprolu    "EventCode": "0x26084",
29502a81fa3bSSukadev Bhattiprolu    "EventName": "PM_SN0_BUSY",
29512a81fa3bSSukadev Bhattiprolu    "BriefDescription": "SN mach 0 Busy. Used by PMU to sample ave RC livetime(mach0 used as sample point)",
29522a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
29532a81fa3bSSukadev Bhattiprolu  },
2954835e5bd9SJames Clark  {
29552a81fa3bSSukadev Bhattiprolu    "EventCode": "0xd0b2",
29562a81fa3bSSukadev Bhattiprolu    "EventName": "PM_SNOOP_TLBIE",
29572a81fa3bSSukadev Bhattiprolu    "BriefDescription": "TLBIE snoop",
29582a81fa3bSSukadev Bhattiprolu    "PublicDescription": "TLBIE snoopSnoop TLBIE"
29592a81fa3bSSukadev Bhattiprolu  },
2960835e5bd9SJames Clark  {
29612a81fa3bSSukadev Bhattiprolu    "EventCode": "0x4608c",
29622a81fa3bSSukadev Bhattiprolu    "EventName": "PM_SN_USAGE",
29632a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Continuous 16 cycle(2to1) window where this signals rotates thru sampling each L2 SN machine busy. PMU uses this wave to then do 16 cyc count to sample total number of machs running",
29642a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
29652a81fa3bSSukadev Bhattiprolu  },
2966835e5bd9SJames Clark  {
29672a81fa3bSSukadev Bhattiprolu    "EventCode": "0x10028",
29682a81fa3bSSukadev Bhattiprolu    "EventName": "PM_STALL_END_GCT_EMPTY",
29692a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Count ended because GCT went empty",
29702a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
29712a81fa3bSSukadev Bhattiprolu  },
2972835e5bd9SJames Clark  {
29732a81fa3bSSukadev Bhattiprolu    "EventCode": "0xc090",
29742a81fa3bSSukadev Bhattiprolu    "EventName": "PM_STCX_LSU",
29752a81fa3bSSukadev Bhattiprolu    "BriefDescription": "STCX executed reported at sent to nest",
29762a81fa3bSSukadev Bhattiprolu    "PublicDescription": "STCX executed reported at sent to nest42"
29772a81fa3bSSukadev Bhattiprolu  },
2978835e5bd9SJames Clark  {
29792a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3090",
29802a81fa3bSSukadev Bhattiprolu    "EventName": "PM_SWAP_CANCEL",
29812a81fa3bSSukadev Bhattiprolu    "BriefDescription": "SWAP cancel , rtag not available",
29822a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
29832a81fa3bSSukadev Bhattiprolu  },
2984835e5bd9SJames Clark  {
29852a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3092",
29862a81fa3bSSukadev Bhattiprolu    "EventName": "PM_SWAP_CANCEL_GPR",
29872a81fa3bSSukadev Bhattiprolu    "BriefDescription": "SWAP cancel , rtag not available for gpr",
29882a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
29892a81fa3bSSukadev Bhattiprolu  },
2990835e5bd9SJames Clark  {
29912a81fa3bSSukadev Bhattiprolu    "EventCode": "0x308c",
29922a81fa3bSSukadev Bhattiprolu    "EventName": "PM_SWAP_COMPLETE",
29932a81fa3bSSukadev Bhattiprolu    "BriefDescription": "swap cast in completed",
29942a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
29952a81fa3bSSukadev Bhattiprolu  },
2996835e5bd9SJames Clark  {
29972a81fa3bSSukadev Bhattiprolu    "EventCode": "0x308e",
29982a81fa3bSSukadev Bhattiprolu    "EventName": "PM_SWAP_COMPLETE_GPR",
29992a81fa3bSSukadev Bhattiprolu    "BriefDescription": "swap cast in completed fpr gpr",
30002a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
30012a81fa3bSSukadev Bhattiprolu  },
3002835e5bd9SJames Clark  {
30032a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe086",
30042a81fa3bSSukadev Bhattiprolu    "EventName": "PM_TABLEWALK_CYC_PREF",
30052a81fa3bSSukadev Bhattiprolu    "BriefDescription": "tablewalk qualified for pte prefetches",
30062a81fa3bSSukadev Bhattiprolu    "PublicDescription": "tablewalk qualified for pte prefetches42"
30072a81fa3bSSukadev Bhattiprolu  },
3008835e5bd9SJames Clark  {
30092a81fa3bSSukadev Bhattiprolu    "EventCode": "0x20b2",
30102a81fa3bSSukadev Bhattiprolu    "EventName": "PM_TABORT_TRECLAIM",
30112a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Completion time tabortnoncd, tabortcd, treclaim",
30122a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
30132a81fa3bSSukadev Bhattiprolu  },
3014835e5bd9SJames Clark  {
30152a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe0ba",
30162a81fa3bSSukadev Bhattiprolu    "EventName": "PM_TEND_PEND_CYC",
30172a81fa3bSSukadev Bhattiprolu    "BriefDescription": "TEND latency per thread",
30182a81fa3bSSukadev Bhattiprolu    "PublicDescription": "TEND latency per thread42"
30192a81fa3bSSukadev Bhattiprolu  },
3020835e5bd9SJames Clark  {
30212a81fa3bSSukadev Bhattiprolu    "EventCode": "0x10012",
30222a81fa3bSSukadev Bhattiprolu    "EventName": "PM_THRD_GRP_CMPL_BOTH_CYC",
30232a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Cycles group completed on both completion slots by any thread",
30242a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Two threads finished same cycle (gated by run latch)"
30252a81fa3bSSukadev Bhattiprolu  },
3026835e5bd9SJames Clark  {
30272a81fa3bSSukadev Bhattiprolu    "EventCode": "0x40bc",
30282a81fa3bSSukadev Bhattiprolu    "EventName": "PM_THRD_PRIO_0_1_CYC",
30292a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Cycles thread running at priority level 0 or 1",
30302a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
30312a81fa3bSSukadev Bhattiprolu  },
3032835e5bd9SJames Clark  {
30332a81fa3bSSukadev Bhattiprolu    "EventCode": "0x40be",
30342a81fa3bSSukadev Bhattiprolu    "EventName": "PM_THRD_PRIO_2_3_CYC",
30352a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Cycles thread running at priority level 2 or 3",
30362a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
30372a81fa3bSSukadev Bhattiprolu  },
3038835e5bd9SJames Clark  {
30392a81fa3bSSukadev Bhattiprolu    "EventCode": "0x5080",
30402a81fa3bSSukadev Bhattiprolu    "EventName": "PM_THRD_PRIO_4_5_CYC",
30412a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Cycles thread running at priority level 4 or 5",
30422a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
30432a81fa3bSSukadev Bhattiprolu  },
3044835e5bd9SJames Clark  {
30452a81fa3bSSukadev Bhattiprolu    "EventCode": "0x5082",
30462a81fa3bSSukadev Bhattiprolu    "EventName": "PM_THRD_PRIO_6_7_CYC",
30472a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Cycles thread running at priority level 6 or 7",
30482a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
30492a81fa3bSSukadev Bhattiprolu  },
3050835e5bd9SJames Clark  {
30512a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3098",
30522a81fa3bSSukadev Bhattiprolu    "EventName": "PM_THRD_REBAL_CYC",
30532a81fa3bSSukadev Bhattiprolu    "BriefDescription": "cycles rebalance was active",
30542a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
30552a81fa3bSSukadev Bhattiprolu  },
3056835e5bd9SJames Clark  {
30572a81fa3bSSukadev Bhattiprolu    "EventCode": "0x20b8",
30582a81fa3bSSukadev Bhattiprolu    "EventName": "PM_TM_BEGIN_ALL",
30592a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Tm any tbegin",
30602a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
30612a81fa3bSSukadev Bhattiprolu  },
3062835e5bd9SJames Clark  {
30632a81fa3bSSukadev Bhattiprolu    "EventCode": "0x20ba",
30642a81fa3bSSukadev Bhattiprolu    "EventName": "PM_TM_END_ALL",
30652a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Tm any tend",
30662a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
30672a81fa3bSSukadev Bhattiprolu  },
3068835e5bd9SJames Clark  {
30692a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3086",
30702a81fa3bSSukadev Bhattiprolu    "EventName": "PM_TM_FAIL_CONF_NON_TM",
30712a81fa3bSSukadev Bhattiprolu    "BriefDescription": "TEXAS fail reason @ completion",
30722a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
30732a81fa3bSSukadev Bhattiprolu  },
3074835e5bd9SJames Clark  {
30752a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3088",
30762a81fa3bSSukadev Bhattiprolu    "EventName": "PM_TM_FAIL_CON_TM",
30772a81fa3bSSukadev Bhattiprolu    "BriefDescription": "TEXAS fail reason @ completion",
30782a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
30792a81fa3bSSukadev Bhattiprolu  },
3080835e5bd9SJames Clark  {
30812a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe0b2",
30822a81fa3bSSukadev Bhattiprolu    "EventName": "PM_TM_FAIL_DISALLOW",
30832a81fa3bSSukadev Bhattiprolu    "BriefDescription": "TM fail disallow",
30842a81fa3bSSukadev Bhattiprolu    "PublicDescription": "TM fail disallow42"
30852a81fa3bSSukadev Bhattiprolu  },
3086835e5bd9SJames Clark  {
30872a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3084",
30882a81fa3bSSukadev Bhattiprolu    "EventName": "PM_TM_FAIL_FOOTPRINT_OVERFLOW",
30892a81fa3bSSukadev Bhattiprolu    "BriefDescription": "TEXAS fail reason @ completion",
30902a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
30912a81fa3bSSukadev Bhattiprolu  },
3092835e5bd9SJames Clark  {
30932a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe0b8",
30942a81fa3bSSukadev Bhattiprolu    "EventName": "PM_TM_FAIL_NON_TX_CONFLICT",
30952a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Non transactional conflict from LSU whtver gets repoted to texas",
30962a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Non transactional conflict from LSU whtver gets repoted to texas42"
30972a81fa3bSSukadev Bhattiprolu  },
3098835e5bd9SJames Clark  {
30992a81fa3bSSukadev Bhattiprolu    "EventCode": "0x308a",
31002a81fa3bSSukadev Bhattiprolu    "EventName": "PM_TM_FAIL_SELF",
31012a81fa3bSSukadev Bhattiprolu    "BriefDescription": "TEXAS fail reason @ completion",
31022a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
31032a81fa3bSSukadev Bhattiprolu  },
3104835e5bd9SJames Clark  {
31052a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe0b4",
31062a81fa3bSSukadev Bhattiprolu    "EventName": "PM_TM_FAIL_TLBIE",
31072a81fa3bSSukadev Bhattiprolu    "BriefDescription": "TLBIE hit bloom filter",
31082a81fa3bSSukadev Bhattiprolu    "PublicDescription": "TLBIE hit bloom filter42"
31092a81fa3bSSukadev Bhattiprolu  },
3110835e5bd9SJames Clark  {
31112a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe0b6",
31122a81fa3bSSukadev Bhattiprolu    "EventName": "PM_TM_FAIL_TX_CONFLICT",
31132a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Transactional conflict from LSU, whatever gets reported to texas",
31142a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Transactional conflict from LSU, whatever gets reported to texas 42"
31152a81fa3bSSukadev Bhattiprolu  },
3116835e5bd9SJames Clark  {
31172a81fa3bSSukadev Bhattiprolu    "EventCode": "0x20bc",
31182a81fa3bSSukadev Bhattiprolu    "EventName": "PM_TM_TBEGIN",
31192a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Tm nested tbegin",
31202a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
31212a81fa3bSSukadev Bhattiprolu  },
3122835e5bd9SJames Clark  {
31232a81fa3bSSukadev Bhattiprolu    "EventCode": "0x3080",
31242a81fa3bSSukadev Bhattiprolu    "EventName": "PM_TM_TRESUME",
31252a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Tm resume",
31262a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
31272a81fa3bSSukadev Bhattiprolu  },
3128835e5bd9SJames Clark  {
31292a81fa3bSSukadev Bhattiprolu    "EventCode": "0x20be",
31302a81fa3bSSukadev Bhattiprolu    "EventName": "PM_TM_TSUSPEND",
31312a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Tm suspend",
31322a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
31332a81fa3bSSukadev Bhattiprolu  },
3134835e5bd9SJames Clark  {
31352a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe08c",
31362a81fa3bSSukadev Bhattiprolu    "EventName": "PM_UP_PREF_L3",
31372a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Micropartition prefetch",
31382a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Micropartition prefetch42"
31392a81fa3bSSukadev Bhattiprolu  },
3140835e5bd9SJames Clark  {
31412a81fa3bSSukadev Bhattiprolu    "EventCode": "0xe08e",
31422a81fa3bSSukadev Bhattiprolu    "EventName": "PM_UP_PREF_POINTER",
31432a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Micrpartition pointer prefetches",
31442a81fa3bSSukadev Bhattiprolu    "PublicDescription": "Micrpartition pointer prefetches42"
31452a81fa3bSSukadev Bhattiprolu  },
3146835e5bd9SJames Clark  {
31472a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa0a4",
31482a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_16FLOP",
31492a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Sixteen flops operation (SP vector versions of fdiv,fsqrt)",
31502a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
31512a81fa3bSSukadev Bhattiprolu  },
3152835e5bd9SJames Clark  {
31532a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa080",
31542a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_1FLOP",
31552a81fa3bSSukadev Bhattiprolu    "BriefDescription": "one flop (fadd, fmul, fsub, fcmp, fsel, fabs, fnabs, fres, fsqrte, fneg) operation finished",
31562a81fa3bSSukadev Bhattiprolu    "PublicDescription": "one flop (fadd, fmul, fsub, fcmp, fsel, fabs, fnabs, fres, fsqrte, fneg) operation finishedDecode into 1,2,4 FLOP according to instr IOP, multiplied by #vector elements according to route( eg x1, x2, x4) Only if instr sends finish to ISU"
31572a81fa3bSSukadev Bhattiprolu  },
3158835e5bd9SJames Clark  {
31592a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa098",
31602a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_2FLOP",
31612a81fa3bSSukadev Bhattiprolu    "BriefDescription": "two flops operation (scalar fmadd, fnmadd, fmsub, fnmsub and DP vector versions of single flop instructions)",
31622a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
31632a81fa3bSSukadev Bhattiprolu  },
3164835e5bd9SJames Clark  {
31652a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa09c",
31662a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_4FLOP",
31672a81fa3bSSukadev Bhattiprolu    "BriefDescription": "four flops operation (scalar fdiv, fsqrt, DP vector version of fmadd, fnmadd, fmsub, fnmsub, SP vector versions of single flop instructions)",
31682a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
31692a81fa3bSSukadev Bhattiprolu  },
3170835e5bd9SJames Clark  {
31712a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa0a0",
31722a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_8FLOP",
31732a81fa3bSSukadev Bhattiprolu    "BriefDescription": "eight flops operation (DP vector versions of fdiv,fsqrt and SP vector versions of fmadd,fnmadd,fmsub,fnmsub)",
31742a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
31752a81fa3bSSukadev Bhattiprolu  },
3176835e5bd9SJames Clark  {
31772a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb0a4",
31782a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_COMPLEX_ISSUED",
31792a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Complex VMX instruction issued",
31802a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
31812a81fa3bSSukadev Bhattiprolu  },
3182835e5bd9SJames Clark  {
31832a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb0b4",
31842a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_CY_ISSUED",
31852a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Cryptographic instruction RFC02196 Issued",
31862a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
31872a81fa3bSSukadev Bhattiprolu  },
3188835e5bd9SJames Clark  {
31892a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb0a8",
31902a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_DD_ISSUED",
31912a81fa3bSSukadev Bhattiprolu    "BriefDescription": "64BIT Decimal Issued",
31922a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
31932a81fa3bSSukadev Bhattiprolu  },
3194835e5bd9SJames Clark  {
31952a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa08c",
31962a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_DP_2FLOP",
31972a81fa3bSSukadev Bhattiprolu    "BriefDescription": "DP vector version of fmul, fsub, fcmp, fsel, fabs, fnabs, fres ,fsqrte, fneg",
31982a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
31992a81fa3bSSukadev Bhattiprolu  },
3200835e5bd9SJames Clark  {
32012a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa090",
32022a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_DP_FMA",
32032a81fa3bSSukadev Bhattiprolu    "BriefDescription": "DP vector version of fmadd,fnmadd,fmsub,fnmsub",
32042a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
32052a81fa3bSSukadev Bhattiprolu  },
3206835e5bd9SJames Clark  {
32072a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa094",
32082a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_DP_FSQRT_FDIV",
32092a81fa3bSSukadev Bhattiprolu    "BriefDescription": "DP vector versions of fdiv,fsqrt",
32102a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
32112a81fa3bSSukadev Bhattiprolu  },
3212835e5bd9SJames Clark  {
32132a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb0ac",
32142a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_DQ_ISSUED",
32152a81fa3bSSukadev Bhattiprolu    "BriefDescription": "128BIT Decimal Issued",
32162a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
32172a81fa3bSSukadev Bhattiprolu  },
3218835e5bd9SJames Clark  {
32192a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb0b0",
32202a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_EX_ISSUED",
32212a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Direct move 32/64b VRFtoGPR RFC02206 Issued",
32222a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
32232a81fa3bSSukadev Bhattiprolu  },
3224835e5bd9SJames Clark  {
32252a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa0bc",
32262a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_FIN",
32272a81fa3bSSukadev Bhattiprolu    "BriefDescription": "VSU0 Finished an instruction",
32282a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
32292a81fa3bSSukadev Bhattiprolu  },
3230835e5bd9SJames Clark  {
32312a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa084",
32322a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_FMA",
32332a81fa3bSSukadev Bhattiprolu    "BriefDescription": "two flops operation (fmadd, fnmadd, fmsub, fnmsub) Scalar instructions only!",
32342a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
32352a81fa3bSSukadev Bhattiprolu  },
3236835e5bd9SJames Clark  {
32372a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb098",
32382a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_FPSCR",
32392a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Move to/from FPSCR type instruction issued on Pipe 0",
32402a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
32412a81fa3bSSukadev Bhattiprolu  },
3242835e5bd9SJames Clark  {
32432a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa088",
32442a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_FSQRT_FDIV",
32452a81fa3bSSukadev Bhattiprolu    "BriefDescription": "four flops operation (fdiv,fsqrt) Scalar Instructions only!",
32462a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
32472a81fa3bSSukadev Bhattiprolu  },
3248835e5bd9SJames Clark  {
32492a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb090",
32502a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_PERMUTE_ISSUED",
32512a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Permute VMX Instruction Issued",
32522a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
32532a81fa3bSSukadev Bhattiprolu  },
3254835e5bd9SJames Clark  {
32552a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb088",
32562a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_SCALAR_DP_ISSUED",
32572a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Double Precision scalar instruction issued on Pipe0",
32582a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
32592a81fa3bSSukadev Bhattiprolu  },
3260835e5bd9SJames Clark  {
32612a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb094",
32622a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_SIMPLE_ISSUED",
32632a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Simple VMX instruction issued",
32642a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
32652a81fa3bSSukadev Bhattiprolu  },
3266835e5bd9SJames Clark  {
32672a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa0a8",
32682a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_SINGLE",
32692a81fa3bSSukadev Bhattiprolu    "BriefDescription": "FPU single precision",
32702a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
32712a81fa3bSSukadev Bhattiprolu  },
3272835e5bd9SJames Clark  {
32732a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb09c",
32742a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_SQ",
32752a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Store Vector Issued",
32762a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
32772a81fa3bSSukadev Bhattiprolu  },
3278835e5bd9SJames Clark  {
32792a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb08c",
32802a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_STF",
32812a81fa3bSSukadev Bhattiprolu    "BriefDescription": "FPU store (SP or DP) issued on Pipe0",
32822a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
32832a81fa3bSSukadev Bhattiprolu  },
3284835e5bd9SJames Clark  {
32852a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb080",
32862a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_VECTOR_DP_ISSUED",
32872a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Double Precision vector instruction issued on Pipe0",
32882a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
32892a81fa3bSSukadev Bhattiprolu  },
3290835e5bd9SJames Clark  {
32912a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb084",
32922a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU0_VECTOR_SP_ISSUED",
32932a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Single Precision vector instruction issued (executed)",
32942a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
32952a81fa3bSSukadev Bhattiprolu  },
3296835e5bd9SJames Clark  {
32972a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa0a6",
32982a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_16FLOP",
32992a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Sixteen flops operation (SP vector versions of fdiv,fsqrt)",
33002a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
33012a81fa3bSSukadev Bhattiprolu  },
3302835e5bd9SJames Clark  {
33032a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa082",
33042a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_1FLOP",
33052a81fa3bSSukadev Bhattiprolu    "BriefDescription": "one flop (fadd, fmul, fsub, fcmp, fsel, fabs, fnabs, fres, fsqrte, fneg) operation finished",
33062a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
33072a81fa3bSSukadev Bhattiprolu  },
3308835e5bd9SJames Clark  {
33092a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa09a",
33102a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_2FLOP",
33112a81fa3bSSukadev Bhattiprolu    "BriefDescription": "two flops operation (scalar fmadd, fnmadd, fmsub, fnmsub and DP vector versions of single flop instructions)",
33122a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
33132a81fa3bSSukadev Bhattiprolu  },
3314835e5bd9SJames Clark  {
33152a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa09e",
33162a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_4FLOP",
33172a81fa3bSSukadev Bhattiprolu    "BriefDescription": "four flops operation (scalar fdiv, fsqrt, DP vector version of fmadd, fnmadd, fmsub, fnmsub, SP vector versions of single flop instructions)",
33182a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
33192a81fa3bSSukadev Bhattiprolu  },
3320835e5bd9SJames Clark  {
33212a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa0a2",
33222a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_8FLOP",
33232a81fa3bSSukadev Bhattiprolu    "BriefDescription": "eight flops operation (DP vector versions of fdiv,fsqrt and SP vector versions of fmadd,fnmadd,fmsub,fnmsub)",
33242a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
33252a81fa3bSSukadev Bhattiprolu  },
3326835e5bd9SJames Clark  {
33272a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb0a6",
33282a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_COMPLEX_ISSUED",
33292a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Complex VMX instruction issued",
33302a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
33312a81fa3bSSukadev Bhattiprolu  },
3332835e5bd9SJames Clark  {
33332a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb0b6",
33342a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_CY_ISSUED",
33352a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Cryptographic instruction RFC02196 Issued",
33362a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
33372a81fa3bSSukadev Bhattiprolu  },
3338835e5bd9SJames Clark  {
33392a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb0aa",
33402a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_DD_ISSUED",
33412a81fa3bSSukadev Bhattiprolu    "BriefDescription": "64BIT Decimal Issued",
33422a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
33432a81fa3bSSukadev Bhattiprolu  },
3344835e5bd9SJames Clark  {
33452a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa08e",
33462a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_DP_2FLOP",
33472a81fa3bSSukadev Bhattiprolu    "BriefDescription": "DP vector version of fmul, fsub, fcmp, fsel, fabs, fnabs, fres ,fsqrte, fneg",
33482a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
33492a81fa3bSSukadev Bhattiprolu  },
3350835e5bd9SJames Clark  {
33512a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa092",
33522a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_DP_FMA",
33532a81fa3bSSukadev Bhattiprolu    "BriefDescription": "DP vector version of fmadd,fnmadd,fmsub,fnmsub",
33542a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
33552a81fa3bSSukadev Bhattiprolu  },
3356835e5bd9SJames Clark  {
33572a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa096",
33582a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_DP_FSQRT_FDIV",
33592a81fa3bSSukadev Bhattiprolu    "BriefDescription": "DP vector versions of fdiv,fsqrt",
33602a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
33612a81fa3bSSukadev Bhattiprolu  },
3362835e5bd9SJames Clark  {
33632a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb0ae",
33642a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_DQ_ISSUED",
33652a81fa3bSSukadev Bhattiprolu    "BriefDescription": "128BIT Decimal Issued",
33662a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
33672a81fa3bSSukadev Bhattiprolu  },
3368835e5bd9SJames Clark  {
33692a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb0b2",
33702a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_EX_ISSUED",
33712a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Direct move 32/64b VRFtoGPR RFC02206 Issued",
33722a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
33732a81fa3bSSukadev Bhattiprolu  },
3374835e5bd9SJames Clark  {
33752a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa0be",
33762a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_FIN",
33772a81fa3bSSukadev Bhattiprolu    "BriefDescription": "VSU1 Finished an instruction",
33782a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
33792a81fa3bSSukadev Bhattiprolu  },
3380835e5bd9SJames Clark  {
33812a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa086",
33822a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_FMA",
33832a81fa3bSSukadev Bhattiprolu    "BriefDescription": "two flops operation (fmadd, fnmadd, fmsub, fnmsub) Scalar instructions only!",
33842a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
33852a81fa3bSSukadev Bhattiprolu  },
3386835e5bd9SJames Clark  {
33872a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb09a",
33882a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_FPSCR",
33892a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Move to/from FPSCR type instruction issued on Pipe 0",
33902a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
33912a81fa3bSSukadev Bhattiprolu  },
3392835e5bd9SJames Clark  {
33932a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa08a",
33942a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_FSQRT_FDIV",
33952a81fa3bSSukadev Bhattiprolu    "BriefDescription": "four flops operation (fdiv,fsqrt) Scalar Instructions only!",
33962a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
33972a81fa3bSSukadev Bhattiprolu  },
3398835e5bd9SJames Clark  {
33992a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb092",
34002a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_PERMUTE_ISSUED",
34012a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Permute VMX Instruction Issued",
34022a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
34032a81fa3bSSukadev Bhattiprolu  },
3404835e5bd9SJames Clark  {
34052a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb08a",
34062a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_SCALAR_DP_ISSUED",
34072a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Double Precision scalar instruction issued on Pipe1",
34082a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
34092a81fa3bSSukadev Bhattiprolu  },
3410835e5bd9SJames Clark  {
34112a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb096",
34122a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_SIMPLE_ISSUED",
34132a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Simple VMX instruction issued",
34142a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
34152a81fa3bSSukadev Bhattiprolu  },
3416835e5bd9SJames Clark  {
34172a81fa3bSSukadev Bhattiprolu    "EventCode": "0xa0aa",
34182a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_SINGLE",
34192a81fa3bSSukadev Bhattiprolu    "BriefDescription": "FPU single precision",
34202a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
34212a81fa3bSSukadev Bhattiprolu  },
3422835e5bd9SJames Clark  {
34232a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb09e",
34242a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_SQ",
34252a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Store Vector Issued",
34262a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
34272a81fa3bSSukadev Bhattiprolu  },
3428835e5bd9SJames Clark  {
34292a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb08e",
34302a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_STF",
34312a81fa3bSSukadev Bhattiprolu    "BriefDescription": "FPU store (SP or DP) issued on Pipe1",
34322a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
34332a81fa3bSSukadev Bhattiprolu  },
3434835e5bd9SJames Clark  {
34352a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb082",
34362a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_VECTOR_DP_ISSUED",
34372a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Double Precision vector instruction issued on Pipe1",
34382a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
34392a81fa3bSSukadev Bhattiprolu  },
3440835e5bd9SJames Clark  {
34412a81fa3bSSukadev Bhattiprolu    "EventCode": "0xb086",
34422a81fa3bSSukadev Bhattiprolu    "EventName": "PM_VSU1_VECTOR_SP_ISSUED",
34432a81fa3bSSukadev Bhattiprolu    "BriefDescription": "Single Precision vector instruction issued (executed)",
34442a81fa3bSSukadev Bhattiprolu    "PublicDescription": ""
3445835e5bd9SJames Clark  }
34462a81fa3bSSukadev Bhattiprolu]
3447