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Searched +full:0 +full:x18020000 (Results 1 – 14 of 14) sorted by relevance

/openbmc/u-boot/doc/device-tree-bindings/serial/
H A Dqca,ar9330-uart.txt23 reg = <0x18020000 0x14>;
/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Dqca,ar9330-uart.yaml44 reg = <0x18020000 0x14>;
/openbmc/u-boot/arch/mips/dts/
H A Dqca953x.dtsi16 #size-cells = <0>;
18 cpu@0 {
21 reg = <0>;
31 #clock-cells = <0>;
43 reg = <0x18040000 0x100>;
62 reg = <0x18020000 0x20>;
72 reg = <0x1f000000 0x10>;
77 #size-cells = <0>;
H A Dar934x.dtsi16 #size-cells = <0>;
18 cpu@0 {
21 reg = <0>;
31 #clock-cells = <0>;
53 reg = <0x1b000100 0x100>;
60 reg = <0x18020000 0x20>;
66 gmac0: eth@0x19000000 {
68 reg = <0x19000000 0x200>;
76 #size-cells = <0>;
77 phy0: ethernet-phy@0 {
[all …]
H A Dar933x.dtsi16 #size-cells = <0>;
18 cpu@0 {
21 reg = <0>;
31 #clock-cells = <0>;
43 reg = <0x18040000 0x100>;
62 reg = <0x1b000100 0x100>;
69 reg = <0x18020000 0x20>;
74 gmac0: eth@0x19000000 {
76 reg = <0x19000000 0x200>;
84 #size-cells = <0>;
[all …]
/openbmc/linux/arch/mips/boot/dts/qca/
H A Dar9132.dtsi12 #size-cells = <0>;
14 cpu@0 {
18 reg = <0>;
30 <&ddr_ctrl 0>, <&ddr_ctrl 1>;
54 reg = <0x18000000 0x100>;
61 reg = <0x18020000 0x20>;
77 reg = <0x18040000 0x30>;
92 reg = <0x18050000 0x20>;
103 reg = <0x18060008 0x8>;
114 reg = <0x18060010 0x8>;
[all …]
H A Dar9331.dtsi12 #size-cells = <0>;
14 cpu@0 {
18 reg = <0>;
34 #clock-cells = <0>;
57 reg = <0x18000000 0x100>;
64 reg = <0x18020000 0x14>;
76 reg = <0x18040000 0x34>;
92 reg = <0x18050000 0x100>;
102 reg = <0x18060010 0x8>;
113 reg = <0x1806001c 0x4>;
[all …]
/openbmc/u-boot/drivers/misc/
H A Daspeed_dp.c16 #define MCU_CTRL 0x180100e0
17 #define MCU_CTRL_AHBS_IMEM_EN BIT(0)
30 #define MCU_INTR_CTRL 0x180100e8
31 #define MCU_INTR_CTRL_CLR GENMASK(7, 0)
35 #define MCU_IMEM_START 0x18020000
48 writel(0x0000dead, 0x18000e00); // mark re-driver cfg not ready in _redriver_cfg()
51 for (i = 0; i < len / sizeof(u32); ++i) in _redriver_cfg()
52 writel(fdt32_to_cpu(cell[i]), 0x18000e04 + i * 4); in _redriver_cfg()
63 writel(tmp, 0x18000e28); in _redriver_cfg()
70 writel(tmp, 0x18000e2c); in _redriver_cfg()
[all …]
/openbmc/linux/arch/mips/boot/dts/loongson/
H A Dls7a-pch.dtsi8 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* PIO & CONF & APB */
9 0 0x20000000 0 0x20000000 0 0x10000000
10 0 0x40000000 0 0x40000000 0 0x40000000 /* PCI MEM */
11 0xe00 0x00000000 0xe00 0x00000000 0x100 0x0000000>;
15 reg = <0 0x10000000 0 0x400>;
18 loongson,pic-base-vec = <0>;
24 reg = <0 0x100d0100 0 0x78>;
31 reg = <0 0x10080000 0 0x100>;
41 reg = <0 0x10080100 0 0x100>;
51 reg = <0 0x10080200 0 0x100>;
[all …]
/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm-cygnus.dtsi48 memory@0 {
50 reg = <0 0>;
55 #size-cells = <0>;
57 cpu@0 {
61 reg = <0x0>;
74 ranges = <0x00000000 0x19000000 0x1000000>;
80 reg = <0x20200 0x100>;
88 #address-cells = <0>;
90 reg = <0x21000 0x1000>,
91 <0x20100 0x100>;
[all …]
/openbmc/linux/sound/soc/codecs/
H A Drt5677-spi.c44 #define RT5677_SPI_WRITE_BURST 0x5
45 #define RT5677_SPI_READ_BURST 0x4
46 #define RT5677_SPI_WRITE_32 0x3
47 #define RT5677_SPI_READ_32 0x2
48 #define RT5677_SPI_WRITE_16 0x1
49 #define RT5677_SPI_READ_16 0x0
51 #define RT5677_BUF_BYTES_TOTAL 0x20000
52 #define RT5677_MIC_BUF_ADDR 0x60030000
53 #define RT5677_MODEL_ADDR 0x5FFC9800
56 #define RT5677_MIC_BUF_FIRST_READ_SIZE 0x10000
[all …]
H A Drt5677.c37 #define RT5677_DEVICE_ID 0x6327
40 #define RT5677_DSP_BOOT_VECTOR 0x1801f090
41 #define RT5677_MODEL_ADDR 0x5FFC9800
43 #define RT5677_PR_RANGE_BASE (0xff + 1)
44 #define RT5677_PR_SPACING 0x100
46 #define RT5677_PR_BASE (RT5677_PR_RANGE_BASE + (0 * RT5677_PR_SPACING))
52 .range_max = RT5677_PR_BASE + 0xfd,
54 .selector_mask = 0xff,
55 .selector_shift = 0x0,
57 .window_len = 0x1,
[all …]
/openbmc/linux/drivers/clk/hisilicon/
H A Dclk-hi3559a.c22 #define CRG_BASE_ADDR 0x18020000
62 { HI3559AV100_FIXED_1188M, "1188m", NULL, 0, 1188000000, },
63 { HI3559AV100_FIXED_1000M, "1000m", NULL, 0, 1000000000, },
64 { HI3559AV100_FIXED_842M, "842m", NULL, 0, 842000000, },
65 { HI3559AV100_FIXED_792M, "792m", NULL, 0, 792000000, },
66 { HI3559AV100_FIXED_750M, "750m", NULL, 0, 750000000, },
67 { HI3559AV100_FIXED_710M, "710m", NULL, 0, 710000000, },
68 { HI3559AV100_FIXED_680M, "680m", NULL, 0, 680000000, },
69 { HI3559AV100_FIXED_667M, "667m", NULL, 0, 667000000, },
70 { HI3559AV100_FIXED_631M, "631m", NULL, 0, 631000000, },
[all …]
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-am65-main.dtsi12 reg = <0x0 0x70000000 0x0 0x200000>;
15 ranges = <0x0 0x0 0x70000000 0x200000>;
17 atf-sram@0 {
18 reg = <0x0 0x20000>;
22 reg = <0xf0000 0x10000>;
26 reg = <0x100000 0x100000>;
37 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
38 <0x00 0x01880000 0x00 0x90000>, /* GICR */
39 <0x00 0x6f000000 0x00 0x2000>, /* GICC */
40 <0x00 0x6f010000 0x00 0x1000>, /* GICH */
[all …]