Lines Matching +full:0 +full:x18020000
16 #define MCU_CTRL 0x180100e0
17 #define MCU_CTRL_AHBS_IMEM_EN BIT(0)
30 #define MCU_INTR_CTRL 0x180100e8
31 #define MCU_INTR_CTRL_CLR GENMASK(7, 0)
35 #define MCU_IMEM_START 0x18020000
48 writel(0x0000dead, 0x18000e00); // mark re-driver cfg not ready in _redriver_cfg()
51 for (i = 0; i < len / sizeof(u32); ++i) in _redriver_cfg()
52 writel(fdt32_to_cpu(cell[i]), 0x18000e04 + i * 4); in _redriver_cfg()
63 writel(tmp, 0x18000e28); in _redriver_cfg()
70 writel(tmp, 0x18000e2c); in _redriver_cfg()
74 tmp = 0x70; in _redriver_cfg()
75 writel(tmp, 0x18000e30); in _redriver_cfg()
76 writel(0x0000cafe, 0x18000e00); // mark re-driver cfg ready in _redriver_cfg()
83 int i, ret = 0; in aspeed_dp_probe()
85 bool is_mcu_stop = ((readl(0x1e6e2100) & BIT(13)) == 0); in aspeed_dp_probe()
88 dp->ctrl_base = (void *)devfdt_get_addr_index(dev, 0); in aspeed_dp_probe()
92 ret = reset_get_by_index(dev, 0, &dp_reset_ctl); in aspeed_dp_probe()
114 writel(readl(dp->ctrl_base + 0xB8) & ~(BIT(24) | BIT(28)), dp->ctrl_base + 0xB8); in aspeed_dp_probe()
118 writel(0, 0x18000de0); in aspeed_dp_probe()
137 for (i = 0; i < ARRAY_SIZE(firmware_ast2600_dp); i++) in aspeed_dp_probe()
146 writel(FIELD_PREP(MCU_INTR_CTRL_EN, 0xff), MCU_INTR_CTRL); in aspeed_dp_probe()
150 writel(readl(0x1e6e2100) | (0x7 << 9), 0x1e6e2100); in aspeed_dp_probe()
152 return 0; in aspeed_dp_probe()
160 dp->ctrl_base = (void *)devfdt_get_addr_index(dev, 0); in dp_aspeed_ofdata_to_platdata()
162 return 0; in dp_aspeed_ofdata_to_platdata()