Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7 |
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#
0e73f1ba |
| 11-Dec-2023 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
MIPS: dts: loongson: drop incorrect dwmac fallback compatible
[ Upstream commit 4907a3f54b12b8209864572a312cf967befcae80 ]
Device binds to proper PCI ID (LOONGSON, 0x7a03), already listed in DTS, s
MIPS: dts: loongson: drop incorrect dwmac fallback compatible
[ Upstream commit 4907a3f54b12b8209864572a312cf967befcae80 ]
Device binds to proper PCI ID (LOONGSON, 0x7a03), already listed in DTS, so checking for some other compatible does not make sense. It cannot be bound to unsupported platform.
Drop useless, incorrect (space in between) and undocumented compatible.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Yanteng Si <siyanteng@loongson.cn> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Sasha Levin <sashal@kernel.org>
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Revision tags: v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32 |
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#
8a649e33 |
| 02-Jun-2023 |
Binbin Zhou <zhoubinbin@loongson.cn> |
MIPS: Loongson64: DTS: Add RTC support to LS7A PCH
The RTC module is now supported, enable it.
Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Si
MIPS: Loongson64: DTS: Add RTC support to LS7A PCH
The RTC module is now supported, enable it.
Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Signed-off-by: WANG Xuerui <git@xen0n.name> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Revision tags: v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48, v5.15.47, v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36, v5.15.35, v5.15.34, v5.15.33, v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26, v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.16, v5.15.10, v5.15.9, v5.15.8, v5.15.7, v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46 |
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#
47a311c3 |
| 17-Jun-2021 |
Qing Zhang <zhangqing@loongson.cn> |
MIPS: Loongson64: DTS: Add GMAC support for LS7A PCH
The GMAC module is now supported, enable it.
Signed-off-by: Qing Zhang <zhangqing@loongson.cn> Signed-off-by: David S. Miller <davem@davemloft.n
MIPS: Loongson64: DTS: Add GMAC support for LS7A PCH
The GMAC module is now supported, enable it.
Signed-off-by: Qing Zhang <zhangqing@loongson.cn> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39 |
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#
15b32eb2 |
| 21-May-2021 |
zhaoxiao <zhaoxiao@uniontech.com> |
mips: dts: loongson: fix DTC unit name warnings
Fixes the following W=1 kernel build warning(s): arch/mips/boot/dts/loongson/ls7a-pch.dtsi:410.7-415.5: Warning (unit_address_vs_reg): /bus@10000000/i
mips: dts: loongson: fix DTC unit name warnings
Fixes the following W=1 kernel build warning(s): arch/mips/boot/dts/loongson/ls7a-pch.dtsi:410.7-415.5: Warning (unit_address_vs_reg): /bus@10000000/isa: node has a reg or ranges property, but no unit name arch/mips/boot/dts/loongson/ls7a-pch.dtsi:410.7-415.5: Warning (simple_bus_reg): /bus@10000000/isa: simple-bus unit address format error, expected "18000000"
Signed-off-by: zhaoxiao <zhaoxiao@uniontech.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Revision tags: v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14, v5.10, v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11 |
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#
5fa1f768 |
| 17-Sep-2020 |
Tiezhu Yang <yangtiezhu@loongson.cn> |
MIPS: Loongson64: Add UART node for LS7A PCH
When I update the latest kernel on the Loongson platform used with LS7A bridge chip, the serial console has no output, this is because the machine uses L
MIPS: Loongson64: Add UART node for LS7A PCH
When I update the latest kernel on the Loongson platform used with LS7A bridge chip, the serial console has no output, this is because the machine uses LS7A UART0 instead of CPU UART0, add UART node for LS7A PCH to enhance the compatibility.
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Revision tags: v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62, v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54 |
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#
b91aff3b |
| 28-Jul-2020 |
Jiaxun Yang <jiaxun.yang@flygoat.com> |
MIPS: Loongson64: Add ISA node for LS7A PCH
Although currently we're not enabling any ISA device in devicetree, but this node is required to express the ranges of address reserved for ISA.
Signed-o
MIPS: Loongson64: Add ISA node for LS7A PCH
Although currently we're not enabling any ISA device in devicetree, but this node is required to express the ranges of address reserved for ISA.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Revision tags: v5.7.10, v5.4.53, v5.4.52, v5.7.9 |
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#
24af1059 |
| 09-Jul-2020 |
Jiaxun Yang <jiaxun.yang@flygoat.com> |
MIPS: Loongson64: DeviceTree for LS7A PCH
Add DeviceTree files for Classic Loongson64 Quad Core + LS7A boards and Generic Loongson64 Quad Core + LS7A boards.
Signed-off-by: Huacai Chen <chenhc@lemo
MIPS: Loongson64: DeviceTree for LS7A PCH
Add DeviceTree files for Classic Loongson64 Quad Core + LS7A boards and Generic Loongson64 Quad Core + LS7A boards.
Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Revision tags: v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14, v5.10, v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11 |
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#
5fa1f768 |
| 17-Sep-2020 |
Tiezhu Yang <yangtiezhu@loongson.cn> |
MIPS: Loongson64: Add UART node for LS7A PCH When I update the latest kernel on the Loongson platform used with LS7A bridge chip, the serial console has no output, this is because th
MIPS: Loongson64: Add UART node for LS7A PCH When I update the latest kernel on the Loongson platform used with LS7A bridge chip, the serial console has no output, this is because the machine uses LS7A UART0 instead of CPU UART0, add UART node for LS7A PCH to enhance the compatibility. Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
show more ...
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Revision tags: v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62, v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54 |
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#
b91aff3b |
| 28-Jul-2020 |
Jiaxun Yang <jiaxun.yang@flygoat.com> |
MIPS: Loongson64: Add ISA node for LS7A PCH Although currently we're not enabling any ISA device in devicetree, but this node is required to express the ranges of address reserved fo
MIPS: Loongson64: Add ISA node for LS7A PCH Although currently we're not enabling any ISA device in devicetree, but this node is required to express the ranges of address reserved for ISA. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Revision tags: v5.7.10, v5.4.53, v5.4.52, v5.7.9 |
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#
24af1059 |
| 09-Jul-2020 |
Jiaxun Yang <jiaxun.yang@flygoat.com> |
MIPS: Loongson64: DeviceTree for LS7A PCH Add DeviceTree files for Classic Loongson64 Quad Core + LS7A boards and Generic Loongson64 Quad Core + LS7A boards. Signed-off-by: Huac
MIPS: Loongson64: DeviceTree for LS7A PCH Add DeviceTree files for Classic Loongson64 Quad Core + LS7A boards and Generic Loongson64 Quad Core + LS7A boards. Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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