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Searched +full:0 +full:x00030001 (Results 1 – 24 of 24) sorted by relevance

/openbmc/qemu/tests/tcg/hexagon/
H A Dtest_vavgw.S4 * 0x00030001 averaged with 0x00010003 results 0x00020002.
20 r1:0 = vavgw(r1:0, r3:2):crnd
/openbmc/linux/drivers/gpu/drm/vmwgfx/device_include/
H A Dsvga_escape.h38 #define SVGA_ESCAPE_NSID_VMWARE 0x00000000
39 #define SVGA_ESCAPE_NSID_DEVEL 0xFFFFFFFF
41 #define SVGA_ESCAPE_VMWARE_MAJOR_MASK 0xFFFF0000
43 #define SVGA_ESCAPE_VMWARE_HINT 0x00030000
44 #define SVGA_ESCAPE_VMWARE_HINT_FULLSCREEN 0x00030001
/openbmc/linux/Documentation/devicetree/bindings/thermal/
H A Dqoriq-thermal.yaml16 Register (IPBRR0) at offset 0x0BF8.
20 0x01900102 T1040
78 reg = <0xf0000 0x1000>;
79 interrupts = <18 2 0 0>;
80 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
81 fsl,tmu-calibration = <0x00000000 0x00000025>,
82 <0x00000001 0x00000028>,
83 <0x00000002 0x0000002d>,
84 <0x00000003 0x00000031>,
85 <0x00000004 0x00000036>,
[all …]
/openbmc/qemu/include/hw/arm/
H A Draspberrypi-fw-defs.h15 RPI_FWREQ_PROPERTY_END = 0,
16 RPI_FWREQ_GET_FIRMWARE_REVISION = 0x00000001,
17 RPI_FWREQ_GET_FIRMWARE_VARIANT = 0x00000002,
18 RPI_FWREQ_GET_FIRMWARE_HASH = 0x00000003,
20 RPI_FWREQ_SET_CURSOR_INFO = 0x00008010,
21 RPI_FWREQ_SET_CURSOR_STATE = 0x00008011,
23 RPI_FWREQ_GET_BOARD_MODEL = 0x00010001,
24 RPI_FWREQ_GET_BOARD_REVISION = 0x00010002,
25 RPI_FWREQ_GET_BOARD_MAC_ADDRESS = 0x00010003,
26 RPI_FWREQ_GET_BOARD_SERIAL = 0x00010004,
[all …]
/openbmc/linux/include/soc/bcm2835/
H A Draspberrypi-firmware.h15 RPI_FIRMWARE_STATUS_REQUEST = 0,
16 RPI_FIRMWARE_STATUS_SUCCESS = 0x80000000,
17 RPI_FIRMWARE_STATUS_ERROR = 0x80000001,
37 RPI_FIRMWARE_PROPERTY_END = 0,
38 RPI_FIRMWARE_GET_FIRMWARE_REVISION = 0x00000001,
40 RPI_FIRMWARE_SET_CURSOR_INFO = 0x00008010,
41 RPI_FIRMWARE_SET_CURSOR_STATE = 0x00008011,
43 RPI_FIRMWARE_GET_BOARD_MODEL = 0x00010001,
44 RPI_FIRMWARE_GET_BOARD_REVISION = 0x00010002,
45 RPI_FIRMWARE_GET_BOARD_MAC_ADDRESS = 0x00010003,
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dapq8096-ifc6640.dts16 qcom,msm-id = <291 0x00030001>;
17 qcom,board-id = <0x00010018 0>;
87 pinctrl-0 = <&blsp2_uart2_2pins_default>;
127 regulators-0 {
/openbmc/u-boot/arch/arm/dts/
H A Dfsl-imx8mq.dtsi47 reg = <0x00000000 0x40000000 0 0xc0000000>;
52 reg = <0x0 0x38800000 0 0x10000>, /* GIC Dist */
53 <0x0 0x38880000 0 0xC0000>; /* GICR (RD_base + SGI_base) */
82 reg = <0x0 0x30670000 0x0 0x10000>;
93 reg = <0x0 0x30200000 0x0 0x10000>;
104 reg = <0x0 0x30210000 0x0 0x10000>;
115 reg = <0x0 0x30220000 0x0 0x10000>;
126 reg = <0x0 0x30230000 0x0 0x10000>;
137 reg = <0x0 0x30240000 0x0 0x10000>;
148 reg = <0x0 0x30260000 0x0 0x10000>;
[all …]
/openbmc/linux/drivers/s390/char/
H A Dsclp_cmd.c41 return sclp_sync_request_timeout(cmd, sccb, 0); in sclp_sync_request()
70 pr_warn("sync request failed (cmd=0x%08x, status=0x%02x)\n", in sclp_sync_request_timeout()
83 #define SCLP_CMDW_CONFIGURE_CPU 0x00110001
84 #define SCLP_CMDW_DECONFIGURE_CPU 0x00100001
99 sccb->header.control_mask[2] = 0x80; in _sclp_get_core_info()
104 if (sccb->header.response_code != 0x0010) { in _sclp_get_core_info()
105 pr_warn("readcpuinfo failed (response=0x%04x)\n", in _sclp_get_core_info()
139 case 0x0020: in do_core_configure()
140 case 0x0120: in do_core_configure()
143 pr_warn("configure cpu failed (cmd=0x%08x, response=0x%04x)\n", in do_core_configure()
[all …]
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dt1023si-post.dtsi39 alloc-ranges = <0 0 0x10000 0>;
44 alloc-ranges = <0 0 0x10000 0>;
49 alloc-ranges = <0 0 0x10000 0>;
56 interrupts = <25 2 0 0>;
64 bus-range = <0x0 0xff>;
65 interrupts = <20 2 0 0>;
67 pcie@0 {
68 reg = <0 0 0 0 0>;
73 interrupts = <20 2 0 0>;
74 interrupt-map-mask = <0xf800 0 0 7>;
[all …]
H A Dt1040si-post.dtsi39 alloc-ranges = <0 0 0x10000 0>;
44 alloc-ranges = <0 0 0x10000 0>;
49 alloc-ranges = <0 0 0x10000 0>;
56 interrupts = <25 2 0 0>;
64 bus-range = <0x0 0xff>;
65 interrupts = <20 2 0 0>;
67 pcie@0 {
68 reg = <0 0 0 0 0>;
73 interrupts = <20 2 0 0>;
74 interrupt-map-mask = <0xf800 0 0 7>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1012a.dtsi32 #size-cells = <0>;
34 cpu0: cpu@0 {
37 reg = <0x0>;
38 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
54 arm,psci-suspend-param = <0x0>;
63 #clock-cells = <0>;
70 #clock-cells = <0>;
85 interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
92 reg = <0x0 0x1401000 0 0x1000>, /* GICD */
93 <0x0 0x1402000 0 0x2000>, /* GICC */
[all …]
H A Dfsl-ls1046a.dtsi38 #size-cells = <0>;
40 cpu0: cpu@0 {
43 reg = <0x0>;
44 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
53 reg = <0x1>;
54 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
63 reg = <0x2>;
64 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
73 reg = <0x3>;
74 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
[all …]
H A Dfsl-ls1043a.dtsi37 #size-cells = <0>;
45 cpu0: cpu@0 {
48 reg = <0x0>;
49 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
58 reg = <0x1>;
59 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
68 reg = <0x2>;
69 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
78 reg = <0x3>;
79 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
[all …]
H A Dfsl-ls1088a.dtsi27 #size-cells = <0>;
30 cpu0: cpu@0 {
33 reg = <0x0>;
34 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
42 reg = <0x1>;
43 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
51 reg = <0x2>;
52 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
60 reg = <0x3>;
61 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
[all …]
H A Dfsl-ls208xa.dtsi33 #size-cells = <0>;
38 reg = <0x00000000 0x80000000 0 0x80000000>;
44 #clock-cells = <0>;
51 reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
52 <0x0 0x06100000 0 0x100000>, /* GICR (RD_base + SGI_base) */
53 <0x0 0x0c0c0000 0 0x2000>, /* GICC */
54 <0x0 0x0c0d0000 0 0x1000>, /* GICH */
55 <0x0 0x0c0e0000 0 0x20000>; /* GICV */
61 interrupts = <1 9 0x4>;
66 reg = <0x0 0x6020000 0 0x20000>;
[all …]
H A Dfsl-ls1028a.dtsi23 #size-cells = <0>;
25 cpu0: cpu@0 {
28 reg = <0x0>;
30 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
31 i-cache-size = <0xc000>;
34 d-cache-size = <0x8000>;
45 reg = <0x1>;
47 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
48 i-cache-size = <0xc000>;
51 d-cache-size = <0x8000>;
[all …]
H A Dimx8mq.dtsi47 #clock-cells = <0>;
54 #clock-cells = <0>;
61 #clock-cells = <0>;
68 #clock-cells = <0>;
75 #clock-cells = <0>;
82 #clock-cells = <0>;
89 #clock-cells = <0>;
96 #clock-cells = <0>;
103 #size-cells = <0>;
105 A53_0: cpu@0 {
[all …]
/openbmc/linux/include/uapi/scsi/fc/
H A Dfc_els.h20 * ELS Command codes - byte 0 of the frame payload
23 ELS_LS_RJT = 0x01, /* ESL reject */
24 ELS_LS_ACC = 0x02, /* ESL Accept */
25 ELS_PLOGI = 0x03, /* N_Port login */
26 ELS_FLOGI = 0x04, /* F_Port login */
27 ELS_LOGO = 0x05, /* Logout */
28 ELS_ABTX = 0x06, /* Abort exchange - obsolete */
29 ELS_RCS = 0x07, /* read connection status */
30 ELS_RES = 0x08, /* read exchange status block */
31 ELS_RSS = 0x09, /* read sequence status block */
[all …]
/openbmc/linux/fs/dlm/
H A Ddlm_internal.h71 } while (0)
78 } while (0)
85 } while (0)
102 #define DLM_RTF_SHRINK_BIT 0
186 * lkb_nodeid: when the lkb is a local copy, nodeid is 0; when the lkb
212 #define DLM_DFL_USER_BIT 0
217 #define DLM_CB_CAST 0x00000001
218 #define DLM_CB_BAST 0x00000002
282 * res_master_nodeid is "normal": 0 is unset/invalid, non-zero is the real
335 #define R_REQUEST 0x00000001
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/ls/
H A Dls1021a.dtsi31 #size-cells = <0>;
36 reg = <0xf00>;
37 clocks = <&clockgen 1 0>;
44 reg = <0xf01>;
45 clocks = <&clockgen 1 0>;
50 memory@0 {
52 reg = <0x0 0x0 0x0 0x0>;
57 #clock-cells = <0>;
80 offset = <0xb0>;
81 mask = <0x02>;
[all …]
/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_powertune.c39 …L__MAX_POWER_DELTA_HI_MASK, DIDT_SQ_TUNING_CTRL__MAX_POWER_DELTA_HI__SHIFT, 0x3853 },
40 …L__MAX_POWER_DELTA_LO_MASK, DIDT_SQ_TUNING_CTRL__MAX_POWER_DELTA_LO__SHIFT, 0x3153 },
43 …L__MAX_POWER_DELTA_HI_MASK, DIDT_TD_TUNING_CTRL__MAX_POWER_DELTA_HI__SHIFT, 0x0dde },
44 …L__MAX_POWER_DELTA_LO_MASK, DIDT_TD_TUNING_CTRL__MAX_POWER_DELTA_LO__SHIFT, 0x0dde },
47 …RL__MAX_POWER_DELTA_HI_MASK, DIDT_TCP_TUNING_CTRL__MAX_POWER_DELTA_HI__SHIFT, 0x3dde },
48 …RL__MAX_POWER_DELTA_LO_MASK, DIDT_TCP_TUNING_CTRL__MAX_POWER_DELTA_LO__SHIFT, 0x3dde },
51 …L__MAX_POWER_DELTA_HI_MASK, DIDT_DB_TUNING_CTRL__MAX_POWER_DELTA_HI__SHIFT, 0x3dde },
52 …L__MAX_POWER_DELTA_LO_MASK, DIDT_DB_TUNING_CTRL__MAX_POWER_DELTA_LO__SHIFT, 0x3dde },
54 { 0xFFFFFFFF } /* End of list */
63 …DT_SQ_CTRL3__GC_DIDT_ENABLE_MASK, DIDT_SQ_CTRL3__GC_DIDT_ENABLE__SHIFT, 0x0000 },
[all …]
/openbmc/linux/drivers/net/ethernet/sfc/siena/
H A Dmcdi_pcol.h36 #define MC_SMEM_P0_DOORBELL_OFST 0x000
37 #define MC_SMEM_P1_DOORBELL_OFST 0x004
39 #define MC_SMEM_P0_PDU_OFST 0x008
40 #define MC_SMEM_P1_PDU_OFST 0x108
41 #define MC_SMEM_PDU_LEN 0x100
42 #define MC_SMEM_P0_PTP_TIME_OFST 0x7f0
43 #define MC_SMEM_P0_STATUS_OFST 0x7f8
44 #define MC_SMEM_P1_STATUS_OFST 0x7fc
48 #define MC_STATUS_DWORD_REBOOT (0xb007b007)
49 #define MC_STATUS_DWORD_ASSERT (0xdeaddead)
[all …]
/openbmc/linux/drivers/net/ethernet/sfc/
H A Dmcdi_pcol.h36 #define MC_SMEM_P0_DOORBELL_OFST 0x000
37 #define MC_SMEM_P1_DOORBELL_OFST 0x004
39 #define MC_SMEM_P0_PDU_OFST 0x008
40 #define MC_SMEM_P1_PDU_OFST 0x108
41 #define MC_SMEM_PDU_LEN 0x100
42 #define MC_SMEM_P0_PTP_TIME_OFST 0x7f0
43 #define MC_SMEM_P0_STATUS_OFST 0x7f8
44 #define MC_SMEM_P1_STATUS_OFST 0x7fc
48 #define MC_STATUS_DWORD_REBOOT (0xb007b007)
49 #define MC_STATUS_DWORD_ASSERT (0xdeaddead)
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtw89/
H A Drtw8852c_table.c10 {0xF0FF0000, 0x00000000},
11 {0xF03300FF, 0x00000001},
12 {0xF03400FF, 0x00000002},
13 {0xF03500FF, 0x00000003},
14 {0xF03600FF, 0x00000004},
15 {0x70C, 0x00000020},
16 {0x704, 0x601E0100},
17 {0x4000, 0x00000000},
18 {0x4004, 0xCA014000},
19 {0x4008, 0xC751D4F0},
[all …]