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Searched refs:xtal (Results 1 – 25 of 162) sorted by relevance

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/openbmc/linux/arch/arm/boot/dts/amlogic/
H A Dmeson6.dtsi51 clocks = <&xtal>, <&clk81>;
52 clock-names = "xtal", "pclk";
56 clocks = <&xtal>, <&clk81>, <&clk81>;
57 clock-names = "xtal", "pclk", "baud";
61 clocks = <&xtal>, <&clk81>, <&clk81>;
62 clock-names = "xtal", "pclk", "baud";
66 clocks = <&xtal>, <&clk81>, <&clk81>;
67 clock-names = "xtal", "pclk", "baud";
71 clocks = <&xtal>, <&clk81>, <&clk81>;
72 clock-names = "xtal", "pclk", "baud";
H A Dmeson8.dtsi256 clocks = <&xtal>;
257 clock-names = "xtal";
581 xtal_32k_out_pins: xtal-32k-out {
584 function = "xtal";
630 clocks = <&xtal>, <&ddr_clkc DDR_CLKID_DDR_PLL>;
631 clock-names = "xtal", "ddr_pll";
719 clocks = <&xtal>, <&clkc CLKID_SAR_ADC>;
728 clocks = <&xtal>,
754 clocks = <&xtal>, <&clkc CLKID_CLK81>;
755 clock-names = "xtal", "pclk";
[all …]
H A Dmeson8b.dtsi233 clocks = <&xtal>;
234 clock-names = "xtal";
591 clocks = <&xtal>, <&ddr_clkc DDR_CLKID_DDR_PLL>;
592 clock-names = "xtal", "ddr_pll";
694 clocks = <&xtal>, <&clkc CLKID_SAR_ADC>;
703 clocks = <&xtal>,
725 clocks = <&xtal>, <&clkc CLKID_CLK81>;
726 clock-names = "xtal", "pclk";
731 clocks = <&xtal>, <&clkc CLKID_CLK81>, <&clkc CLKID_CLK81>;
732 clock-names = "xtal", "pclk", "baud";
[all …]
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Damlogic-t7-a311d2-an400.dts27 xtal: xtal-clk { label
30 clock-output-names = "xtal";
36 clocks = <&xtal>, <&xtal>, <&xtal>;
37 clock-names = "xtal", "pclk", "baud";
H A Damlogic-t7-a311d2-khadas-vim4.dts41 xtal: xtal-clk { label
44 clock-output-names = "xtal";
52 clocks = <&xtal>, <&xtal>, <&xtal>;
53 clock-names = "xtal", "pclk", "baud";
H A Dmeson-a1.dtsi115 clocks = <&xtal>, <&xtal>, <&xtal>;
116 clock-names = "xtal", "pclk", "baud";
125 clocks = <&xtal>, <&xtal>, <&xtal>;
126 clock-names = "xtal", "pclk", "baud";
167 xtal: xtal-clk { label
170 clock-output-names = "xtal";
H A Damlogic-c3.dtsi43 xtal: xtal-clk { label
46 clock-output-names = "xtal";
116 clocks = <&xtal>, <&xtal>, <&xtal>;
117 clock-names = "xtal", "pclk", "baud";
H A Dmeson-s4.dtsi57 xtal: xtal-clk { label
60 clock-output-names = "xtal";
131 clocks = <&xtal>, <&xtal>, <&xtal>;
132 clock-names = "xtal", "pclk", "baud";
H A Dmeson-gxbb.dtsi286 clocks = <&xtal>, <&clkc CLKID_CLK81>;
287 clock-names = "xtal", "mpeg-clk";
322 assigned-clock-parents = <&xtal>, <0>;
330 clocks = <&xtal>;
331 clock-names = "xtal";
789 clocks = <&xtal>,
838 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
839 clock-names = "xtal", "pclk", "baud";
843 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
844 clock-names = "xtal", "pclk", "baud";
[all …]
H A Dmeson-gxl.dtsi310 clocks = <&xtal>, <&clkc CLKID_CLK81>;
311 clock-names = "xtal", "mpeg-clk";
334 assigned-clock-parents = <&xtal>, <0>;
342 clocks = <&xtal>;
343 clock-names = "xtal";
859 clocks = <&xtal>,
908 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
909 clock-names = "xtal", "pclk", "baud";
913 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
914 clock-names = "xtal", "pclk", "baud";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Darmada3700-xtal-clock.txt3 Marvell Armada 37xx SoCs allow to determine the xtal clock frequencies by
12 "marvell,armada-3700-xtal-clock"
17 output names ("xtal")
24 xtalclk: xtal-clk {
25 compatible = "marvell,armada-3700-xtal-clock";
26 clock-output-names = "xtal";
H A Dsilabs,si5351.txt23 handles, shall be xtal reference clock or xtal and clkin for
24 si5351c only. Corresponding clock input names are "xtal" and
46 2 = xtal
78 /* connect xtal input to 25MHz reference */
80 clock-names = "xtal";
82 /* connect xtal input as source of pll0 and pll1 */
119 * - xtal as clock source of output divider
H A Dnxp,lpc3220-clk.txt11 "xtal_32k" and may have optional "xtal"
27 clocks = <&xtal_32k>, <&xtal>;
28 clock-names = "xtal_32k", "xtal";
/openbmc/u-boot/arch/arm/dts/
H A Dmeson-gxbb.dtsi706 clocks = <&xtal>,
749 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
750 clock-names = "xtal", "pclk", "baud";
754 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
755 clock-names = "xtal", "pclk", "baud";
759 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
760 clock-names = "xtal", "pclk", "baud";
764 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
765 clock-names = "xtal", "pclk", "baud";
769 clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
[all …]
H A Dmeson-gxl.dtsi707 clocks = <&xtal>,
750 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
751 clock-names = "xtal", "pclk", "baud";
755 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
756 clock-names = "xtal", "pclk", "baud";
760 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
761 clock-names = "xtal", "pclk", "baud";
765 clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
766 clock-names = "xtal", "pclk", "baud";
770 clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
[all …]
/openbmc/u-boot/arch/mips/mach-ath79/qca953x/
H A Dclk.c34 u32 val, ctrl, xtal, pll, div; in get_clocks() local
39 xtal = qca953x_get_xtal(); in get_clocks()
46 pll = xtal / div; in get_clocks()
68 pll = xtal / div; in get_clocks()
/openbmc/linux/drivers/clk/renesas/
H A Drcar-usb2-clock-sel.c40 bool xtal; member
49 priv->extal, priv->xtal, val); in usb2_clock_sel_enable_extal_only()
51 if (priv->extal && !priv->xtal && val != CLKSET0_EXTAL_ONLY) in usb2_clock_sel_enable_extal_only()
57 if (priv->extal && !priv->xtal) in usb2_clock_sel_disable_extal_only()
169 priv->xtal = !!clk_get_rate(clk); in rcar_usb2_clock_sel_probe()
173 if (!priv->extal && !priv->xtal) { in rcar_usb2_clock_sel_probe()
/openbmc/linux/drivers/media/dvb-frontends/
H A Dcxd2841er.c60 enum cxd2841er_xtal xtal; member
312 static u32 cxd2841er_calc_iffreq_xtal(enum cxd2841er_xtal xtal, u32 ifhz) in cxd2841er_calc_iffreq_xtal() argument
315 (xtal == SONY_XTAL_24000) ? 48000000 : 41000000); in cxd2841er_calc_iffreq_xtal()
788 switch (priv->xtal) { in cxd2841er_shutdown_to_sleep_s()
802 __func__, priv->xtal); in cxd2841er_shutdown_to_sleep_s()
850 switch (priv->xtal) { in cxd2841er_shutdown_to_sleep_tc()
2118 seq_not2d_time = (priv->xtal == SONY_XTAL_24000)?0x0E:0x0C; in cxd2841er_dvbt2_set_profile()
2123 seq_not2d_time = (priv->xtal == SONY_XTAL_24000)?0x2E:0x28; in cxd2841er_dvbt2_set_profile()
2128 seq_not2d_time = (priv->xtal == SONY_XTAL_24000)?0x2E:0x28; in cxd2841er_dvbt2_set_profile()
2259 0x9F, nominalRate8bw[priv->xtal], 5); in cxd2841er_sleep_tc_to_active_t2_band()
[all …]
/openbmc/u-boot/arch/mips/mach-ath79/ar933x/
H A Dclk.c34 u32 val, xtal, pll, div; in get_clocks() local
38 xtal = ar933x_get_xtal(); in get_clocks()
44 pll = xtal / div; in get_clocks()
/openbmc/linux/Documentation/devicetree/bindings/net/ieee802154/
H A Dat86rf230.txt15 - xtal-trim: u8 value for fine tuning the internal capacitance
16 arrays of xtal pins: 0 = +0 pF, 0xf = +4.5 pF
26 xtal-trim = /bits/ 8 <0x06>;
/openbmc/u-boot/arch/mips/dts/
H A Dqca953x.dtsi30 xtal: xtal { label
33 clock-output-names = "xtal";
H A Dar934x.dtsi30 xtal: xtal { label
33 clock-output-names = "xtal";
H A Dar933x.dtsi30 xtal: xtal { label
33 clock-output-names = "xtal";
/openbmc/linux/drivers/media/tuners/
H A Dit913x.c19 u16 xtal; member
52 dev->xtal = 2000; in it913x_init()
59 dev->xtal = 640; in it913x_init()
94 dev->fn_min = dev->xtal * utmp; in it913x_init()
275 pre_lo_freq = t_cal_freq / dev->xtal; in it913x_set_params()
276 utmp = pre_lo_freq * dev->xtal; in it913x_set_params()
278 if ((t_cal_freq - utmp) >= (dev->xtal >> 1)) in it913x_set_params()
/openbmc/linux/drivers/media/platform/st/sti/c8sectpfe/
H A Dc8sectpfe-dvb.c46 .xtal = 16000000,
77 .xtal = 16000000,
84 .xtal = 16000000,
91 .xtal = 16000000,

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