| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn201/ |
| H A D | dcn201_hwseq.c | 269 for (i = 0; i < res_pool->timing_generator_count; i++) { in dcn201_init_hw()
277 for (i = 0; i < res_pool->timing_generator_count; i++) { in dcn201_init_hw()
301 for (i = 0; i < res_pool->timing_generator_count; i++) { in dcn201_init_hw()
330 for (i = 0; i < res_pool->timing_generator_count; i++) { in dcn201_init_hw()
346 for (i = 0; i < res_pool->timing_generator_count; i++) { in dcn201_init_hw()
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| H A D | dcn201_resource.c | 1257 pool->base.timing_generator_count = i; in dcn201_resource_construct()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_hw_sequencer_debug.c | 427 for (i = 0; i < pool->timing_generator_count; i++) { in dcn10_get_otg_states()
494 for (i = 0; i < pool->timing_generator_count; i++) { in dcn10_clear_otpc_underflow()
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| H A D | dcn10_resource.c | 1626 pool->base.timing_generator_count = j; in dcn10_resource_construct()
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| H A D | dcn10_hw_sequencer.c | 354 for (i = 0; i < pool->timing_generator_count; i++) { in dcn10_log_hw_state()
1447 for (i = 0; i < dc->res_pool->timing_generator_count; i++) { in dcn10_init_pipes()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce80/ |
| H A D | dce80_resource.c | 968 pool->base.timing_generator_count = res_cap.num_timing_generator; in dce80_construct()
1170 pool->base.timing_generator_count = res_cap_81.num_timing_generator; in dce81_construct()
1370 pool->base.timing_generator_count = res_cap_83.num_timing_generator; in dce83_construct()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce60/ |
| H A D | dce60_resource.c | 961 pool->base.timing_generator_count = res_cap.num_timing_generator; in dce60_construct()
1156 pool->base.timing_generator_count = res_cap_61.num_timing_generator; in dce61_construct()
1354 pool->base.timing_generator_count = res_cap_64.num_timing_generator; in dce64_construct()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/ |
| H A D | core_types.h | 261 unsigned int timing_generator_count; member
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce120/ |
| H A D | dce120_resource.c | 1072 pool->base.timing_generator_count = pool->base.res_cap->num_timing_generator; in dce120_resource_construct()
1237 pool->base.timing_generator_count = j; in dce120_resource_construct()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_resource.c | 2351 if (i >= pool->timing_generator_count) { in acquire_first_free_pipe()
2352 int tg_inst = pool->timing_generator_count - 1; in acquire_first_free_pipe()
2429 if (new_ctx->stream_count >= dc->res_pool->timing_generator_count) { in dc_add_stream_to_ctx()
2630 if (tg_inst >= pool->timing_generator_count) in acquire_resource_from_hw_enabled_state()
2685 if (id_src[i] >= pool->timing_generator_count) { in acquire_resource_from_hw_enabled_state()
2686 id_src[i] = pool->timing_generator_count - 1; in acquire_resource_from_hw_enabled_state()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_hwseq.c | 192 for (i = 0; i < dc->res_pool->timing_generator_count; i++) { in dcn31_init_hw()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_hwseq.c | 2851 for (i = 0; i < dc->res_pool->timing_generator_count; i++) { in dcn20_fpga_init_hw()
2858 for (i = 0; i < res_pool->timing_generator_count; i++) { in dcn20_fpga_init_hw()
2913 for (i = 0; i < dc->res_pool->timing_generator_count; i++) { in dcn20_fpga_init_hw()
2929 for (i = 0; i < dc->res_pool->timing_generator_count; i++) { in dcn20_fpga_init_hw()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/link/protocols/ |
| H A D | link_edp_panel_control.c | 770 link->dc->res_pool->timing_generator_count; in edp_setup_psr()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce100/ |
| H A D | dce100_resource.c | 1069 pool->base.timing_generator_count = pool->base.res_cap->num_timing_generator; in dce100_resource_construct()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce112/ |
| H A D | dce112_resource.c | 1240 pool->base.timing_generator_count = pool->base.res_cap->num_timing_generator; in dce112_resource_construct()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn302/ |
| H A D | dcn302_resource.c | 1399 pool->timing_generator_count = i; in dcn302_resource_construct()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dce110/ |
| H A D | dce110_resource.c | 1369 pool->base.timing_generator_count = pool->base.res_cap->num_timing_generator; in dce110_resource_construct()
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| H A D | dce110_hw_sequencer.c | 1632 for (i = 0; i < dc->res_pool->timing_generator_count; i++) { in power_down_controllers()
1672 for (i = 0; i < dc->res_pool->timing_generator_count; i++) { in disable_vga_and_power_gate_all_controllers()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn303/ |
| H A D | dcn303_resource.c | 1311 pool->timing_generator_count = i; in dcn303_resource_construct()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn301/ |
| H A D | dcn301_resource.c | 1617 pool->base.timing_generator_count = j; in dcn301_resource_construct()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn21/ |
| H A D | dcn21_resource.c | 1660 pool->base.timing_generator_count = j; in dcn21_resource_construct()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn316/ |
| H A D | dcn316_resource.c | 1924 pool->base.timing_generator_count = i; in dcn316_resource_construct()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn315/ |
| H A D | dcn315_resource.c | 2037 pool->base.timing_generator_count = i; in dcn315_resource_construct()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn321/ |
| H A D | dcn321_resource.c | 1686 pool->base.timing_generator_count = num_pipes; in dcn321_resource_construct()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/ |
| H A D | dcn314_resource.c | 2054 pool->base.timing_generator_count = i; in dcn314_resource_construct()
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