Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4 |
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#
17117871 |
| 15-Sep-2023 |
Gabe Teeger <gabe.teeger@amd.com> |
drm/amd/display: Add Null check for DPP resource
commit e186400685d8a9287388a8535e2399bc673bfe95 upstream.
[what and why] Check whether dpp resource pointer is null in advance and return early if s
drm/amd/display: Add Null check for DPP resource
commit e186400685d8a9287388a8535e2399bc673bfe95 upstream.
[what and why] Check whether dpp resource pointer is null in advance and return early if so.
Reviewed-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Martin Leung <martin.leung@amd.com> Signed-off-by: Gabe Teeger <gabe.teeger@amd.com> Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Revision tags: v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43 |
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#
53f32880 |
| 28-Jul-2023 |
Wenjing Liu <wenjing.liu@amd.com> |
drm/amd/display: implement pipe type definition and adding accessors
[why] There is a lack of encapsulation of pipe connection representation in pipe context. This has caused many challenging bugs a
drm/amd/display: implement pipe type definition and adding accessors
[why] There is a lack of encapsulation of pipe connection representation in pipe context. This has caused many challenging bugs and coding errors with repeated logic to identify the same pipe type.
[how] Formally define pipe types and provide getters to identify a pipe type and find a pipe based on specific requirements. Update existing logic in non dcn specific files and dcn32 and future versions to use the new accessors.
Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Stylon Wang <stylon.wang@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4 |
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#
ad5594ad |
| 22-Jun-2023 |
Michael Strauss <michael.strauss@amd.com> |
drm/amd/display: Support Compliance Test Pattern Generation with DP2 Retimer
[WHY] Certain retimer requires workarounds in order to correctly output test patterns.
[HOW] Add vendor-specific aux seq
drm/amd/display: Support Compliance Test Pattern Generation with DP2 Retimer
[WHY] Certain retimer requires workarounds in order to correctly output test patterns.
[HOW] Add vendor-specific aux sequences to program retimer's TX and pattern generator when specific compliance test patterns are requested by sink. Note: SQ128 w/a in DPMF mode only works in one flip orientation currently
Reviewed-by: Hansen Dsouza <hansen.dsouza@amd.com> Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Stylon Wang <stylon.wang@amd.com> Signed-off-by: Michael Strauss <michael.strauss@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
198f0e89 |
| 26-Jul-2023 |
Wenjing Liu <wenjing.liu@amd.com> |
drm/amd/display: rename acquire_idle_pipe_for_layer to acquire_free_pipe_as_sec_dpp_pipe
[why] Secondary DPP pipes are used for rendering secondary layers of planes. The name "for layer" doesn't mak
drm/amd/display: rename acquire_idle_pipe_for_layer to acquire_free_pipe_as_sec_dpp_pipe
[why] Secondary DPP pipes are used for rendering secondary layers of planes. The name "for layer" doesn't make it obvious. The function is acquiring a free pipe as secondary dpp pipe only. We rename it so it is more obvious. In a future follow up change, we want to add functions to acquire free pipe as opp head pipe or otg master pipe as well. They will have their separate allocation priority.
Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
d8e3fcd3 |
| 26-Jul-2023 |
Wenjing Liu <wenjing.liu@amd.com> |
drm/amd/display: move idle pipe allocation logic into dcn specific layer
[why] generic dc resource file should not know what an optimal idle pipe is because this is dcn hardware dependent.
[how] We
drm/amd/display: move idle pipe allocation logic into dcn specific layer
[why] generic dc resource file should not know what an optimal idle pipe is because this is dcn hardware dependent.
[how] We move the optimial pipe searching logic in dcn specific layer.
Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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c5a4f901 |
| 25-Jul-2023 |
Wenjing Liu <wenjing.liu@amd.com> |
drm/amd/display: adjust visual confirm dpp height offset to be 1/240 of v addressable
[why] For timing with large v addressable visual confirm is just too small. It is difficult to tell visually whi
drm/amd/display: adjust visual confirm dpp height offset to be 1/240 of v addressable
[why] For timing with large v addressable visual confirm is just too small. It is difficult to tell visually which DPP we are using. On the other hand with timing with small v addressable visual confirm is too large and covers the UI area.
[how] We calculate visual confirm dpp height offset based on v addressable so it stays relatively the same height i.e. 1/240 verticle portion of the screen.
Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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460ea898 |
| 22-Jul-2023 |
Wenjing Liu <wenjing.liu@amd.com> |
drm/amd/display: update add plane to context logic with a new algorithm
[why] Preivous algorithm for finding an optimal idle pipe for a new plane was implemented to handle dynamic pipe allocation wh
drm/amd/display: update add plane to context logic with a new algorithm
[why] Preivous algorithm for finding an optimal idle pipe for a new plane was implemented to handle dynamic pipe allocation when MPO plane moves from one ODM slice to the other. Now pipe allocation is more static so it no longer depends on the MPO plane's position. We are simplifying our logic and remove unnecessary handling in our code.
[how] Apply a new simplified version of pipe resource allocation logic to reduce unnecessary flip delay caused by swapping secondary dpp pipe to other MPC blending tree.
Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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ca030d83 |
| 20-Jul-2023 |
Wenjing Liu <wenjing.liu@amd.com> |
drm/amd/display: always acquire MPO pipe for every blending tree
[why] We only acquire MPO pipe for blending tree where the plane clip will be rendered. If an MPO plane is outside current ODM slice
drm/amd/display: always acquire MPO pipe for every blending tree
[why] We only acquire MPO pipe for blending tree where the plane clip will be rendered. If an MPO plane is outside current ODM slice rect, we will skip pipe allocation. With new programming policy we want to allocate pipes for every ODM slice blending tree even for those whose ODM slice rect doesn't intersect with plane clip. This is aligned with DML validation so the pipe topology is programmed independently from the plane's position and dst plane size.
[how] - Remove the logic to allocate pipe only when the MPO plane intersects with ODM slice and replace with the new logic to always allocate pipes. - Remove the logic to tear down ODM configuration in favor for supporting secondary MPO planes. - Remove the logic to use full update when MPO goes accross ODM slice boundary.
Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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e75b965e |
| 20-Jul-2023 |
Wenjing Liu <wenjing.liu@amd.com> |
drm/amd/display: support plane clip with zero recout size
[why] If plane clip is outside current pipe's ODM slice rect, our logic will fail validation because we assume that when a pipe is acquired
drm/amd/display: support plane clip with zero recout size
[why] If plane clip is outside current pipe's ODM slice rect, our logic will fail validation because we assume that when a pipe is acquired to support a plane clip, it must blend some portion of the plane on the screen. This assumption needs to be changed. When a pipe is acquired to render the plane, we are now allowing it to support a case where it can take minimum viewport and draw with zero recout size when the plane clip is outside current ODM slice rect. The reason is that we want to allocate and get the pipe pre-programmed so it is ready to be rendered when user moves the plane over to the current ODM slice with a fast update. Whereas with the existing solution when user moves the plane over, we will need to allocate a pipe as needed and power it up and program it through a full update. This not only impacts the user experience with unnecessary delay of a frame but also doesn't generate any benefit to the user because DML doesn't support it. DML will invalidate based on worst case scenario and it doesn't depend on the plane location. So having our programming sequence support such dynamic pipe allocation is not meaningful anyway.
[how] In build scaler params allow recout to be zero size and if viewport is smaller than minimum, set minimum viewport size.
Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
0f3b9542 |
| 06-Jul-2023 |
Wenjing Liu <wenjing.liu@amd.com> |
drm/amd/display: Refactor recout calculation with a more generic formula
[Why] Current recout calculation has a few assumptions and implementation for MPO + ODM combine calculation is very specific.
drm/amd/display: Refactor recout calculation with a more generic formula
[Why] Current recout calculation has a few assumptions and implementation for MPO + ODM combine calculation is very specific. The equation has too many cases without enough comments to document the detail.
[How] The change remove the following assumptions: 1. When MPO is enabled, we only allow ODM Combine 2:1 2. ODM Combine always has even segment width. 3. Secondary MPO plane's pipe_ctx copies pre_odm_pipe from its top pipe.
The change applies a generic formula with more details in comment to document this solution so it is eaiser to learn and debug later.
Reviewed-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
75bd42fd |
| 12-Jul-2023 |
Ethan Bitnun <ethan.bitnun@amd.com> |
drm/amd/display: Prevent invalid pipe connections
[Description] - Prevent ODM pipe connections between pipes that are not part of the same plane when adding a plane to context - Re-attach child
drm/amd/display: Prevent invalid pipe connections
[Description] - Prevent ODM pipe connections between pipes that are not part of the same plane when adding a plane to context - Re-attach child pipes of ODM slice about to be disconnected to prevent any lost pipes with invalid tops/bottoms - We cannot split if head_pipe is not in ODM. Preventing this avoids creating an invalid context with an invalid pipe.
Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Acked-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Ethan Bitnun <ethan.bitnun@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22 |
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#
bf27f5de |
| 28-Mar-2023 |
Leo Ma <hanghong.ma@amd.com> |
drm/amd/display: Update scaler recout data for visual confirm
[Why] Visual confirm color is not as expected for Autoa Color Management feature test.
[How] Calculate scaler recout data when visual c
drm/amd/display: Update scaler recout data for visual confirm
[Why] Visual confirm color is not as expected for Autoa Color Management feature test.
[How] Calculate scaler recout data when visual confirm enabled to update the visual confirm bar on the display.
Reviewed-by: Aric Cyr <aric.cyr@amd.com> Acked-by: Alan Liu <haoping.liu@amd.com> Signed-off-by: Leo Ma <hanghong.ma@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Revision tags: v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19 |
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#
eaa7d830 |
| 10-Jan-2023 |
Joshua Ashton <joshua@froggi.es> |
drm/amd/display: Refactor avi_info_frame colorimetry determination
Replace the messy two if-else chains here that were on the same value with a switch on the enum.
Signed-off-by: Joshua Ashton <jos
drm/amd/display: Refactor avi_info_frame colorimetry determination
Replace the messy two if-else chains here that were on the same value with a switch on the enum.
Signed-off-by: Joshua Ashton <joshua@froggi.es> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Cc: Pekka Paalanen <ppaalanen@gmail.com> Cc: Sebastian Wick <sebastian.wick@redhat.com> Cc: Vitaly.Prosyak@amd.com Cc: Joshua Ashton <joshua@froggi.es> Cc: Simon Ser <contact@emersion.fr> Cc: Melissa Wen <mwen@igalia.com> Cc: dri-devel@lists.freedesktop.org Cc: amd-gfx@lists.freedesktop.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
24e461e8 |
| 09-May-2023 |
Samson Tam <samson.tam@amd.com> |
drm/amd/display: add ODM case when looking for first split pipe
[Why] When going from ODM 2:1 single display case to max displays, second odm pipe needs to be repurposed for one of the new single di
drm/amd/display: add ODM case when looking for first split pipe
[Why] When going from ODM 2:1 single display case to max displays, second odm pipe needs to be repurposed for one of the new single displays. However, acquire_first_split_pipe() only handles MPC case and not ODM case
[How] Add ODM conditions in acquire_first_split_pipe() Add commit_minimal_transition_state() in commit_streams() to handle odm 2:1 exit first, and then process new streams Handle ODM condition in commit_minimal_transition_state()
Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Acked-by: Stylon Wang <stylon.wang@amd.com> Signed-off-by: Samson Tam <samson.tam@amd.com> Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
029c85ad |
| 21-Apr-2023 |
Leo Ma <hanghong.ma@amd.com> |
drm/amd/display: revert "Update scaler recout data for visual confirm"
This reverts commit 1068e987ad0be83a109147fe7fa0891700e8d80e.
A regression is found on this change, so revert it for the time
drm/amd/display: revert "Update scaler recout data for visual confirm"
This reverts commit 1068e987ad0be83a109147fe7fa0891700e8d80e.
A regression is found on this change, so revert it for the time being and resubmit when issue is fixed.
Reviewed-by: Martin Leung <Martin.Leung@amd.com> Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Leo Ma <hanghong.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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59de751e |
| 09-May-2023 |
Samson Tam <samson.tam@amd.com> |
drm/amd/display: add ODM case when looking for first split pipe
[Why] When going from ODM 2:1 single display case to max displays, second odm pipe needs to be repurposed for one of the new single di
drm/amd/display: add ODM case when looking for first split pipe
[Why] When going from ODM 2:1 single display case to max displays, second odm pipe needs to be repurposed for one of the new single displays. However, acquire_first_split_pipe() only handles MPC case and not ODM case
[How] Add ODM conditions in acquire_first_split_pipe() Add commit_minimal_transition_state() in commit_streams() to handle odm 2:1 exit first, and then process new streams Handle ODM condition in commit_minimal_transition_state()
Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Acked-by: Stylon Wang <stylon.wang@amd.com> Signed-off-by: Samson Tam <samson.tam@amd.com> Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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da5e1490 |
| 24-Mar-2023 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd/display: Fix hang when skipping modeset
[Why&How]
When skipping full modeset since the only state change was a front porch change, the DC commit sequence requires extra checks to handle non
drm/amd/display: Fix hang when skipping modeset
[Why&How]
When skipping full modeset since the only state change was a front porch change, the DC commit sequence requires extra checks to handle non existant plane states being asked to be removed from context.
Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
1068e987 |
| 28-Mar-2023 |
Leo (Hanghong) Ma <hanghong.ma@amd.com> |
drm/amd/display: Update scaler recout data for visual confirm
[Why] Our QA found visual confirm color is not as expected for Auto Color Management feature test after enable it.
[How] Calculate scal
drm/amd/display: Update scaler recout data for visual confirm
[Why] Our QA found visual confirm color is not as expected for Auto Color Management feature test after enable it.
[How] Calculate scaler recout data when visual confirm enabled to update the visual confirm bar on the display.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Leo (Hanghong) Ma <hanghong.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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3306ba4b |
| 17-Apr-2023 |
Arnd Bergmann <arnd@arndb.de> |
drm/amd/display: fix is_timing_changed() prototype
Three functions in the amdgpu display driver cause -Wmissing-prototype warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_resource.c:1858:
drm/amd/display: fix is_timing_changed() prototype
Three functions in the amdgpu display driver cause -Wmissing-prototype warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_resource.c:1858:6: error: no previous prototype for 'is_timing_changed' [-Werror=missing-prototypes]
is_timing_changed() is actually meant to be a global symbol, but needs a proper name and prototype.
Fixes: 17ce8a6907f7 ("drm/amd/display: Add dsc pre-validation in atomic check") Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
72529b68 |
| 24-Mar-2023 |
Aurabindo Pillai <aurabindo.pillai@amd.com> |
drm/amd/display: Fix hang when skipping modeset
[Why&How]
When skipping full modeset since the only state change was a front porch change, the DC commit sequence requires extra checks to handle non
drm/amd/display: Fix hang when skipping modeset
[Why&How]
When skipping full modeset since the only state change was a front porch change, the DC commit sequence requires extra checks to handle non existant plane states being asked to be removed from context.
Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
98ce7d32 |
| 23-Feb-2023 |
Wenjing Liu <wenjing.liu@amd.com> |
drm/amd/display: convert link.h functions to function pointer style
[Why & How] All dc subcomponents should call another dc component via function pointers stored in a component structure. This is p
drm/amd/display: convert link.h functions to function pointer style
[Why & How] All dc subcomponents should call another dc component via function pointers stored in a component structure. This is part of dc coding convention since the beginning. The reason behind this is to improve encapsulation and polymorphism. The function contract is extracted into a single link service structure defined in link.h header file and implemented only in link_factory.c instead of spreading across multiple files in link component file structure.
Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
4652ae7a |
| 14-Feb-2023 |
Harry Wentland <harry.wentland@amd.com> |
drm/amd/display: Rename DCN config to FP
[Why & How] The only reason we have the DCN config is for floating point support. Rename it to make that clear and (hopefully) avoid misuse of the config in
drm/amd/display: Rename DCN config to FP
[Why & How] The only reason we have the DCN config is for floating point support. Rename it to make that clear and (hopefully) avoid misuse of the config in the future.
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
54618888 |
| 18-Jan-2023 |
Wenjing Liu <wenjing.liu@amd.com> |
drm/amd/display: break down dc_link.c
[why] dc_link contains over 30k line of code, the decision is to break it down to files residing in link folder based on functionality. This change is the last
drm/amd/display: break down dc_link.c
[why] dc_link contains over 30k line of code, the decision is to break it down to files residing in link folder based on functionality. This change is the last break down change which will remove dc_link.c file after everything is broken down.
[how] Move remaining dc_link.c functions into link_detection, link_dpms, link_validation, link_resource, and link_fpga and remove dc_link.
Reviewed-by: George Shen <George.Shen@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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#
6ca7415f |
| 09-Jan-2023 |
Wenjing Liu <wenjing.liu@amd.com> |
drm/amd/display: merge dc_link_dp into dc_link
[why] Temporarly merge dc_link_dp functions into dc_link for the purpose of removing dc_link_dp files. This is a transitional change for later commits
drm/amd/display: merge dc_link_dp into dc_link
[why] Temporarly merge dc_link_dp functions into dc_link for the purpose of removing dc_link_dp files. This is a transitional change for later commits where we will further refactor dc_link file.
Reviewed-by: George Shen <George.Shen@amd.com> Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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e95afc1c |
| 11-Jan-2023 |
Sung Joon Kim <sungjoon.kim@amd.com> |
drm/amd/display: Enable AdaptiveSync in DC interface
[why] Start enabling AdaptiveSync feature on Linux environment.
[how] Adding AdaptiveSync support in DC layer - building AdaptiveSync info_packe
drm/amd/display: Enable AdaptiveSync in DC interface
[why] Start enabling AdaptiveSync feature on Linux environment.
[how] Adding AdaptiveSync support in DC layer - building AdaptiveSync info_packets - adjusting the v_startup parameter
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Alan Liu <HaoPing.Liu@amd.com> Signed-off-by: Sung Joon Kim <sungjoon.kim@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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