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Searched refs:mmIH_RB_CNTL_RING1 (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dnavi10_ih.c70 ih_regs->ih_rb_cntl = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_CNTL_RING1); in navi10_ih_init_register_offset()
114 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1); in force_update_wptr_for_self_int()
127 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1, ih_rb_cntl); in force_update_wptr_for_self_int()
H A Dvega10_ih.c68 ih_regs->ih_rb_cntl = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_CNTL_RING1); in vega10_ih_init_register_offset()
H A Dvega20_ih.c76 ih_regs->ih_rb_cntl = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_CNTL_RING1); in vega20_ih_init_register_offset()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Dosssys_4_0_1_offset.h136 #define mmIH_RB_CNTL_RING1 … macro
H A Dosssys_4_0_offset.h136 #define mmIH_RB_CNTL_RING1 … macro
H A Dosssys_5_0_0_offset.h136 #define mmIH_RB_CNTL_RING1 … macro
H A Dosssys_4_2_0_offset.h140 #define mmIH_RB_CNTL_RING1 … macro