Searched refs:mmIH_RB_BASE (Results 1 – 16 of 16) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/ |
| H A D | oss_1_0_d.h | 230 #define mmIH_RB_BASE 0x0F81 macro
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| H A D | osssys_4_0_1_offset.h | 122 #define mmIH_RB_BASE … macro
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| H A D | osssys_4_0_offset.h | 122 #define mmIH_RB_BASE … macro
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| H A D | osssys_5_0_0_offset.h | 122 #define mmIH_RB_BASE … macro
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| H A D | osssys_4_2_0_offset.h | 124 #define mmIH_RB_BASE … macro
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| H A D | oss_2_4_d.h | 44 #define mmIH_RB_BASE 0xe31 macro
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| H A D | oss_3_0_1_d.h | 44 #define mmIH_RB_BASE 0xe31 macro
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| H A D | oss_3_0_d.h | 44 #define mmIH_RB_BASE 0xe31 macro
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| H A D | oss_2_0_d.h | 44 #define mmIH_RB_BASE 0xf81 macro
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| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | cik_ih.c | 126 WREG32(mmIH_RB_BASE, adev->irq.ih.gpu_addr >> 8); in cik_ih_irq_init()
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| H A D | iceland_ih.c | 127 WREG32(mmIH_RB_BASE, adev->irq.ih.gpu_addr >> 8); in iceland_ih_irq_init()
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| H A D | cz_ih.c | 127 WREG32(mmIH_RB_BASE, adev->irq.ih.gpu_addr >> 8); in cz_ih_irq_init()
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| H A D | tonga_ih.c | 123 WREG32(mmIH_RB_BASE, ih->gpu_addr >> 8); in tonga_ih_irq_init()
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| H A D | vega10_ih.c | 53 ih_regs->ih_rb_base = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_BASE); in vega10_ih_init_register_offset()
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| H A D | vega20_ih.c | 61 ih_regs->ih_rb_base = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_BASE); in vega20_ih_init_register_offset()
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| H A D | navi10_ih.c | 55 ih_regs->ih_rb_base = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_BASE); in navi10_ih_init_register_offset()
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