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Searched refs:membase (Results 1 – 25 of 221) sorted by relevance

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/openbmc/linux/drivers/tty/serial/
H A Dmilbeaut_usio.c68 port->membase + MLB_USIO_REG_FCR); in mlb_usio_stop_tx()
70 port->membase + MLB_USIO_REG_SCR); in mlb_usio_stop_tx()
79 port->membase + MLB_USIO_REG_FCR); in mlb_usio_tx_chars()
82 port->membase + MLB_USIO_REG_SCR); in mlb_usio_tx_chars()
108 port->membase + MLB_USIO_REG_FCR); in mlb_usio_tx_chars()
111 port->membase + MLB_USIO_REG_SCR); in mlb_usio_tx_chars()
129 port->membase + MLB_USIO_REG_SCR); in mlb_usio_start_tx()
195 port->membase + MLB_USIO_REG_SSR); in mlb_usio_rx_chars()
200 port->membase + MLB_USIO_REG_FCR); in mlb_usio_rx_chars()
430 if (!port->membase) in mlb_usio_console_setup()
[all …]
H A Dxilinx_uartps.c661 port->membase + CDNS_UART_CR); in cdns_uart_break_ctl()
820 port->membase + CDNS_UART_CR); in cdns_uart_startup()
826 port->membase + CDNS_UART_CR); in cdns_uart_startup()
846 port->membase + CDNS_UART_MR); in cdns_uart_startup()
862 port->membase + CDNS_UART_ISR); in cdns_uart_startup()
901 port->membase + CDNS_UART_CR); in cdns_uart_shutdown()
958 if (!port->membase) { in cdns_uart_request_port()
976 iounmap(port->membase); in cdns_uart_release_port()
977 port->membase = NULL; in cdns_uart_release_port()
1179 if (!port->membase) in cdns_early_console_setup()
[all …]
H A Dmcf.c161 port->membase + MCFUART_UCR); in mcf_startup()
265 writeb(mr1, port->membase + MCFUART_UMR); in mcf_set_termios()
266 writeb(mr2, port->membase + MCFUART_UMR); in mcf_set_termios()
273 port->membase + MCFUART_UCSR); in mcf_set_termios()
275 port->membase + MCFUART_UCR); in mcf_set_termios()
293 port->membase + MCFUART_UCR); in mcf_rx_chars()
375 writeb(0, port->membase + MCFUART_UIMR); in mcf_config_port()
484 port->membase = (platp[i].membase) ? platp[i].membase : in early_mcf_setup()
509 writeb(c, port->membase + MCFUART_UTB); in mcf_console_putc()
540 if (port->membase == 0) in mcf_console_setup()
[all …]
H A Dtimbuart.c43 iowrite32(ier, port->membase + TIMBUART_IER); in timbuart_stop_rx()
50 iowrite32(ier, port->membase + TIMBUART_IER); in timbuart_stop_tx()
75 iowrite8(ctl, port->membase + TIMBUART_CTRL); in timbuart_flush_buffer()
103 port->membase + TIMBUART_TXFIFO); in timbuart_tx_chars()
111 ioread8(port->membase + TIMBUART_CTRL), in timbuart_tx_chars()
248 port->membase + TIMBUART_IER); in timbuart_startup()
260 iowrite32(0, port->membase + TIMBUART_IER); in timbuart_shutdown()
319 iounmap(port->membase); in timbuart_release_port()
320 port->membase = NULL; in timbuart_release_port()
337 if (port->membase == NULL) { in timbuart_request_port()
[all …]
H A Dmeson_uart.c102 val = readl(port->membase + AML_UART_STATUS); in meson_uart_tx_empty()
165 writel(ch, port->membase + AML_UART_WFIFO); in meson_uart_start_tx()
302 writel(val, port->membase + AML_UART_MISC); in meson_uart_startup()
333 writel(val, port->membase + AML_UART_REG5); in meson_uart_change_speed()
427 devm_iounmap(port->dev, port->membase); in meson_uart_release_port()
428 port->membase = NULL; in meson_uart_release_port()
442 if (!port->membase) in meson_uart_request_port()
498 writel(c, port->membase + AML_UART_WFIFO); in meson_uart_poll_put_char()
547 if (!port->membase) in meson_console_putchar()
608 if (!port || !port->membase) in meson_serial_console_setup()
[all …]
H A Dqcom_geni_serial.c194 if (IS_ERR(uport->membase)) in qcom_geni_serial_request_port()
195 return PTR_ERR(uport->membase); in qcom_geni_serial_request_port()
196 port->se.base = uport->membase; in qcom_geni_serial_request_port()
297 reg = readl(uport->membase + offset); in qcom_geni_serial_poll_bit()
513 uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_console_write()
916 uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_handle_tx_fifo()
927 uport->membase + SE_GENI_M_IRQ_CLEAR); in qcom_geni_serial_handle_tx_fifo()
934 uport->membase + SE_GENI_M_IRQ_EN); in qcom_geni_serial_handle_tx_fifo()
1349 if (unlikely(!uport->membase)) in qcom_geni_console_setup()
1416 if (!uport->membase) in qcom_geni_serial_earlycon_setup()
[all …]
H A Dlpc32xx_hs.c103 port->membase))) == 0) in wait_for_xmit_empty()
117 port->membase))) < 32) in wait_for_xmit_ready()
168 if (!port->membase) in lpc32xx_hsuart_console_setup()
248 readl(LPC32XX_HSUART_FIFO(port->membase)); in __serial_uart_flush()
320 LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_interrupt()
430 LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_startup()
524 iounmap(port->membase); in serial_lpc32xx_release_port()
525 port->membase = NULL; in serial_lpc32xx_release_port()
543 if (!port->membase) { in serial_lpc32xx_request_port()
567 LPC32XX_HSUART_IIR(port->membase)); in serial_lpc32xx_config_port()
[all …]
H A Damba-pl010.c65 cr = readb(uap->port.membase + UART010_CR); in pl010_stop_tx()
67 writel(cr, uap->port.membase + UART010_CR); in pl010_stop_tx()
120 ch = readb(port->membase + UART01x_DR); in pl010_rx_chars()
131 writel(0, port->membase + UART01x_ECR); in pl010_rx_chars()
172 writel(ch, port->membase + UART01x_DR), in pl010_tx_chars()
181 writel(0, port->membase + UART010_ICR); in pl010_modem_status()
314 port->membase + UART010_CR); in pl010_startup()
337 writel(0, port->membase + UART010_CR); in pl010_shutdown()
342 port->membase + UART010_LCRH); in pl010_shutdown()
541 writel(ch, port->membase + UART01x_DR); in pl010_console_putchar()
[all …]
H A Dfsl_linflexuart.c147 ier = readl(port->membase + LINIER); in linflex_stop_tx()
149 writel(ier, port->membase + LINIER); in linflex_stop_tx()
156 ier = readl(port->membase + LINIER); in linflex_stop_rx()
164 writeb(c, sport->membase + BDRL); in linflex_put_char()
196 ier = readl(port->membase + LINIER); in linflex_start_tx()
237 rx = readb(sport->membase + BDRM); in linflex_rxint()
561 writeb(ch, port->membase + BDRL); in linflex_console_putchar()
576 port->membase + UARTSR); in linflex_console_putchar()
781 if (!device->port.membase) in linflex_early_console_setup()
831 if (IS_ERR(sport->membase)) in linflex_probe()
[all …]
H A Ddigicolor-usart.c144 ch = readb_relaxed(port->membase + UA_EMI_REC); in digicolor_uart_rx()
223 port->membase + UA_INTFLAG_CLEAR); in digicolor_uart_int()
260 writeb_relaxed(0, port->membase + UA_CONTROL); in digicolor_uart_startup()
264 port->membase + UA_CONFIG_FIFO); in digicolor_uart_startup()
266 port->membase + UA_STATUS_FIFO); in digicolor_uart_startup()
268 port->membase + UA_CONTROL); in digicolor_uart_startup()
270 port->membase + UA_INT_ENABLE); in digicolor_uart_startup()
282 writeb_relaxed(0, port->membase + UA_ENABLE); in digicolor_uart_shutdown()
389 writeb_relaxed(ch, port->membase + UA_EMI_REC); in digicolor_uart_console_putchar()
475 if (IS_ERR(dp->port.membase)) in digicolor_uart_probe()
[all …]
H A Dmvebu-uart.c191 st = readl(port->membase + UART_STAT); in mvebu_uart_tx_empty()
390 port->membase + UART_CTRL(port)); in mvebu_uart_startup()
394 ret = readl(port->membase + UART_STAT); in mvebu_uart_startup()
396 writel(ret, port->membase + UART_STAT); in mvebu_uart_startup()
626 st = readl(port->membase + UART_STAT); in mvebu_uart_put_poll_char()
667 st = readl(port->membase + UART_STAT); in mvebu_uart_putc()
676 st = readl(port->membase + UART_STAT); in mvebu_uart_putc()
695 if (!device->port.membase) in mvebu_uart_early_console_setup()
777 if (!port->mapbase || !port->membase) { in mvebu_uart_console_setup()
922 if (IS_ERR(port->membase)) in mvebu_uart_probe()
[all …]
H A Dsunplus-uart.c82 writel(ch, port->membase + SUP_UART_DATA); in sp_uart_put_char()
128 writel(mcr, port->membase + SUP_UART_MCR); in sunplus_set_mctrl()
135 mcr = readl(port->membase + SUP_UART_MCR); in sunplus_get_mctrl()
159 isc = readl(port->membase + SUP_UART_ISC); in sunplus_stop_tx()
161 writel(isc, port->membase + SUP_UART_ISC); in sunplus_stop_tx()
168 isc = readl(port->membase + SUP_UART_ISC); in sunplus_start_tx()
170 writel(isc, port->membase + SUP_UART_ISC); in sunplus_start_tx()
177 isc = readl(port->membase + SUP_UART_ISC); in sunplus_stop_rx()
179 writel(isc, port->membase + SUP_UART_ISC); in sunplus_stop_rx()
189 lcr = readl(port->membase + SUP_UART_LCR); in sunplus_break_ctl()
[all …]
H A Dlantiq.c194 port->membase + LTQ_ASC_WHBSTATE); in lqasc_rx_chars()
339 port->membase + LTQ_ASC_CLC); in lqasc_startup()
345 port->membase + LTQ_ASC_TXFCON); in lqasc_startup()
349 port->membase + LTQ_ASC_RXFCON); in lqasc_startup()
364 port->membase + LTQ_ASC_IRNREN); in lqasc_startup()
379 port->membase + LTQ_ASC_RXFCON); in lqasc_shutdown()
381 port->membase + LTQ_ASC_TXFCON); in lqasc_shutdown()
504 port->membase = NULL; in lqasc_release_port()
532 if (port->membase == NULL) in lqasc_request_port()
583 if (!port->membase) in lqasc_console_putchar()
[all …]
H A Dfsl_lpuart.c386 return readl(port->membase + off); in lpuart32_read()
399 writel(val, port->membase + off); in lpuart32_write()
661 sport->port.membase + UARTPFIFO); in lpuart_poll_init()
665 sport->port.membase + UARTCFIFO); in lpuart_poll_init()
687 writeb(c, port->membase + UARTDR); in lpuart_poll_put_char()
2102 sport->port.membase + UARTCR2); in lpuart_set_termios()
2707 if (!device->port.membase) in lpuart_early_console_setup()
2717 if (!device->port.membase) in lpuart32_early_console_setup()
2732 if (!device->port.membase) in ls1028a_early_console_setup()
2754 if (!device->port.membase) in lpuart32_imx_early_console_setup()
[all …]
H A Daltera_jtaguart.c81 port->membase + ALTERA_JTAGUART_CONTROL_REG); in altera_jtaguart_start_tx()
88 port->membase + ALTERA_JTAGUART_CONTROL_REG); in altera_jtaguart_stop_tx()
95 port->membase + ALTERA_JTAGUART_CONTROL_REG); in altera_jtaguart_stop_rx()
188 port->membase + ALTERA_JTAGUART_CONTROL_REG); in altera_jtaguart_startup()
204 port->membase + ALTERA_JTAGUART_CONTROL_REG); in altera_jtaguart_shutdown()
278 writel(c, port->membase + ALTERA_JTAGUART_DATA_REG); in altera_jtaguart_console_putc()
292 writel(c, port->membase + ALTERA_JTAGUART_DATA_REG); in altera_jtaguart_console_putc()
313 if (port->membase == NULL) in altera_jtaguart_console_setup()
351 if (!dev->port.membase) in altera_jtaguart_earlycon_setup()
413 if (!port->membase) in altera_jtaguart_probe()
[all …]
/openbmc/linux/drivers/atm/
H A Didt77252.h441 #define SAR_REG_DR0 (card->membase + 0x00)
442 #define SAR_REG_DR1 (card->membase + 0x04)
443 #define SAR_REG_DR2 (card->membase + 0x08)
444 #define SAR_REG_DR3 (card->membase + 0x0C)
445 #define SAR_REG_CMD (card->membase + 0x10)
446 #define SAR_REG_CFG (card->membase + 0x14)
451 #define SAR_REG_CDC (card->membase + 0x28)
453 #define SAR_REG_ICC (card->membase + 0x30)
455 #define SAR_REG_TMR (card->membase + 0x38)
460 #define SAR_REG_GP (card->membase + 0x4C)
[all …]
/openbmc/linux/drivers/net/mdio/
H A Dmdio-ipq4019.c41 void __iomem *membase; member
66 data = readl(priv->membase + MDIO_MODE_REG); in ipq4019_mdio_read_c45()
70 writel(data, priv->membase + MDIO_MODE_REG); in ipq4019_mdio_read_c45()
81 writel(cmd, priv->membase + MDIO_CMD_REG); in ipq4019_mdio_read_c45()
89 writel(cmd, priv->membase + MDIO_CMD_REG); in ipq4019_mdio_read_c45()
119 writel(cmd, priv->membase + MDIO_CMD_REG); in ipq4019_mdio_read_c22()
153 writel(cmd, priv->membase + MDIO_CMD_REG); in ipq4019_mdio_write_c45()
162 writel(cmd, priv->membase + MDIO_CMD_REG); in ipq4019_mdio_write_c45()
197 writel(cmd, priv->membase + MDIO_CMD_REG); in ipq4019_mdio_write_c22()
248 if (IS_ERR(priv->membase)) in ipq4019_mdio_probe()
[all …]
H A Dmdio-sun4i.c32 void __iomem *membase; member
45 writel(0x1, data->membase + EMAC_MAC_MCMD_REG); in sun4i_mdio_read()
49 while (readl(data->membase + EMAC_MAC_MIND_REG) & 0x1) { in sun4i_mdio_read()
56 writel(0x0, data->membase + EMAC_MAC_MCMD_REG); in sun4i_mdio_read()
58 value = readl(data->membase + EMAC_MAC_MRDD_REG); in sun4i_mdio_read()
72 writel(0x1, data->membase + EMAC_MAC_MCMD_REG); in sun4i_mdio_write()
76 while (readl(data->membase + EMAC_MAC_MIND_REG) & 0x1) { in sun4i_mdio_write()
83 writel(0x0, data->membase + EMAC_MAC_MCMD_REG); in sun4i_mdio_write()
85 writel(value, data->membase + EMAC_MAC_MWTD_REG); in sun4i_mdio_write()
109 if (IS_ERR(data->membase)) { in sun4i_mdio_probe()
[all …]
/openbmc/linux/drivers/net/ethernet/allwinner/
H A Dsun4i-emac.c77 void __iomem *membase; member
370 db->membase + EMAC_TX_MODE_REG); in emac_setup()
377 db->membase + EMAC_MAC_CTL0_REG); in emac_setup()
391 db->membase + EMAC_MAC_IPGR_REG); in emac_setup()
395 db->membase + EMAC_MAC_CLRT_REG); in emac_setup()
421 db->membase + EMAC_RX_CTL_REG); in emac_set_rx_mode()
505 db->membase + EMAC_CTL_REG); in emac_init_device()
989 db->membase = of_iomap(np, 0); in emac_probe()
990 if (!db->membase) { in emac_probe()
1077 iounmap(db->membase); in emac_probe()
[all …]
/openbmc/linux/drivers/gpio/
H A Dgpio-timberdale.c35 void __iomem *membase; member
50 reg = ioread32(tgpio->membase + offset); in timbgpio_update_bit()
57 iowrite32(reg, tgpio->membase + offset); in timbgpio_update_bit()
73 value = ioread32(tgpio->membase + TGPIOVAL); in timbgpio_gpio_get()
138 ver = ioread32(tgpio->membase + TGPIO_VER); in timbgpio_irq_type()
142 lvr = ioread32(tgpio->membase + TGPIO_LVR); in timbgpio_irq_type()
143 flr = ioread32(tgpio->membase + TGPIO_FLR); in timbgpio_irq_type()
173 iowrite32(lvr, tgpio->membase + TGPIO_LVR); in timbgpio_irq_type()
200 iowrite32(0, tgpio->membase + TGPIO_IER); in timbgpio_irq()
238 if (IS_ERR(tgpio->membase)) in timbgpio_probe()
[all …]
H A Dgpio-sa1100.c19 void __iomem *membase; member
55 void __iomem *gpdr = sa1100_gpio_chip(chip)->membase + R_GPDR; in sa1100_get_direction()
105 .membase = (void *)&GPLR,
116 void *base = sgc->membase; in sa1100_update_edge_regs()
158 writel_relaxed(BIT(d->hwirq), sgc->membase + R_GEDR); in sa1100_gpio_ack()
234 void __iomem *gedr = sgc->membase + R_GEDR; in sa1100_gpio_handler()
269 writel_relaxed(readl_relaxed(sgc->membase + R_GEDR), in sa1100_gpio_suspend()
270 sgc->membase + R_GEDR); in sa1100_gpio_suspend()
316 writel_relaxed(0, sgc->membase + R_GFER); in sa1100_init_gpio()
317 writel_relaxed(0, sgc->membase + R_GRER); in sa1100_init_gpio()
[all …]
/openbmc/linux/drivers/i2c/busses/
H A Di2c-uniphier-f.c81 void __iomem *membase; member
144 priv->membase + UNIPHIER_FI2C_CR); in uniphier_fi2c_stop()
213 priv->membase + UNIPHIER_FI2C_CR); in uniphier_fi2c_interrupt()
254 writel(0, priv->membase + UNIPHIER_FI2C_TBC); in uniphier_fi2c_tx_init()
257 priv->membase + UNIPHIER_FI2C_DTTX); in uniphier_fi2c_tx_init()
293 priv->membase + UNIPHIER_FI2C_DTTX); in uniphier_fi2c_rx_init()
304 priv->membase + UNIPHIER_FI2C_BRST); in uniphier_fi2c_prepare_operation()
349 priv->membase + UNIPHIER_FI2C_CR); in uniphier_fi2c_master_xfer_one()
455 priv->membase + UNIPHIER_FI2C_BRST); in uniphier_fi2c_set_scl()
528 if (IS_ERR(priv->membase)) in uniphier_fi2c_probe()
[all …]
/openbmc/linux/drivers/clk/x86/
H A Dclk-cgu.c46 val = lgm_get_clk_val(mux->membase, mux->reg, mux->shift, in lgm_clk_mux_get_parent()
60 lgm_set_clk_val(mux->membase, mux->reg, mux->shift, in lgm_clk_mux_set_parent()
104 mux->membase = ctx->membase; in lgm_clk_register_mux()
128 val = lgm_get_clk_val(divider->membase, divider->reg, in lgm_clk_divider_recalc_rate()
157 lgm_set_clk_val(divider->membase, divider->reg, in lgm_clk_divider_set_rate()
217 div->membase = ctx->membase; in lgm_clk_register_divider()
318 gate->membase = ctx->membase; in lgm_clk_register_gate()
398 div0 = lgm_get_clk_val(ddiv->membase, ddiv->reg, in lgm_clk_ddiv_recalc_rate()
400 div1 = lgm_get_clk_val(ddiv->membase, ddiv->reg, in lgm_clk_ddiv_recalc_rate()
402 exdiv = lgm_get_clk_val(ddiv->membase, ddiv->reg, in lgm_clk_ddiv_recalc_rate()
[all …]
/openbmc/linux/drivers/input/keyboard/
H A Dlocomokbd.c74 locomo_writel(0x00FF, membase + LOCOMO_KSC); in locomokbd_charge_all()
81 locomo_writel(0, membase + LOCOMO_KSC); in locomokbd_activate_all()
82 r = locomo_readl(membase + LOCOMO_KIC); in locomokbd_activate_all()
84 locomo_writel(r, membase + LOCOMO_KIC); in locomokbd_activate_all()
94 locomo_writel(nbset, membase + LOCOMO_KSC); in locomokbd_activate_col()
102 locomo_writel(nbset, membase + LOCOMO_KSC); in locomokbd_reset_col()
117 unsigned long membase = locomokbd->base; in locomokbd_scankeyboard() local
121 locomokbd_charge_all(membase); in locomokbd_scankeyboard()
126 locomokbd_activate_col(membase, col); in locomokbd_scankeyboard()
159 locomokbd_reset_col(membase, col); in locomokbd_scankeyboard()
[all …]
/openbmc/linux/drivers/dma/
H A Dtimb_dma.c72 void __iomem *membase; member
89 void __iomem *membase; member
118 ier = ioread32(td->membase + TIMBDMA_IER); in __td_enable_chan_irq()
122 iowrite32(ier, td->membase + TIMBDMA_IER); in __td_enable_chan_irq()
138 iowrite32(isr, td->membase + TIMBDMA_ISR); in __td_dma_done_ack()
602 iowrite32(0, td->membase + TIMBDMA_IER); in td_irq()
648 if (!td->membase) { in td_probe()
708 td_chan->membase = td->membase + in td_probe()
713 i, td_chan->membase); in td_probe()
733 iounmap(td->membase); in td_probe()
[all …]

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