35 	void __iomem		*membase;  member
50 	reg = ioread32(tgpio->membase + offset);  in timbgpio_update_bit()
57 	iowrite32(reg, tgpio->membase + offset);  in timbgpio_update_bit()
73 	value = ioread32(tgpio->membase + TGPIOVAL);  in timbgpio_gpio_get()
110 	iowrite32(tgpio->last_ier, tgpio->membase + TGPIO_IER);  in timbgpio_irq_disable()
122 	iowrite32(tgpio->last_ier, tgpio->membase + TGPIO_IER);  in timbgpio_irq_enable()
138 	ver = ioread32(tgpio->membase + TGPIO_VER);  in timbgpio_irq_type()
142 	lvr = ioread32(tgpio->membase + TGPIO_LVR);  in timbgpio_irq_type()
143 	flr = ioread32(tgpio->membase + TGPIO_FLR);  in timbgpio_irq_type()
145 		bflr = ioread32(tgpio->membase + TGPIO_BFLR);  in timbgpio_irq_type()
173 	iowrite32(lvr, tgpio->membase + TGPIO_LVR);  in timbgpio_irq_type()
174 	iowrite32(flr, tgpio->membase + TGPIO_FLR);  in timbgpio_irq_type()
176 		iowrite32(bflr, tgpio->membase + TGPIO_BFLR);  in timbgpio_irq_type()
178 	iowrite32(1 << offset, tgpio->membase + TGPIO_ICR);  in timbgpio_irq_type()
193 	ipr = ioread32(tgpio->membase + TGPIO_IPR);  in timbgpio_irq()
194 	iowrite32(ipr, tgpio->membase + TGPIO_ICR);  in timbgpio_irq()
200 	iowrite32(0, tgpio->membase + TGPIO_IER);  in timbgpio_irq()
205 	iowrite32(tgpio->last_ier, tgpio->membase + TGPIO_IER);  in timbgpio_irq()
237 	tgpio->membase = devm_platform_ioremap_resource(pdev, 0);  in timbgpio_probe()
238 	if (IS_ERR(tgpio->membase))  in timbgpio_probe()
239 		return PTR_ERR(tgpio->membase);  in timbgpio_probe()
261 	iowrite32(0x0, tgpio->membase + TGPIO_IER);  in timbgpio_probe()