42 	u32 ier = ioread32(port->membase + TIMBUART_IER) & ~RXFLAGS;  in timbuart_stop_rx()
43 	iowrite32(ier, port->membase + TIMBUART_IER);  in timbuart_stop_rx()
49 	u32 ier = ioread32(port->membase + TIMBUART_IER) & ~TXBAE;  in timbuart_stop_tx()
50 	iowrite32(ier, port->membase + TIMBUART_IER);  in timbuart_stop_tx()
64 	u32 isr = ioread32(port->membase + TIMBUART_ISR);  in timbuart_tx_empty()
72 		u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |  in timbuart_flush_buffer()
75 		iowrite8(ctl, port->membase + TIMBUART_CTRL);  in timbuart_flush_buffer()
76 		iowrite32(TXBF, port->membase + TIMBUART_ISR);  in timbuart_flush_buffer()
84 	while (ioread32(port->membase + TIMBUART_ISR) & RXDP) {  in timbuart_rx_chars()
85 		u8 ch = ioread8(port->membase + TIMBUART_RXFIFO);  in timbuart_rx_chars()
100 	while (!(ioread32(port->membase + TIMBUART_ISR) & TXBF) &&  in timbuart_tx_chars()
103 			port->membase + TIMBUART_TXFIFO);  in timbuart_tx_chars()
111 		ioread8(port->membase + TIMBUART_CTRL),  in timbuart_tx_chars()
113 		ioread8(port->membase + TIMBUART_BAUDRATE));  in timbuart_tx_chars()
131 		iowrite32(TXFLAGS, port->membase + TIMBUART_ISR);  in timbuart_handle_tx_port()
155 			u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |  in timbuart_handle_rx_port()
157 			iowrite8(ctl, port->membase + TIMBUART_CTRL);  in timbuart_handle_rx_port()
163 		iowrite32(RXFLAGS, port->membase + TIMBUART_ISR);  in timbuart_handle_rx_port()
179 	isr = ioread32(uart->port.membase + TIMBUART_ISR);  in timbuart_tasklet()
190 	iowrite32(ier, uart->port.membase + TIMBUART_IER);  in timbuart_tasklet()
198 	u8 cts = ioread8(port->membase + TIMBUART_CTRL);  in timbuart_get_mctrl()
212 		iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL);  in timbuart_set_mctrl()
214 		iowrite8(0, port->membase + TIMBUART_CTRL);  in timbuart_set_mctrl()
223 		iowrite32(CTS_DELTA, port->membase + TIMBUART_ISR);  in timbuart_mctrl_check()
244 	iowrite8(TIMBUART_CTRL_FLSHRX, port->membase + TIMBUART_CTRL);  in timbuart_startup()
245 	iowrite32(0x1ff, port->membase + TIMBUART_ISR);  in timbuart_startup()
248 		port->membase + TIMBUART_IER);  in timbuart_startup()
260 	iowrite32(0, port->membase + TIMBUART_IER);  in timbuart_shutdown()
299 	iowrite8((u8)bindex, port->membase + TIMBUART_BAUDRATE);  in timbuart_set_termios()
319 		iounmap(port->membase);  in timbuart_release_port()
320 		port->membase = NULL;  in timbuart_release_port()
336 		port->membase = ioremap(port->mapbase, size);  in timbuart_request_port()
337 		if (port->membase == NULL) {  in timbuart_request_port()
350 	if (ioread8(uart->port.membase + TIMBUART_IPR)) {  in timbuart_handleinterrupt()
351 		uart->last_ier = ioread32(uart->port.membase + TIMBUART_IER);  in timbuart_handleinterrupt()
354 		iowrite32(0, uart->port.membase + TIMBUART_IER);  in timbuart_handleinterrupt()
442 	uart->port.membase = NULL;  in timbuart_probe()