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Searched refs:clk_divider_ops (Results 1 – 25 of 36) sorted by relevance

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/openbmc/linux/drivers/clk/st/
H A Dclk-flexgen.c150 mid_rate = clk_divider_ops.recalc_rate(pdiv_hw, parent_rate); in flexgen_recalc_rate()
152 return clk_divider_ops.recalc_rate(fdiv_hw, mid_rate); in flexgen_recalc_rate()
185 clk_divider_ops.set_rate(pdiv_hw, parent_rate, parent_rate); in flexgen_set_rate()
186 ret = clk_divider_ops.set_rate(fdiv_hw, rate, rate * div); in flexgen_set_rate()
188 clk_divider_ops.set_rate(fdiv_hw, parent_rate, parent_rate); in flexgen_set_rate()
189 ret = clk_divider_ops.set_rate(pdiv_hw, rate, rate * div); in flexgen_set_rate()
/openbmc/linux/drivers/clk/imx/
H A Dclk-composite-93.c98 return clk_divider_ops.recalc_rate(hw, parent_rate); in imx93_clk_composite_divider_recalc_rate()
104 return clk_divider_ops.round_rate(hw, rate, prate); in imx93_clk_composite_divider_round_rate()
110 return clk_divider_ops.determine_rate(hw, req); in imx93_clk_composite_divider_determine_rate()
H A Dclk-fixup-div.c115 fixup_div->ops = &clk_divider_ops; in imx_clk_hw_fixup_divider()
H A Dclk-busy.c96 busy->div_ops = &clk_divider_ops; in imx_clk_hw_busy_divider()
H A Dclk-divider-gate.c70 return clk_divider_ops.determine_rate(hw, req); in clk_divider_determine_rate()
H A Dclk-composite-8m.c269 divider_ops = &clk_divider_ops; in __imx8m_clk_hw_composite()
/openbmc/linux/drivers/clk/mmp/
H A Dclk-audio.c265 &priv->sspa_mux.hw, &clk_divider_ops, in register_clocks()
287 &priv->sspa_mux.hw, &clk_divider_ops, 0); in register_clocks()
318 &priv->sspa1_mux.hw, &clk_divider_ops, 0); in register_clocks()
/openbmc/linux/drivers/clk/
H A Dclk-fsl-sai.c62 &clk_divider_ops, in fsl_sai_clk_probe()
H A Dclk-divider.c522 const struct clk_ops clk_divider_ops = { variable
528 EXPORT_SYMBOL_GPL(clk_divider_ops);
565 init.ops = &clk_divider_ops; in __clk_hw_register_divider()
H A Dclk-stm32h7.c396 gcfg->div->ops : &clk_divider_ops; in get_cfg_composite_div()
844 return clk_divider_ops.recalc_rate(hw, parent_rate); in odf_divider_recalc_rate()
850 return clk_divider_ops.determine_rate(hw, req); in odf_divider_determine_rate()
867 ret = clk_divider_ops.set_rate(hw, rate, parent_rate); in odf_divider_set_rate()
H A Dclk-stm32f4.c705 return clk_divider_ops.recalc_rate(hw, parent_rate); in stm32f4_pll_div_recalc_rate()
711 return clk_divider_ops.determine_rate(hw, req); in stm32f4_pll_div_determine_rate()
727 ret = clk_divider_ops.set_rate(hw, rate, parent_rate); in stm32f4_pll_div_set_rate()
H A Dclk-stm32mp1.c653 div_ops = &clk_divider_ops; in clk_stm32_register_composite()
1073 return clk_divider_ops.recalc_rate(hw, parent_rate); in clk_divider_rtc_recalc_rate()
1082 return clk_divider_ops.set_rate(hw, rate, parent_rate); in clk_divider_rtc_set_rate()
1090 return clk_divider_ops.determine_rate(hw, req); in clk_divider_rtc_determine_rate()
/openbmc/linux/drivers/clk/sunxi/
H A Dclk-sun8i-mbus.c79 &div->hw, &clk_divider_ops, in sun8i_a23_mbus_setup()
H A Dclk-a10-ve.c122 &div->hw, &clk_divider_ops, in sun4i_ve_clk_setup()
H A Dclk-sun4i-display.c161 data->has_div ? &clk_divider_ops : NULL, in sun4i_a10_display_init()
/openbmc/linux/drivers/clk/mxs/
H A Dclk-div.c96 div->ops = &clk_divider_ops; in mxs_clk_div()
/openbmc/linux/drivers/spi/
H A Dspi-meson-spicc.c591 return clk_divider_ops.recalc_rate(hw, parent_rate); in meson_spicc_pow2_recalc_rate()
603 return clk_divider_ops.determine_rate(hw, req); in meson_spicc_pow2_determine_rate()
615 return clk_divider_ops.set_rate(hw, rate, parent_rate); in meson_spicc_pow2_set_rate()
732 init.ops = &clk_divider_ops; in meson_spicc_enh_clk_init()
/openbmc/linux/drivers/mmc/host/
H A Dmeson-mx-sdhc-clkc.c109 &clk_divider_ops, in meson_mx_sdhc_register_clkc()
/openbmc/linux/drivers/clk/davinci/
H A Dpll.c242 const struct clk_ops *divider_ops = &clk_divider_ops; in davinci_pll_div_register()
619 &divider->hw, &clk_divider_ops, in davinci_pll_obsclk_register()
681 const struct clk_ops *divider_ops = &clk_divider_ops; in davinci_pll_sysclk_register()
/openbmc/linux/drivers/clk/renesas/
H A Drcar-cpg-lib.c164 &rpc->div.hw, &clk_divider_ops, in cpg_rpc_clk_register()
H A Drcar-gen2-cpg.c237 &div->hw, &clk_divider_ops, in cpg_adsp_clk_register()
/openbmc/linux/drivers/clk/microchip/
H A Dclk-mpfs.c218 .cfg.hw.init = CLK_HW_INIT(_name, _parent, &clk_divider_ops, 0), \
242 CLK_HW_INIT_PARENTS_DATA("clk_rtcref", mpfs_ext_ref, &clk_divider_ops, 0),
H A Dclk-mpfs-ccc.c172 out_hw->divider.hw.init = CLK_HW_INIT_HW(name, &parent->hw, &clk_divider_ops, 0); in mpfs_ccc_register_outputs()
/openbmc/linux/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-meson8b.c185 &clk_divider_ops, in meson8b_init_rgmii_tx_clk()
/openbmc/linux/drivers/pwm/
H A Dpwm-meson.c480 init.ops = &clk_divider_ops; in meson_pwm_init_channels()

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