xref: /openbmc/linux/drivers/clk/imx/clk-busy.c (revision 79ef35a9)
1fcaf2036SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
211f68120SShawn Guo /*
311f68120SShawn Guo  * Copyright 2012 Freescale Semiconductor, Inc.
411f68120SShawn Guo  * Copyright 2012 Linaro Ltd.
511f68120SShawn Guo  */
611f68120SShawn Guo 
77d6b5e4fSAnson Huang #include <linux/bits.h>
811f68120SShawn Guo #include <linux/clk.h>
911f68120SShawn Guo #include <linux/clk-provider.h>
1011f68120SShawn Guo #include <linux/io.h>
1111f68120SShawn Guo #include <linux/slab.h>
1211f68120SShawn Guo #include <linux/jiffies.h>
1311f68120SShawn Guo #include <linux/err.h>
1411f68120SShawn Guo #include "clk.h"
1511f68120SShawn Guo 
clk_busy_wait(void __iomem * reg,u8 shift)1611f68120SShawn Guo static int clk_busy_wait(void __iomem *reg, u8 shift)
1711f68120SShawn Guo {
1811f68120SShawn Guo 	unsigned long timeout = jiffies + msecs_to_jiffies(10);
1911f68120SShawn Guo 
2011f68120SShawn Guo 	while (readl_relaxed(reg) & (1 << shift))
2111f68120SShawn Guo 		if (time_after(jiffies, timeout))
2211f68120SShawn Guo 			return -ETIMEDOUT;
2311f68120SShawn Guo 
2411f68120SShawn Guo 	return 0;
2511f68120SShawn Guo }
2611f68120SShawn Guo 
2711f68120SShawn Guo struct clk_busy_divider {
2811f68120SShawn Guo 	struct clk_divider div;
2911f68120SShawn Guo 	const struct clk_ops *div_ops;
3011f68120SShawn Guo 	void __iomem *reg;
3111f68120SShawn Guo 	u8 shift;
3211f68120SShawn Guo };
3311f68120SShawn Guo 
to_clk_busy_divider(struct clk_hw * hw)3411f68120SShawn Guo static inline struct clk_busy_divider *to_clk_busy_divider(struct clk_hw *hw)
3511f68120SShawn Guo {
365fd9c05cSGeliang Tang 	struct clk_divider *div = to_clk_divider(hw);
3711f68120SShawn Guo 
3811f68120SShawn Guo 	return container_of(div, struct clk_busy_divider, div);
3911f68120SShawn Guo }
4011f68120SShawn Guo 
clk_busy_divider_recalc_rate(struct clk_hw * hw,unsigned long parent_rate)4111f68120SShawn Guo static unsigned long clk_busy_divider_recalc_rate(struct clk_hw *hw,
4211f68120SShawn Guo 						  unsigned long parent_rate)
4311f68120SShawn Guo {
4411f68120SShawn Guo 	struct clk_busy_divider *busy = to_clk_busy_divider(hw);
4511f68120SShawn Guo 
4611f68120SShawn Guo 	return busy->div_ops->recalc_rate(&busy->div.hw, parent_rate);
4711f68120SShawn Guo }
4811f68120SShawn Guo 
clk_busy_divider_round_rate(struct clk_hw * hw,unsigned long rate,unsigned long * prate)4911f68120SShawn Guo static long clk_busy_divider_round_rate(struct clk_hw *hw, unsigned long rate,
5011f68120SShawn Guo 					unsigned long *prate)
5111f68120SShawn Guo {
5211f68120SShawn Guo 	struct clk_busy_divider *busy = to_clk_busy_divider(hw);
5311f68120SShawn Guo 
5411f68120SShawn Guo 	return busy->div_ops->round_rate(&busy->div.hw, rate, prate);
5511f68120SShawn Guo }
5611f68120SShawn Guo 
clk_busy_divider_set_rate(struct clk_hw * hw,unsigned long rate,unsigned long parent_rate)5711f68120SShawn Guo static int clk_busy_divider_set_rate(struct clk_hw *hw, unsigned long rate,
5811f68120SShawn Guo 		unsigned long parent_rate)
5911f68120SShawn Guo {
6011f68120SShawn Guo 	struct clk_busy_divider *busy = to_clk_busy_divider(hw);
6111f68120SShawn Guo 	int ret;
6211f68120SShawn Guo 
6311f68120SShawn Guo 	ret = busy->div_ops->set_rate(&busy->div.hw, rate, parent_rate);
6411f68120SShawn Guo 	if (!ret)
6511f68120SShawn Guo 		ret = clk_busy_wait(busy->reg, busy->shift);
6611f68120SShawn Guo 
6711f68120SShawn Guo 	return ret;
6811f68120SShawn Guo }
6911f68120SShawn Guo 
70fa1da981SBhumika Goyal static const struct clk_ops clk_busy_divider_ops = {
7111f68120SShawn Guo 	.recalc_rate = clk_busy_divider_recalc_rate,
7211f68120SShawn Guo 	.round_rate = clk_busy_divider_round_rate,
7311f68120SShawn Guo 	.set_rate = clk_busy_divider_set_rate,
7411f68120SShawn Guo };
7511f68120SShawn Guo 
imx_clk_hw_busy_divider(const char * name,const char * parent_name,void __iomem * reg,u8 shift,u8 width,void __iomem * busy_reg,u8 busy_shift)76dd1a6c0dSAbel Vesa struct clk_hw *imx_clk_hw_busy_divider(const char *name, const char *parent_name,
7711f68120SShawn Guo 				 void __iomem *reg, u8 shift, u8 width,
7811f68120SShawn Guo 				 void __iomem *busy_reg, u8 busy_shift)
7911f68120SShawn Guo {
8011f68120SShawn Guo 	struct clk_busy_divider *busy;
81dd1a6c0dSAbel Vesa 	struct clk_hw *hw;
8211f68120SShawn Guo 	struct clk_init_data init;
83dd1a6c0dSAbel Vesa 	int ret;
8411f68120SShawn Guo 
8511f68120SShawn Guo 	busy = kzalloc(sizeof(*busy), GFP_KERNEL);
8611f68120SShawn Guo 	if (!busy)
8711f68120SShawn Guo 		return ERR_PTR(-ENOMEM);
8811f68120SShawn Guo 
8911f68120SShawn Guo 	busy->reg = busy_reg;
9011f68120SShawn Guo 	busy->shift = busy_shift;
9111f68120SShawn Guo 
9211f68120SShawn Guo 	busy->div.reg = reg;
9311f68120SShawn Guo 	busy->div.shift = shift;
9411f68120SShawn Guo 	busy->div.width = width;
9511f68120SShawn Guo 	busy->div.lock = &imx_ccm_lock;
9611f68120SShawn Guo 	busy->div_ops = &clk_divider_ops;
9711f68120SShawn Guo 
9811f68120SShawn Guo 	init.name = name;
9911f68120SShawn Guo 	init.ops = &clk_busy_divider_ops;
1006f9575e5SBai Ping 	init.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL;
10111f68120SShawn Guo 	init.parent_names = &parent_name;
10211f68120SShawn Guo 	init.num_parents = 1;
10311f68120SShawn Guo 
10411f68120SShawn Guo 	busy->div.hw.init = &init;
10511f68120SShawn Guo 
106dd1a6c0dSAbel Vesa 	hw = &busy->div.hw;
10711f68120SShawn Guo 
108dd1a6c0dSAbel Vesa 	ret = clk_hw_register(NULL, hw);
109dd1a6c0dSAbel Vesa 	if (ret) {
110dd1a6c0dSAbel Vesa 		kfree(busy);
111dd1a6c0dSAbel Vesa 		return ERR_PTR(ret);
112dd1a6c0dSAbel Vesa 	}
113dd1a6c0dSAbel Vesa 
114dd1a6c0dSAbel Vesa 	return hw;
11511f68120SShawn Guo }
11611f68120SShawn Guo 
11711f68120SShawn Guo struct clk_busy_mux {
11811f68120SShawn Guo 	struct clk_mux mux;
11911f68120SShawn Guo 	const struct clk_ops *mux_ops;
12011f68120SShawn Guo 	void __iomem *reg;
12111f68120SShawn Guo 	u8 shift;
12211f68120SShawn Guo };
12311f68120SShawn Guo 
to_clk_busy_mux(struct clk_hw * hw)12411f68120SShawn Guo static inline struct clk_busy_mux *to_clk_busy_mux(struct clk_hw *hw)
12511f68120SShawn Guo {
1265fd9c05cSGeliang Tang 	struct clk_mux *mux = to_clk_mux(hw);
12711f68120SShawn Guo 
12811f68120SShawn Guo 	return container_of(mux, struct clk_busy_mux, mux);
12911f68120SShawn Guo }
13011f68120SShawn Guo 
clk_busy_mux_get_parent(struct clk_hw * hw)13111f68120SShawn Guo static u8 clk_busy_mux_get_parent(struct clk_hw *hw)
13211f68120SShawn Guo {
13311f68120SShawn Guo 	struct clk_busy_mux *busy = to_clk_busy_mux(hw);
13411f68120SShawn Guo 
13511f68120SShawn Guo 	return busy->mux_ops->get_parent(&busy->mux.hw);
13611f68120SShawn Guo }
13711f68120SShawn Guo 
clk_busy_mux_set_parent(struct clk_hw * hw,u8 index)13811f68120SShawn Guo static int clk_busy_mux_set_parent(struct clk_hw *hw, u8 index)
13911f68120SShawn Guo {
14011f68120SShawn Guo 	struct clk_busy_mux *busy = to_clk_busy_mux(hw);
14111f68120SShawn Guo 	int ret;
14211f68120SShawn Guo 
14311f68120SShawn Guo 	ret = busy->mux_ops->set_parent(&busy->mux.hw, index);
14411f68120SShawn Guo 	if (!ret)
14511f68120SShawn Guo 		ret = clk_busy_wait(busy->reg, busy->shift);
14611f68120SShawn Guo 
14711f68120SShawn Guo 	return ret;
14811f68120SShawn Guo }
14911f68120SShawn Guo 
150fa1da981SBhumika Goyal static const struct clk_ops clk_busy_mux_ops = {
151*79ef35a9SMaxime Ripard 	.determine_rate = clk_hw_determine_rate_no_reparent,
15211f68120SShawn Guo 	.get_parent = clk_busy_mux_get_parent,
15311f68120SShawn Guo 	.set_parent = clk_busy_mux_set_parent,
15411f68120SShawn Guo };
15511f68120SShawn Guo 
imx_clk_hw_busy_mux(const char * name,void __iomem * reg,u8 shift,u8 width,void __iomem * busy_reg,u8 busy_shift,const char * const * parent_names,int num_parents)156dd1a6c0dSAbel Vesa struct clk_hw *imx_clk_hw_busy_mux(const char *name, void __iomem *reg, u8 shift,
15711f68120SShawn Guo 			     u8 width, void __iomem *busy_reg, u8 busy_shift,
1589e5ef7a5SA.s. Dong 			     const char * const *parent_names, int num_parents)
15911f68120SShawn Guo {
16011f68120SShawn Guo 	struct clk_busy_mux *busy;
161dd1a6c0dSAbel Vesa 	struct clk_hw *hw;
16211f68120SShawn Guo 	struct clk_init_data init;
163dd1a6c0dSAbel Vesa 	int ret;
16411f68120SShawn Guo 
16511f68120SShawn Guo 	busy = kzalloc(sizeof(*busy), GFP_KERNEL);
16611f68120SShawn Guo 	if (!busy)
16711f68120SShawn Guo 		return ERR_PTR(-ENOMEM);
16811f68120SShawn Guo 
16911f68120SShawn Guo 	busy->reg = busy_reg;
17011f68120SShawn Guo 	busy->shift = busy_shift;
17111f68120SShawn Guo 
17211f68120SShawn Guo 	busy->mux.reg = reg;
17311f68120SShawn Guo 	busy->mux.shift = shift;
17411f68120SShawn Guo 	busy->mux.mask = BIT(width) - 1;
17511f68120SShawn Guo 	busy->mux.lock = &imx_ccm_lock;
17611f68120SShawn Guo 	busy->mux_ops = &clk_mux_ops;
17711f68120SShawn Guo 
17811f68120SShawn Guo 	init.name = name;
17911f68120SShawn Guo 	init.ops = &clk_busy_mux_ops;
1806f9575e5SBai Ping 	init.flags = CLK_IS_CRITICAL;
18111f68120SShawn Guo 	init.parent_names = parent_names;
18211f68120SShawn Guo 	init.num_parents = num_parents;
18311f68120SShawn Guo 
18411f68120SShawn Guo 	busy->mux.hw.init = &init;
18511f68120SShawn Guo 
186dd1a6c0dSAbel Vesa 	hw = &busy->mux.hw;
18711f68120SShawn Guo 
188dd1a6c0dSAbel Vesa 	ret = clk_hw_register(NULL, hw);
189dd1a6c0dSAbel Vesa 	if (ret) {
190dd1a6c0dSAbel Vesa 		kfree(busy);
191dd1a6c0dSAbel Vesa 		return ERR_PTR(ret);
192dd1a6c0dSAbel Vesa 	}
193dd1a6c0dSAbel Vesa 
194dd1a6c0dSAbel Vesa 	return hw;
19511f68120SShawn Guo }
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