| /openbmc/qemu/linux-user/include/host/loongarch64/ |
| H A D | host-signal.h | 41 case 0b01: /* sc.w */ in host_signal_write()
48 case 0b01: /* stox4.w (stptr.w) */ in host_signal_write()
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| /openbmc/linux/drivers/net/mdio/ |
| H A D | mdio-aspeed.c | 23 #define MDIO_C22_OP_WRITE 0b01
26 #define MDIO_C45_OP_WRITE 0b01
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| /openbmc/qemu/tests/tcg/ppc64/ |
| H A D | vector.c | 42 assert(result_wi == 0b01); in main()
|
| /openbmc/qemu/target/ppc/ |
| H A D | power8-pmu-regs.c.inc | 19 * Read access is granted for all PMCC values but 0b01, where a
38 * Assistance Interrupt. Userspace writing with PMCC 0b01 will
48 /* PMCC = 0b01 */
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| /openbmc/linux/arch/loongarch/include/asm/ |
| H A D | hw_breakpoint.h | 34 #define LOONGARCH_BREAKPOINT_LEN_4 0b01
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| /openbmc/linux/drivers/staging/media/ipu3/include/uapi/ |
| H A D | intel-ipu3.h | 1270 __u32 b01:5; member
1320 __u32 b01:9; member
1346 __u32 b01:8; member
1381 __u32 b01:8; member
1432 __u32 b01:10; member
|
| /openbmc/qemu/tests/qtest/ |
| H A D | pnv-xive2-common.h | 78 #define XIVE_ESB_OFF 0b01
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| H A D | stm32l4x5_rcc-test.c | 80 (0b01 << R_PLLCFGR_PLLSRC_SHIFT)); in test_init_pll()
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| H A D | microbit-test.c | 376 qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01); in test_nrf51_gpio()
389 qtest_writel(qts, NRF51_GPIO_BASE + NRF51_GPIO_REG_CNF_START, 0b01); in test_nrf51_gpio()
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| H A D | stm32l4x5_usart-test.c | 134 (0b01 << R_PLLCFGR_PLLSRC_SHIFT)); in init_clocks()
|
| /openbmc/linux/Documentation/i2c/busses/ |
| H A D | i2c-mlxcpld.rst | 29 Bits [6:5] - transaction length. b01 - 72B is supported,
|
| /openbmc/linux/tools/edid/ |
| H A D | edid.S | 32 #define XY_RATIO_4_3 0b01
|
| /openbmc/linux/arch/arm64/include/uapi/asm/ |
| H A D | ptrace.h | 72 #define PSR_BTYPE_JC (0b01 << PSR_BTYPE_SHIFT)
|
| /openbmc/linux/arch/arm64/tools/ |
| H A D | sysreg | 1693 0b01 SYNC
1699 0b01 SYNC
2003 0b01 RESERVED
2373 0b01 PHYS
2562 0b01 IRQ
2567 0b01 WRAP
2602 0b01 NON_SECURE
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| /openbmc/linux/Documentation/arch/arm64/ |
| H A D | booting.rst | 344 - HWFGRTR_EL2.nTPIDR2_EL0 (bit 55) must be initialised to 0b01.
346 - HWFGWTR_EL2.nTPIDR2_EL0 (bit 55) must be initialised to 0b01.
348 - HWFGRTR_EL2.nSMPRI_EL1 (bit 54) must be initialised to 0b01.
350 - HWFGWTR_EL2.nSMPRI_EL1 (bit 54) must be initialised to 0b01.
|
| /openbmc/linux/Documentation/admin-guide/perf/ |
| H A D | hisi-pcie-pmu.rst | 120 - 2'b01: Bandwidth of TLP payloads
|
| H A D | hisi-pmu.rst | 108 - 2'b01: is the same as 2'b11;
|
| /openbmc/u-boot/doc/ |
| H A D | README.uniphier | 451 0b01 31MB RAM / 1MB Peri 00000000-01efffff 01f00000-01ffffff
455 Set BSKZ[1:0] to 0b01 for U-Boot.
|
| /openbmc/u-boot/board/buffalo/lsxl/ |
| H A D | kwbimage-lschl.cfg | 33 # bit31-30: 0b01 required
|
| H A D | kwbimage-lsxhl.cfg | 33 # bit31-30: 0b01 required
|
| /openbmc/u-boot/board/d-link/dns325/ |
| H A D | kwbimage.cfg | 32 # bit31-30: 0b01 required
|
| /openbmc/linux/arch/powerpc/platforms/powernv/ |
| H A D | ocxl.c | 560 val |= FIELD_PREP(PNV_OCXL_ATSD_LNCH_IS, 0b01); in pnv_ocxl_tlb_invalidate()
|
| /openbmc/linux/drivers/iio/addac/ |
| H A D | ad74413r.c | 109 #define AD74413R_ADC_REJECTION_NONE 0b01
135 #define AD74413R_CONV_SEQ_SINGLE 0b01
|
| /openbmc/u-boot/arch/arm/dts/ |
| H A D | exynos5420-peach-pit.dts | 107 * [5:4] = b01 0.5%, b10 1%, b11 1.5%
|
| /openbmc/qemu/target/riscv/ |
| H A D | cpu_bits.h | 905 #define SEED_OPST_WAIT (0b01 << 30)
|