1*0eb9fcc7SShivaprasad G Bhat #include <assert.h>
2*0eb9fcc7SShivaprasad G Bhat #include <stdint.h>
3*0eb9fcc7SShivaprasad G Bhat #include "qemu/compiler.h"
4*0eb9fcc7SShivaprasad G Bhat
main(void)5*0eb9fcc7SShivaprasad G Bhat int main(void)
6*0eb9fcc7SShivaprasad G Bhat {
7*0eb9fcc7SShivaprasad G Bhat unsigned int result_wi;
8*0eb9fcc7SShivaprasad G Bhat vector unsigned char vbc_bi_src = { 0xFF, 0xFF, 0, 0xFF, 0xFF, 0xFF,
9*0eb9fcc7SShivaprasad G Bhat 0xFF, 0xFF, 0xFF, 0xFF, 0, 0, 0,
10*0eb9fcc7SShivaprasad G Bhat 0, 0xFF, 0xFF};
11*0eb9fcc7SShivaprasad G Bhat vector unsigned short vbc_hi_src = { 0xFFFF, 0, 0, 0xFFFF,
12*0eb9fcc7SShivaprasad G Bhat 0, 0, 0xFFFF, 0xFFFF};
13*0eb9fcc7SShivaprasad G Bhat vector unsigned int vbc_wi_src = {0, 0, 0xFFFFFFFF, 0xFFFFFFFF};
14*0eb9fcc7SShivaprasad G Bhat vector unsigned long long vbc_di_src = {0xFFFFFFFFFFFFFFFF, 0};
15*0eb9fcc7SShivaprasad G Bhat vector __uint128_t vbc_qi_src;
16*0eb9fcc7SShivaprasad G Bhat
17*0eb9fcc7SShivaprasad G Bhat asm("vextractbm %0, %1" : "=r" (result_wi) : "v" (vbc_bi_src));
18*0eb9fcc7SShivaprasad G Bhat #if HOST_BIG_ENDIAN
19*0eb9fcc7SShivaprasad G Bhat assert(result_wi == 0b1101111111000011);
20*0eb9fcc7SShivaprasad G Bhat #else
21*0eb9fcc7SShivaprasad G Bhat assert(result_wi == 0b1100001111111011);
22*0eb9fcc7SShivaprasad G Bhat #endif
23*0eb9fcc7SShivaprasad G Bhat
24*0eb9fcc7SShivaprasad G Bhat asm("vextracthm %0, %1" : "=r" (result_wi) : "v" (vbc_hi_src));
25*0eb9fcc7SShivaprasad G Bhat #if HOST_BIG_ENDIAN
26*0eb9fcc7SShivaprasad G Bhat assert(result_wi == 0b10010011);
27*0eb9fcc7SShivaprasad G Bhat #else
28*0eb9fcc7SShivaprasad G Bhat assert(result_wi == 0b11001001);
29*0eb9fcc7SShivaprasad G Bhat #endif
30*0eb9fcc7SShivaprasad G Bhat
31*0eb9fcc7SShivaprasad G Bhat asm("vextractwm %0, %1" : "=r" (result_wi) : "v" (vbc_wi_src));
32*0eb9fcc7SShivaprasad G Bhat #if HOST_BIG_ENDIAN
33*0eb9fcc7SShivaprasad G Bhat assert(result_wi == 0b0011);
34*0eb9fcc7SShivaprasad G Bhat #else
35*0eb9fcc7SShivaprasad G Bhat assert(result_wi == 0b1100);
36*0eb9fcc7SShivaprasad G Bhat #endif
37*0eb9fcc7SShivaprasad G Bhat
38*0eb9fcc7SShivaprasad G Bhat asm("vextractdm %0, %1" : "=r" (result_wi) : "v" (vbc_di_src));
39*0eb9fcc7SShivaprasad G Bhat #if HOST_BIG_ENDIAN
40*0eb9fcc7SShivaprasad G Bhat assert(result_wi == 0b10);
41*0eb9fcc7SShivaprasad G Bhat #else
42*0eb9fcc7SShivaprasad G Bhat assert(result_wi == 0b01);
43*0eb9fcc7SShivaprasad G Bhat #endif
44*0eb9fcc7SShivaprasad G Bhat
45*0eb9fcc7SShivaprasad G Bhat vbc_qi_src[0] = 0x1;
46*0eb9fcc7SShivaprasad G Bhat vbc_qi_src[0] = vbc_qi_src[0] << 127;
47*0eb9fcc7SShivaprasad G Bhat asm("vextractqm %0, %1" : "=r" (result_wi) : "v" (vbc_qi_src));
48*0eb9fcc7SShivaprasad G Bhat assert(result_wi == 0b1);
49*0eb9fcc7SShivaprasad G Bhat
50*0eb9fcc7SShivaprasad G Bhat return 0;
51*0eb9fcc7SShivaprasad G Bhat }
52