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Searched refs:XCHAL_ICACHE_LINE_LOCKABLE (Results 1 – 25 of 27) sorted by relevance

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/openbmc/qemu/tests/tcg/xtensa/
H A Dtest_cache.S36 #if XCHAL_ICACHE_LINE_LOCKABLE
91 #if XCHAL_ICACHE_LINE_LOCKABLE
128 #if XCHAL_ICACHE_LINE_LOCKABLE
/openbmc/linux/arch/xtensa/variants/fsf/include/variant/
H A Dcore.h151 #define XCHAL_ICACHE_LINE_LOCKABLE 0 macro
/openbmc/qemu/target/xtensa/core-fsf/
H A Dcore-isa.h153 #define XCHAL_ICACHE_LINE_LOCKABLE 0 macro
/openbmc/linux/arch/xtensa/variants/test_mmuhifi_c3/include/variant/
H A Dcore.h167 #define XCHAL_ICACHE_LINE_LOCKABLE 0 macro
/openbmc/linux/arch/xtensa/include/asm/
H A Dcacheasm.h95 #if XCHAL_ICACHE_LINE_LOCKABLE && XCHAL_ICACHE_SIZE
/openbmc/u-boot/arch/xtensa/include/asm/
H A Dcacheasm.h92 #if XCHAL_ICACHE_LINE_LOCKABLE && XCHAL_ICACHE_SIZE
/openbmc/linux/arch/xtensa/variants/dc232b/include/variant/
H A Dcore.h158 #define XCHAL_ICACHE_LINE_LOCKABLE 1 macro
/openbmc/qemu/target/xtensa/core-dc232b/
H A Dcore-isa.h157 #define XCHAL_ICACHE_LINE_LOCKABLE 1 macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h156 #define XCHAL_ICACHE_LINE_LOCKABLE 1 macro
/openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/
H A Dcore-isa.h222 #define XCHAL_ICACHE_LINE_LOCKABLE 0 macro
/openbmc/qemu/target/xtensa/core-lx106/
H A Dcore-isa.h189 #define XCHAL_ICACHE_LINE_LOCKABLE 0 macro
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dcore-isa.h196 #define XCHAL_ICACHE_LINE_LOCKABLE 1 macro
/openbmc/linux/arch/xtensa/variants/dc233c/include/variant/
H A Dcore.h200 #define XCHAL_ICACHE_LINE_LOCKABLE 1 macro
/openbmc/qemu/target/xtensa/core-dc233c/
H A Dcore-isa.h199 #define XCHAL_ICACHE_LINE_LOCKABLE 1 macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc233c/
H A Dcore.h178 #define XCHAL_ICACHE_LINE_LOCKABLE 1 macro
/openbmc/linux/arch/xtensa/variants/test_kc705_hifi/include/variant/
H A Dcore.h222 #define XCHAL_ICACHE_LINE_LOCKABLE 1 macro
/openbmc/linux/arch/xtensa/variants/test_kc705_be/include/variant/
H A Dcore.h258 #define XCHAL_ICACHE_LINE_LOCKABLE 1 macro
/openbmc/linux/arch/xtensa/variants/de212/include/variant/
H A Dcore.h257 #define XCHAL_ICACHE_LINE_LOCKABLE 1 macro
/openbmc/linux/arch/xtensa/variants/csp/include/variant/
H A Dcore.h257 #define XCHAL_ICACHE_LINE_LOCKABLE 1 macro
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dcore-isa.h257 #define XCHAL_ICACHE_LINE_LOCKABLE 1 macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dcore.h235 #define XCHAL_ICACHE_LINE_LOCKABLE 1 macro
/openbmc/qemu/target/xtensa/core-de212/
H A Dcore-isa.h269 #define XCHAL_ICACHE_LINE_LOCKABLE 1 macro
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dcore-isa.h287 #define XCHAL_ICACHE_LINE_LOCKABLE 0 macro
/openbmc/linux/arch/xtensa/kernel/
H A Dhead.S177 #if XCHAL_ICACHE_LINE_LOCKABLE
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dcore-isa.h367 #define XCHAL_ICACHE_LINE_LOCKABLE 1 macro

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