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Searched refs:UVD_STATUS__VCPU_REPORT__SHIFT (Results 1 – 20 of 20) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h752 #define UVD_STATUS__VCPU_REPORT__SHIFT … macro
H A Duvd_4_0_sh_mask.h693 #define UVD_STATUS__VCPU_REPORT__SHIFT 0x00000001 macro
H A Duvd_4_2_sh_mask.h632 #define UVD_STATUS__VCPU_REPORT__SHIFT 0x1 macro
H A Duvd_3_1_sh_mask.h626 #define UVD_STATUS__VCPU_REPORT__SHIFT 0x1 macro
H A Duvd_6_0_sh_mask.h696 #define UVD_STATUS__VCPU_REPORT__SHIFT 0x1 macro
H A Duvd_5_0_sh_mask.h694 #define UVD_STATUS__VCPU_REPORT__SHIFT 0x1 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1279 #define UVD_STATUS__VCPU_REPORT__SHIFT … macro
H A Dvcn_2_5_sh_mask.h1735 #define UVD_STATUS__VCPU_REPORT__SHIFT … macro
H A Dvcn_2_0_0_sh_mask.h2903 #define UVD_STATUS__VCPU_REPORT__SHIFT … macro
H A Dvcn_2_6_0_sh_mask.h3371 #define UVD_STATUS__VCPU_REPORT__SHIFT … macro
H A Dvcn_3_0_0_sh_mask.h2424 #define UVD_STATUS__VCPU_REPORT__SHIFT … macro
H A Dvcn_4_0_0_sh_mask.h3612 #define UVD_STATUS__VCPU_REPORT__SHIFT … macro
H A Dvcn_4_0_3_sh_mask.h3643 #define UVD_STATUS__VCPU_REPORT__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Duvd_v7_0.c911 ~(2 << UVD_STATUS__VCPU_REPORT__SHIFT), 0); in uvd_v7_0_sriov_start()
1078 ~(2 << UVD_STATUS__VCPU_REPORT__SHIFT)); in uvd_v7_0_start()
H A Duvd_v6_0.c829 WREG32_P(mmUVD_STATUS, 0, ~(2 << UVD_STATUS__VCPU_REPORT__SHIFT)); in uvd_v6_0_start()
H A Dvcn_v4_0_3.c1176 ~(2 << UVD_STATUS__VCPU_REPORT__SHIFT)); in vcn_v4_0_3_start()
H A Dvcn_v2_0.c1054 ~(2 << UVD_STATUS__VCPU_REPORT__SHIFT)); in vcn_v2_0_start()
H A Dvcn_v4_0.c1182 ~(2 << UVD_STATUS__VCPU_REPORT__SHIFT)); in vcn_v4_0_start()
H A Dvcn_v2_5.c1105 ~(2 << UVD_STATUS__VCPU_REPORT__SHIFT)); in vcn_v2_5_start()
H A Dvcn_v3_0.c1225 ~(2 << UVD_STATUS__VCPU_REPORT__SHIFT)); in vcn_v3_0_start()