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Searched refs:UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN_MASK (Results 1 – 18 of 18) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_4_0_sh_mask.h380 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN_MASK 0x00000008L macro
H A Duvd_4_2_sh_mask.h387 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN_MASK 0x8 macro
H A Duvd_3_1_sh_mask.h383 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN_MASK 0x8 macro
H A Duvd_6_0_sh_mask.h421 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN_MASK 0x8 macro
H A Duvd_5_0_sh_mask.h419 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN_MASK 0x8 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1065 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN_MASK … macro
H A Dvcn_2_5_sh_mask.h3402 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN_MASK … macro
H A Dvcn_2_0_0_sh_mask.h2451 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN_MASK … macro
H A Dvcn_2_6_0_sh_mask.h997 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN_MASK … macro
H A Dvcn_3_0_0_sh_mask.h4724 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN_MASK … macro
H A Dvcn_4_0_0_sh_mask.h4873 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN_MASK … macro
H A Dvcn_4_0_3_sh_mask.h4916 #define UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v4_0_3.c1273 tmp = UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN_MASK | in vcn_v4_0_3_stop()
H A Dvcn_v2_0.c1150 tmp = UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN_MASK | in vcn_v2_0_stop()
H A Dvcn_v4_0.c1478 tmp = UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN_MASK | in vcn_v4_0_stop()
H A Dvcn_v1_0.c1126 tmp = UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN_MASK | in vcn_v1_0_stop_spg_mode()
H A Dvcn_v2_5.c1398 tmp = UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN_MASK | in vcn_v2_5_stop()
H A Dvcn_v3_0.c1541 tmp = UVD_LMI_STATUS__VCPU_LMI_WRITE_CLEAN_MASK | in vcn_v3_0_stop()