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Searched refs:UVD_CGC_GATE__REGS_MASK (Results 1 – 21 of 21) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h400 #define UVD_CGC_GATE__REGS_MASK … macro
H A Duvd_4_0_sh_mask.h96 #define UVD_CGC_GATE__REGS_MASK 0x00000008L macro
H A Duvd_3_1_sh_mask.h129 #define UVD_CGC_GATE__REGS_MASK 0x8 macro
H A Duvd_4_2_sh_mask.h129 #define UVD_CGC_GATE__REGS_MASK 0x8 macro
H A Duvd_6_0_sh_mask.h143 #define UVD_CGC_GATE__REGS_MASK 0x8 macro
H A Duvd_5_0_sh_mask.h141 #define UVD_CGC_GATE__REGS_MASK 0x8 macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Duvd_v5_0.c664 data3 &= ~UVD_CGC_GATE__REGS_MASK; in uvd_v5_0_enable_clock_gating()
H A Duvd_v6_0.c1323 data3 &= ~UVD_CGC_GATE__REGS_MASK; in uvd_v6_0_enable_clock_gating()
H A Dvcn_v4_0_3.c552 | UVD_CGC_GATE__REGS_MASK in vcn_v4_0_3_disable_clock_gating()
H A Dvcn_v2_0.c511 | UVD_CGC_GATE__REGS_MASK in vcn_v2_0_disable_clock_gating()
H A Dvcn_v4_0.c680 | UVD_CGC_GATE__REGS_MASK in vcn_v4_0_disable_clock_gating()
H A Dvcn_v1_0.c486 | UVD_CGC_GATE__REGS_MASK in vcn_v1_0_disable_clock_gating()
H A Dvcn_v2_5.c594 | UVD_CGC_GATE__REGS_MASK in vcn_v2_5_disable_clock_gating()
H A Dvcn_v3_0.c716 | UVD_CGC_GATE__REGS_MASK in vcn_v3_0_disable_clock_gating()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h828 #define UVD_CGC_GATE__REGS_MASK … macro
H A Dvcn_2_5_sh_mask.h1898 #define UVD_CGC_GATE__REGS_MASK … macro
H A Dvcn_2_0_0_sh_mask.h1847 #define UVD_CGC_GATE__REGS_MASK … macro
H A Dvcn_2_6_0_sh_mask.h3569 #define UVD_CGC_GATE__REGS_MASK … macro
H A Dvcn_3_0_0_sh_mask.h2628 #define UVD_CGC_GATE__REGS_MASK … macro
H A Dvcn_4_0_0_sh_mask.h63 #define UVD_CGC_GATE__REGS_MASK … macro
H A Dvcn_4_0_3_sh_mask.h63 #define UVD_CGC_GATE__REGS_MASK … macro