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Searched refs:UVD_CGC_CTRL__RBC_MODE_MASK (Results 1 – 22 of 22) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h453 #define UVD_CGC_CTRL__RBC_MODE_MASK … macro
H A Duvd_4_0_sh_mask.h54 #define UVD_CGC_CTRL__RBC_MODE_MASK 0x00100000L macro
H A Duvd_3_1_sh_mask.h245 #define UVD_CGC_CTRL__RBC_MODE_MASK 0x100000 macro
H A Duvd_4_2_sh_mask.h245 #define UVD_CGC_CTRL__RBC_MODE_MASK 0x100000 macro
H A Duvd_6_0_sh_mask.h269 #define UVD_CGC_CTRL__RBC_MODE_MASK 0x100000 macro
H A Duvd_5_0_sh_mask.h267 #define UVD_CGC_CTRL__RBC_MODE_MASK 0x100000 macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v4_0_3.c570 | UVD_CGC_CTRL__RBC_MODE_MASK in vcn_v4_0_3_disable_clock_gating()
642 UVD_CGC_CTRL__RBC_MODE_MASK | in vcn_v4_0_3_disable_clock_gating_dpg_mode()
697 | UVD_CGC_CTRL__RBC_MODE_MASK in vcn_v4_0_3_enable_clock_gating()
H A Dvcn_v2_0.c540 | UVD_CGC_CTRL__RBC_MODE_MASK in vcn_v2_0_disable_clock_gating()
616 UVD_CGC_CTRL__RBC_MODE_MASK | in vcn_v2_0_clock_gating_dpg_mode()
677 | UVD_CGC_CTRL__RBC_MODE_MASK in vcn_v2_0_enable_clock_gating()
H A Dvcn_v4_0.c711 | UVD_CGC_CTRL__RBC_MODE_MASK in vcn_v4_0_disable_clock_gating()
796 UVD_CGC_CTRL__RBC_MODE_MASK | in vcn_v4_0_disable_clock_gating_dpg_mode()
854 | UVD_CGC_CTRL__RBC_MODE_MASK in vcn_v4_0_enable_clock_gating()
H A Dvcn_v1_0.c515 | UVD_CGC_CTRL__RBC_MODE_MASK in vcn_v1_0_disable_clock_gating()
615 | UVD_CGC_CTRL__RBC_MODE_MASK in vcn_v1_0_enable_clock_gating()
673 UVD_CGC_CTRL__RBC_MODE_MASK | in vcn_v1_0_clock_gating_dpg_mode()
H A Dvcn_v2_5.c626 | UVD_CGC_CTRL__RBC_MODE_MASK in vcn_v2_5_disable_clock_gating()
703 UVD_CGC_CTRL__RBC_MODE_MASK | in vcn_v2_5_clock_gating_dpg_mode()
765 | UVD_CGC_CTRL__RBC_MODE_MASK in vcn_v2_5_enable_clock_gating()
H A Duvd_v5_0.c700 UVD_CGC_CTRL__RBC_MODE_MASK | in uvd_v5_0_set_sw_clock_gating()
H A Dvcn_v3_0.c748 | UVD_CGC_CTRL__RBC_MODE_MASK in vcn_v3_0_disable_clock_gating()
847 UVD_CGC_CTRL__RBC_MODE_MASK | in vcn_v3_0_clock_gating_dpg_mode()
906 | UVD_CGC_CTRL__RBC_MODE_MASK in vcn_v3_0_enable_clock_gating()
H A Duvd_v6_0.c1357 UVD_CGC_CTRL__RBC_MODE_MASK | in uvd_v6_0_set_sw_clock_gating()
H A Duvd_v7_0.c1641 UVD_CGC_CTRL__RBC_MODE_MASK |
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h946 #define UVD_CGC_CTRL__RBC_MODE_MASK … macro
H A Dvcn_2_5_sh_mask.h2014 #define UVD_CGC_CTRL__RBC_MODE_MASK … macro
H A Dvcn_2_0_0_sh_mask.h1965 #define UVD_CGC_CTRL__RBC_MODE_MASK … macro
H A Dvcn_2_6_0_sh_mask.h3685 #define UVD_CGC_CTRL__RBC_MODE_MASK … macro
H A Dvcn_3_0_0_sh_mask.h2744 #define UVD_CGC_CTRL__RBC_MODE_MASK … macro
H A Dvcn_4_0_0_sh_mask.h122 #define UVD_CGC_CTRL__RBC_MODE_MASK … macro
H A Dvcn_4_0_3_sh_mask.h122 #define UVD_CGC_CTRL__RBC_MODE_MASK … macro