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Searched refs:RS485 (Results 1 – 25 of 34) sorted by relevance

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/openbmc/linux/Documentation/driver-api/serial/
H A Dserial-rs485.rst2 RS485 Serial Communications
21 half-duplex hardware like an RS485 transceiver or any RS232-connected
32 The Linux kernel provides the struct serial_rs485 to handle RS485
33 communications. This data structure is used to set and configure RS485
36 The device tree can also provide RS485 boot time parameters
41 Any driver for devices capable of working both as RS232 and RS485 should
48 what RS485 features the driver supports for the ``struct uart_port``.
58 From user-level, RS485 configuration can be get/set using the previous
59 ioctls. For instance, to set RS485 you can use the following code::
63 /* Include definition for RS485 ioctls: TIOCGRS485 and TIOCSRS485 */
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/openbmc/openbmc/meta-facebook/meta-minerva/recipes-phosphor/initrdscripts/phosphor-static-norootfs-init/
H A D99-platform-init25 # One is Modbus (RS485) interface connected to FT4232H channel 1, 2.
31 # D_485_x = End device for smart valve x via RS485
40 # X (RS485) RS232 +-------------+
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mm-venice-gw72xx-0x-rs485.dtso5 * GW72xx RS485 HD:
9 * - UART4_TX is DE for RS485 transmitter
H A Dimx8mm-venice-gw72xx-0x-rs422.dtso5 * GW72xx RS422 (RS485 full duplex):
9 * - UART4_TX is DE for RS485 transmitter
H A Dimx8mm-venice-gw73xx-0x-rs422.dtso5 * GW73xx RS422 (RS485 full duplex):
9 * - UART4_TX is DE for RS485 transmitter
H A Dimx8mm-venice-gw73xx-0x-rs485.dtso5 * GW73xx RS485 HD:
9 * - UART4_TX is DE for RS485 transmitter
H A Dimx8mm-verdin-dev.dtsi131 /* Verdin UART_1, connector X50 through RS485 transceiver */
H A Dimx8mp-verdin-dev.dtsi171 /* Verdin UART_1, connector X50 through RS485 transceiver */
H A Dimx8mm-venice-gw7901.dts1008 MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x40000041 /* RS485# */
1033 MX8MM_IOMUXC_SAI1_RXD6_GPIO4_IO8 0x40000110 /* RS485# */
1051 MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x40000041 /* RS485# */
H A Dimx8mm-venice-gw72xx.dtsi250 MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x40000104 /* RS485 */
H A Dimx8mm-venice-gw7903.dts578 /* off-board RS232/RS485/RS422 */
640 MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x40000041 /* RS485# */
H A Dimx8mn-venice-gw7902.dts626 /* RS232/RS485/RS422 selectable */
890 MX8MN_IOMUXC_SAI2_RXD0_GPIO4_IO23 0x40000110 /* RS485 */
H A Dimx8mm-venice-gw73xx.dtsi287 MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x40000104 /* RS485 */
/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Drs485.yaml7 title: RS485 serial communications
55 description: GPIO pin to enable RS485 bus termination.
60 signal can be used to control the RX part of an RS485 transceiver. Thereby
/openbmc/linux/drivers/tty/serial/8250/
H A D8250_fintek.c50 #define RS485 0xF0 macro
229 sio_write_reg(pdata, RS485, config); in fintek_8250_rs485_config()
301 reg = RS485; in fintek_8250_set_termios()
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun8i-r40-oka40i-c.dts23 serial5 = &uart5; /* RS485 */
187 &uart5 { /* RS485 */
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32mp15xx-dhcor-drc-compact.dtsi294 label = "RS485-1";
303 &usart3 { /* RS485 or RS232 */
304 label = "RS485-2";
H A Dstm32mp15xx-dhcom-drc02.dtsi144 &uart8 { /* RS485 */
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588-edgeble-neu6b-io.dts88 /* RS485 */
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-platform-ts550045 Indicates the presence of the RS485 option. If it is present,
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6ull-dhcom-drc02.dts94 /* Use UART as RS485 */
H A Dimx6qdl-nitrogen6_max.dtsi622 /* RS485 RX Enable: pull up */
624 /* RS485 DEN: pull down */
626 /* RS485/!RS232 Select: pull down (rs232) */
H A Dimx6qdl-dhcom-drc02.dtsi85 * On DRC02 this UART is used as RS485 interface and RS485_TX_En is
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-am62-verdin-dev.dtsi167 /* Verdin UART_1, connector X50 through RS485 transceiver. */
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-regor.dtsi185 /* RS485 - UART1 */

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