1ef484dfcSTim Harvey// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2ef484dfcSTim Harvey/* 3ef484dfcSTim Harvey * Copyright 2021 Gateworks Corporation 4ef484dfcSTim Harvey */ 5ef484dfcSTim Harvey 6ef484dfcSTim Harvey/dts-v1/; 7ef484dfcSTim Harvey 8ef484dfcSTim Harvey#include <dt-bindings/gpio/gpio.h> 9ef484dfcSTim Harvey#include <dt-bindings/input/linux-event-codes.h> 10ef484dfcSTim Harvey#include <dt-bindings/leds/common.h> 11ef484dfcSTim Harvey#include <dt-bindings/net/ti-dp83867.h> 12ef484dfcSTim Harvey 13ef484dfcSTim Harvey#include "imx8mn.dtsi" 14ef484dfcSTim Harvey 15ef484dfcSTim Harvey/ { 16ef484dfcSTim Harvey model = "Gateworks Venice GW7902 i.MX8MN board"; 17ef484dfcSTim Harvey compatible = "gw,imx8mn-gw7902", "fsl,imx8mn"; 18ef484dfcSTim Harvey 19ef484dfcSTim Harvey aliases { 20ef484dfcSTim Harvey usb0 = &usbotg1; 21ef484dfcSTim Harvey }; 22ef484dfcSTim Harvey 23ef484dfcSTim Harvey chosen { 24ef484dfcSTim Harvey stdout-path = &uart2; 25ef484dfcSTim Harvey }; 26ef484dfcSTim Harvey 27ef484dfcSTim Harvey memory@40000000 { 28ef484dfcSTim Harvey device_type = "memory"; 29ef484dfcSTim Harvey reg = <0x0 0x40000000 0 0x80000000>; 30ef484dfcSTim Harvey }; 31ef484dfcSTim Harvey 32ef484dfcSTim Harvey can20m: can20m { 33ef484dfcSTim Harvey compatible = "fixed-clock"; 34ef484dfcSTim Harvey #clock-cells = <0>; 35ef484dfcSTim Harvey clock-frequency = <20000000>; 36ef484dfcSTim Harvey clock-output-names = "can20m"; 37ef484dfcSTim Harvey }; 38ef484dfcSTim Harvey 39ef484dfcSTim Harvey gpio-keys { 40ef484dfcSTim Harvey compatible = "gpio-keys"; 41ef484dfcSTim Harvey 42b803d15eSKrzysztof Kozlowski key-user-pb { 43ef484dfcSTim Harvey label = "user_pb"; 44ef484dfcSTim Harvey gpios = <&gpio 2 GPIO_ACTIVE_LOW>; 45ef484dfcSTim Harvey linux,code = <BTN_0>; 46ef484dfcSTim Harvey }; 47ef484dfcSTim Harvey 48b803d15eSKrzysztof Kozlowski key-user-pb1x { 49ef484dfcSTim Harvey label = "user_pb1x"; 50ef484dfcSTim Harvey linux,code = <BTN_1>; 51ef484dfcSTim Harvey interrupt-parent = <&gsc>; 52ef484dfcSTim Harvey interrupts = <0>; 53ef484dfcSTim Harvey }; 54ef484dfcSTim Harvey 55ef484dfcSTim Harvey key-erased { 56ef484dfcSTim Harvey label = "key_erased"; 57ef484dfcSTim Harvey linux,code = <BTN_2>; 58ef484dfcSTim Harvey interrupt-parent = <&gsc>; 59ef484dfcSTim Harvey interrupts = <1>; 60ef484dfcSTim Harvey }; 61ef484dfcSTim Harvey 62b803d15eSKrzysztof Kozlowski key-eeprom-wp { 63ef484dfcSTim Harvey label = "eeprom_wp"; 64ef484dfcSTim Harvey linux,code = <BTN_3>; 65ef484dfcSTim Harvey interrupt-parent = <&gsc>; 66ef484dfcSTim Harvey interrupts = <2>; 67ef484dfcSTim Harvey }; 68ef484dfcSTim Harvey 69b803d15eSKrzysztof Kozlowski key-tamper { 70ef484dfcSTim Harvey label = "tamper"; 71ef484dfcSTim Harvey linux,code = <BTN_4>; 72ef484dfcSTim Harvey interrupt-parent = <&gsc>; 73ef484dfcSTim Harvey interrupts = <5>; 74ef484dfcSTim Harvey }; 75ef484dfcSTim Harvey 76ef484dfcSTim Harvey switch-hold { 77ef484dfcSTim Harvey label = "switch_hold"; 78ef484dfcSTim Harvey linux,code = <BTN_5>; 79ef484dfcSTim Harvey interrupt-parent = <&gsc>; 80ef484dfcSTim Harvey interrupts = <7>; 81ef484dfcSTim Harvey }; 82ef484dfcSTim Harvey }; 83ef484dfcSTim Harvey 84ef484dfcSTim Harvey led-controller { 85ef484dfcSTim Harvey compatible = "gpio-leds"; 86ef484dfcSTim Harvey pinctrl-names = "default"; 87ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_gpio_leds>; 88ef484dfcSTim Harvey 89ef484dfcSTim Harvey led-0 { 90ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 91ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 92ef484dfcSTim Harvey label = "panel1"; 93ef484dfcSTim Harvey gpios = <&gpio3 21 GPIO_ACTIVE_LOW>; 94ef484dfcSTim Harvey default-state = "off"; 95ef484dfcSTim Harvey }; 96ef484dfcSTim Harvey 97ef484dfcSTim Harvey led-1 { 98ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 99ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 100ef484dfcSTim Harvey label = "panel2"; 101ef484dfcSTim Harvey gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; 102ef484dfcSTim Harvey default-state = "off"; 103ef484dfcSTim Harvey }; 104ef484dfcSTim Harvey 105ef484dfcSTim Harvey led-2 { 106ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 107ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 108ef484dfcSTim Harvey label = "panel3"; 109ef484dfcSTim Harvey gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; 110ef484dfcSTim Harvey default-state = "off"; 111ef484dfcSTim Harvey }; 112ef484dfcSTim Harvey 113ef484dfcSTim Harvey led-3 { 114ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 115ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 116ef484dfcSTim Harvey label = "panel4"; 117ef484dfcSTim Harvey gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; 118ef484dfcSTim Harvey default-state = "off"; 119ef484dfcSTim Harvey }; 120ef484dfcSTim Harvey 121ef484dfcSTim Harvey led-4 { 122ef484dfcSTim Harvey function = LED_FUNCTION_STATUS; 123ef484dfcSTim Harvey color = <LED_COLOR_ID_GREEN>; 124ef484dfcSTim Harvey label = "panel5"; 125ef484dfcSTim Harvey gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; 126ef484dfcSTim Harvey default-state = "off"; 127ef484dfcSTim Harvey }; 128ef484dfcSTim Harvey }; 129ef484dfcSTim Harvey 130ef484dfcSTim Harvey pps { 131ef484dfcSTim Harvey compatible = "pps-gpio"; 132ef484dfcSTim Harvey pinctrl-names = "default"; 133ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_pps>; 134ef484dfcSTim Harvey gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; 135ef484dfcSTim Harvey status = "okay"; 136ef484dfcSTim Harvey }; 137ef484dfcSTim Harvey 138ef484dfcSTim Harvey reg_3p3v: regulator-3p3v { 139ef484dfcSTim Harvey compatible = "regulator-fixed"; 140ef484dfcSTim Harvey regulator-name = "3P3V"; 141ef484dfcSTim Harvey regulator-min-microvolt = <3300000>; 142ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 143ef484dfcSTim Harvey regulator-always-on; 144ef484dfcSTim Harvey }; 145ef484dfcSTim Harvey 146ef484dfcSTim Harvey reg_usb1_vbus: regulator-usb1 { 147ef484dfcSTim Harvey compatible = "regulator-fixed"; 148ef484dfcSTim Harvey pinctrl-names = "default"; 149ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_reg_usb1>; 150ef484dfcSTim Harvey regulator-name = "usb_usb1_vbus"; 151ef484dfcSTim Harvey gpio = <&gpio2 7 GPIO_ACTIVE_HIGH>; 152ef484dfcSTim Harvey enable-active-high; 153ef484dfcSTim Harvey regulator-min-microvolt = <5000000>; 154ef484dfcSTim Harvey regulator-max-microvolt = <5000000>; 155ef484dfcSTim Harvey }; 156ef484dfcSTim Harvey 157ef484dfcSTim Harvey reg_wifi: regulator-wifi { 158ef484dfcSTim Harvey compatible = "regulator-fixed"; 159ef484dfcSTim Harvey pinctrl-names = "default"; 160ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_reg_wl>; 161ef484dfcSTim Harvey regulator-name = "wifi"; 162ef484dfcSTim Harvey gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; 163ef484dfcSTim Harvey enable-active-high; 164ef484dfcSTim Harvey startup-delay-us = <100>; 165ef484dfcSTim Harvey regulator-min-microvolt = <3300000>; 166ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 167ef484dfcSTim Harvey }; 168ef484dfcSTim Harvey}; 169ef484dfcSTim Harvey 170ef484dfcSTim Harvey&A53_0 { 171ef484dfcSTim Harvey cpu-supply = <&buck2>; 172ef484dfcSTim Harvey}; 173ef484dfcSTim Harvey 174ef484dfcSTim Harvey&A53_1 { 175ef484dfcSTim Harvey cpu-supply = <&buck2>; 176ef484dfcSTim Harvey}; 177ef484dfcSTim Harvey 178ef484dfcSTim Harvey&A53_2 { 179ef484dfcSTim Harvey cpu-supply = <&buck2>; 180ef484dfcSTim Harvey}; 181ef484dfcSTim Harvey 182ef484dfcSTim Harvey&A53_3 { 183ef484dfcSTim Harvey cpu-supply = <&buck2>; 184ef484dfcSTim Harvey}; 185ef484dfcSTim Harvey 186ef484dfcSTim Harvey&ddrc { 187ef484dfcSTim Harvey operating-points-v2 = <&ddrc_opp_table>; 188ef484dfcSTim Harvey 189ef484dfcSTim Harvey ddrc_opp_table: opp-table { 190ef484dfcSTim Harvey compatible = "operating-points-v2"; 191ef484dfcSTim Harvey 1920c068a36SMarek Vasut opp-25000000 { 193ef484dfcSTim Harvey opp-hz = /bits/ 64 <25000000>; 194ef484dfcSTim Harvey }; 195ef484dfcSTim Harvey 1960c068a36SMarek Vasut opp-100000000 { 197ef484dfcSTim Harvey opp-hz = /bits/ 64 <100000000>; 198ef484dfcSTim Harvey }; 199ef484dfcSTim Harvey 2000c068a36SMarek Vasut opp-750000000 { 201ef484dfcSTim Harvey opp-hz = /bits/ 64 <750000000>; 202ef484dfcSTim Harvey }; 203ef484dfcSTim Harvey }; 204ef484dfcSTim Harvey}; 205ef484dfcSTim Harvey 206ef484dfcSTim Harvey&ecspi1 { 207ef484dfcSTim Harvey pinctrl-names = "default"; 208ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_spi1>; 209ef484dfcSTim Harvey cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; 210ef484dfcSTim Harvey status = "okay"; 211ef484dfcSTim Harvey 212ef484dfcSTim Harvey can@0 { 213ef484dfcSTim Harvey compatible = "microchip,mcp2515"; 214ef484dfcSTim Harvey reg = <0>; 215ef484dfcSTim Harvey clocks = <&can20m>; 216ef484dfcSTim Harvey interrupt-parent = <&gpio2>; 217ef484dfcSTim Harvey interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 218ef484dfcSTim Harvey spi-max-frequency = <10000000>; 219ef484dfcSTim Harvey }; 220ef484dfcSTim Harvey}; 221ef484dfcSTim Harvey 2228cd449d7STim Harvey&disp_blk_ctrl { 2238cd449d7STim Harvey status = "disabled"; 2248cd449d7STim Harvey}; 2258cd449d7STim Harvey 226ef484dfcSTim Harvey/* off-board header */ 227ef484dfcSTim Harvey&ecspi2 { 228ef484dfcSTim Harvey pinctrl-names = "default"; 229ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_spi2>; 230ef484dfcSTim Harvey cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; 231ef484dfcSTim Harvey status = "okay"; 232ef484dfcSTim Harvey}; 233ef484dfcSTim Harvey 234ef484dfcSTim Harvey&fec1 { 235ef484dfcSTim Harvey pinctrl-names = "default"; 236ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_fec1>; 237ef484dfcSTim Harvey phy-mode = "rgmii-id"; 238ef484dfcSTim Harvey phy-handle = <ðphy0>; 239ef484dfcSTim Harvey local-mac-address = [00 00 00 00 00 00]; 240ef484dfcSTim Harvey status = "okay"; 241ef484dfcSTim Harvey 242ef484dfcSTim Harvey mdio { 243ef484dfcSTim Harvey #address-cells = <1>; 244ef484dfcSTim Harvey #size-cells = <0>; 245ef484dfcSTim Harvey 246ef484dfcSTim Harvey ethphy0: ethernet-phy@0 { 247ef484dfcSTim Harvey compatible = "ethernet-phy-ieee802.3-c22"; 248ef484dfcSTim Harvey reg = <0>; 249ef484dfcSTim Harvey ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 250ef484dfcSTim Harvey ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 251ef484dfcSTim Harvey tx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 252ef484dfcSTim Harvey rx-fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 253ef484dfcSTim Harvey }; 254ef484dfcSTim Harvey }; 255ef484dfcSTim Harvey}; 256ef484dfcSTim Harvey 2579d46d9f7STim Harvey&gpio1 { 2589d46d9f7STim Harvey gpio-line-names = "", "", "", "", "", "", "", "", 259e59418a4STim Harvey "m2_pwr_en", "", "", "", "", "m2_reset", "", "m2_wdis#", 2609d46d9f7STim Harvey "", "", "", "", "", "", "", "", 2619d46d9f7STim Harvey "", "", "", "", "", "", "", ""; 2629d46d9f7STim Harvey}; 2639d46d9f7STim Harvey 2649d46d9f7STim Harvey&gpio2 { 2659d46d9f7STim Harvey gpio-line-names = "", "", "", "", "", "", "", "", 2669d46d9f7STim Harvey "uart2_en#", "", "", "", "", "", "", "", 2679d46d9f7STim Harvey "", "", "", "", "", "", "", "", 2689d46d9f7STim Harvey "", "", "", "", "", "", "", ""; 2699d46d9f7STim Harvey}; 2709d46d9f7STim Harvey 2719d46d9f7STim Harvey&gpio3 { 2729d46d9f7STim Harvey gpio-line-names = "", "m2_gdis#", "", "", "", "", "", "m2_off#", 2739d46d9f7STim Harvey "", "", "", "", "", "", "", "", 2749d46d9f7STim Harvey "", "", "", "", "", "", "", "", 2759d46d9f7STim Harvey "", "", "", "", "", "", "", ""; 2769d46d9f7STim Harvey}; 2779d46d9f7STim Harvey 2789d46d9f7STim Harvey&gpio4 { 2799d46d9f7STim Harvey gpio-line-names = "", "", "", "", "", "", "", "", 2809d46d9f7STim Harvey "", "", "", "", "", "", "", "", 281e59418a4STim Harvey "", "", "", "", "", "app_gpio1", "vdd_4p0_en", "uart1_rs485", 2829d46d9f7STim Harvey "", "uart1_term", "uart1_half", "app_gpio2", 2839d46d9f7STim Harvey "mipi_gpio1", "", "", ""; 2849d46d9f7STim Harvey}; 2859d46d9f7STim Harvey 2869d46d9f7STim Harvey&gpio5 { 2879d46d9f7STim Harvey gpio-line-names = "", "", "", "mipi_gpio4", 2889d46d9f7STim Harvey "mipi_gpio3", "mipi_gpio2", "", "", 2899d46d9f7STim Harvey "", "", "", "", "", "", "", "", 2909d46d9f7STim Harvey "", "", "", "", "", "", "", "", 2919d46d9f7STim Harvey "", "", "", "", "", "", "", ""; 2929d46d9f7STim Harvey}; 2939d46d9f7STim Harvey 2948cd449d7STim Harvey&gpu { 2958cd449d7STim Harvey status = "disabled"; 2968cd449d7STim Harvey}; 2978cd449d7STim Harvey 298ef484dfcSTim Harvey&i2c1 { 299ef484dfcSTim Harvey clock-frequency = <100000>; 30019d0fc9eSTim Harvey pinctrl-names = "default", "gpio"; 301ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c1>; 30219d0fc9eSTim Harvey pinctrl-1 = <&pinctrl_i2c1_gpio>; 30319d0fc9eSTim Harvey scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 30419d0fc9eSTim Harvey sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 305ef484dfcSTim Harvey status = "okay"; 306ef484dfcSTim Harvey 307ef484dfcSTim Harvey gsc: gsc@20 { 308ef484dfcSTim Harvey compatible = "gw,gsc"; 309ef484dfcSTim Harvey reg = <0x20>; 310ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_gsc>; 311ef484dfcSTim Harvey interrupt-parent = <&gpio2>; 312ef484dfcSTim Harvey interrupts = <6 IRQ_TYPE_EDGE_FALLING>; 313ef484dfcSTim Harvey interrupt-controller; 314ef484dfcSTim Harvey #interrupt-cells = <1>; 315ef484dfcSTim Harvey 316ef484dfcSTim Harvey adc { 317ef484dfcSTim Harvey compatible = "gw,gsc-adc"; 318ef484dfcSTim Harvey #address-cells = <1>; 319ef484dfcSTim Harvey #size-cells = <0>; 320ef484dfcSTim Harvey 321ef484dfcSTim Harvey channel@6 { 322ef484dfcSTim Harvey gw,mode = <0>; 323ef484dfcSTim Harvey reg = <0x06>; 324ef484dfcSTim Harvey label = "temp"; 325ef484dfcSTim Harvey }; 326ef484dfcSTim Harvey 327ef484dfcSTim Harvey channel@8 { 328c79d8096SNicolas Cavallari gw,mode = <3>; 329ef484dfcSTim Harvey reg = <0x08>; 330ef484dfcSTim Harvey label = "vdd_bat"; 331ef484dfcSTim Harvey }; 332ef484dfcSTim Harvey 333ef484dfcSTim Harvey channel@82 { 334ef484dfcSTim Harvey gw,mode = <2>; 335ef484dfcSTim Harvey reg = <0x82>; 336ef484dfcSTim Harvey label = "vin"; 337ef484dfcSTim Harvey gw,voltage-divider-ohms = <22100 1000>; 338ef484dfcSTim Harvey gw,voltage-offset-microvolt = <700000>; 339ef484dfcSTim Harvey }; 340ef484dfcSTim Harvey 341ef484dfcSTim Harvey channel@84 { 342ef484dfcSTim Harvey gw,mode = <2>; 343ef484dfcSTim Harvey reg = <0x84>; 344ef484dfcSTim Harvey label = "vin_4p0"; 345ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 346ef484dfcSTim Harvey }; 347ef484dfcSTim Harvey 348ef484dfcSTim Harvey channel@86 { 349ef484dfcSTim Harvey gw,mode = <2>; 350ef484dfcSTim Harvey reg = <0x86>; 351ef484dfcSTim Harvey label = "vdd_3p3"; 352ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 353ef484dfcSTim Harvey }; 354ef484dfcSTim Harvey 355ef484dfcSTim Harvey channel@88 { 356ef484dfcSTim Harvey gw,mode = <2>; 357ef484dfcSTim Harvey reg = <0x88>; 358ef484dfcSTim Harvey label = "vdd_0p9"; 359ef484dfcSTim Harvey }; 360ef484dfcSTim Harvey 361ef484dfcSTim Harvey channel@8c { 362ef484dfcSTim Harvey gw,mode = <2>; 363ef484dfcSTim Harvey reg = <0x8c>; 364ef484dfcSTim Harvey label = "vdd_soc"; 365ef484dfcSTim Harvey }; 366ef484dfcSTim Harvey 367ef484dfcSTim Harvey channel@8e { 368ef484dfcSTim Harvey gw,mode = <2>; 369ef484dfcSTim Harvey reg = <0x8e>; 370ef484dfcSTim Harvey label = "vdd_arm"; 371ef484dfcSTim Harvey }; 372ef484dfcSTim Harvey 373ef484dfcSTim Harvey channel@90 { 374ef484dfcSTim Harvey gw,mode = <2>; 375ef484dfcSTim Harvey reg = <0x90>; 376ef484dfcSTim Harvey label = "vdd_1p8"; 377ef484dfcSTim Harvey }; 378ef484dfcSTim Harvey 379ef484dfcSTim Harvey channel@92 { 380ef484dfcSTim Harvey gw,mode = <2>; 381ef484dfcSTim Harvey reg = <0x92>; 382ef484dfcSTim Harvey label = "vdd_dram"; 383ef484dfcSTim Harvey }; 384ef484dfcSTim Harvey 385ef484dfcSTim Harvey channel@98 { 386ef484dfcSTim Harvey gw,mode = <2>; 387ef484dfcSTim Harvey reg = <0x98>; 388ef484dfcSTim Harvey label = "vdd_1p0"; 389ef484dfcSTim Harvey }; 390ef484dfcSTim Harvey 391ef484dfcSTim Harvey channel@9a { 392ef484dfcSTim Harvey gw,mode = <2>; 393ef484dfcSTim Harvey reg = <0x9a>; 394ef484dfcSTim Harvey label = "vdd_2p5"; 395ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 396ef484dfcSTim Harvey }; 397ef484dfcSTim Harvey 398dd6fa860STim Harvey channel@9c { 399dd6fa860STim Harvey gw,mode = <2>; 400dd6fa860STim Harvey reg = <0x9c>; 401dd6fa860STim Harvey label = "vdd_5p0"; 402dd6fa860STim Harvey gw,voltage-divider-ohms = <10000 10000>; 403dd6fa860STim Harvey }; 404dd6fa860STim Harvey 405ef484dfcSTim Harvey channel@a2 { 406ef484dfcSTim Harvey gw,mode = <2>; 407ef484dfcSTim Harvey reg = <0xa2>; 408ef484dfcSTim Harvey label = "vdd_gsc"; 409ef484dfcSTim Harvey gw,voltage-divider-ohms = <10000 10000>; 410ef484dfcSTim Harvey }; 411ef484dfcSTim Harvey }; 412ef484dfcSTim Harvey }; 413ef484dfcSTim Harvey 414ef484dfcSTim Harvey gpio: gpio@23 { 415ef484dfcSTim Harvey compatible = "nxp,pca9555"; 416ef484dfcSTim Harvey reg = <0x23>; 417ef484dfcSTim Harvey gpio-controller; 418ef484dfcSTim Harvey #gpio-cells = <2>; 419ef484dfcSTim Harvey interrupt-parent = <&gsc>; 420ef484dfcSTim Harvey interrupts = <4>; 421ef484dfcSTim Harvey }; 422ef484dfcSTim Harvey 423ef484dfcSTim Harvey pmic@4b { 424ef484dfcSTim Harvey compatible = "rohm,bd71847"; 425ef484dfcSTim Harvey reg = <0x4b>; 426ef484dfcSTim Harvey pinctrl-names = "default"; 427ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_pmic>; 428ef484dfcSTim Harvey interrupt-parent = <&gpio3>; 429ef484dfcSTim Harvey interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 430ef484dfcSTim Harvey rohm,reset-snvs-powered; 431ef484dfcSTim Harvey #clock-cells = <0>; 432ebb8dbecSFabio Estevam clocks = <&osc_32k>; 433ef484dfcSTim Harvey clock-output-names = "clk-32k-out"; 434ef484dfcSTim Harvey 435ef484dfcSTim Harvey regulators { 436ef484dfcSTim Harvey /* vdd_soc: 0.805-0.900V (typ=0.8V) */ 437ef484dfcSTim Harvey BUCK1 { 438ef484dfcSTim Harvey regulator-name = "buck1"; 439ef484dfcSTim Harvey regulator-min-microvolt = <700000>; 440ef484dfcSTim Harvey regulator-max-microvolt = <1300000>; 441ef484dfcSTim Harvey regulator-boot-on; 442ef484dfcSTim Harvey regulator-always-on; 443ef484dfcSTim Harvey regulator-ramp-delay = <1250>; 444ef484dfcSTim Harvey }; 445ef484dfcSTim Harvey 446ef484dfcSTim Harvey /* vdd_arm: 0.805-1.0V (typ=0.9V) */ 447ef484dfcSTim Harvey buck2: BUCK2 { 448ef484dfcSTim Harvey regulator-name = "buck2"; 449ef484dfcSTim Harvey regulator-min-microvolt = <700000>; 450ef484dfcSTim Harvey regulator-max-microvolt = <1300000>; 451ef484dfcSTim Harvey regulator-boot-on; 452ef484dfcSTim Harvey regulator-always-on; 453ef484dfcSTim Harvey regulator-ramp-delay = <1250>; 454ef484dfcSTim Harvey rohm,dvs-run-voltage = <1000000>; 455ef484dfcSTim Harvey rohm,dvs-idle-voltage = <900000>; 456ef484dfcSTim Harvey }; 457ef484dfcSTim Harvey 458ef484dfcSTim Harvey /* vdd_0p9: 0.805-1.0V (typ=0.9V) */ 459ef484dfcSTim Harvey BUCK3 { 460ef484dfcSTim Harvey regulator-name = "buck3"; 461ef484dfcSTim Harvey regulator-min-microvolt = <700000>; 462ef484dfcSTim Harvey regulator-max-microvolt = <1350000>; 463ef484dfcSTim Harvey regulator-boot-on; 464ef484dfcSTim Harvey regulator-always-on; 465ef484dfcSTim Harvey }; 466ef484dfcSTim Harvey 467ef484dfcSTim Harvey /* vdd_3p3 */ 468ef484dfcSTim Harvey BUCK4 { 469ef484dfcSTim Harvey regulator-name = "buck4"; 470ef484dfcSTim Harvey regulator-min-microvolt = <3000000>; 471ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 472ef484dfcSTim Harvey regulator-boot-on; 473ef484dfcSTim Harvey regulator-always-on; 474ef484dfcSTim Harvey }; 475ef484dfcSTim Harvey 476ef484dfcSTim Harvey /* vdd_1p8 */ 477ef484dfcSTim Harvey BUCK5 { 478ef484dfcSTim Harvey regulator-name = "buck5"; 479ef484dfcSTim Harvey regulator-min-microvolt = <1605000>; 480ef484dfcSTim Harvey regulator-max-microvolt = <1995000>; 481ef484dfcSTim Harvey regulator-boot-on; 482ef484dfcSTim Harvey regulator-always-on; 483ef484dfcSTim Harvey }; 484ef484dfcSTim Harvey 485ef484dfcSTim Harvey /* vdd_dram */ 486ef484dfcSTim Harvey BUCK6 { 487ef484dfcSTim Harvey regulator-name = "buck6"; 488ef484dfcSTim Harvey regulator-min-microvolt = <800000>; 489ef484dfcSTim Harvey regulator-max-microvolt = <1400000>; 490ef484dfcSTim Harvey regulator-boot-on; 491ef484dfcSTim Harvey regulator-always-on; 492ef484dfcSTim Harvey }; 493ef484dfcSTim Harvey 494ef484dfcSTim Harvey /* nvcc_snvs_1p8 */ 495ef484dfcSTim Harvey LDO1 { 496ef484dfcSTim Harvey regulator-name = "ldo1"; 497ef484dfcSTim Harvey regulator-min-microvolt = <1600000>; 498ef484dfcSTim Harvey regulator-max-microvolt = <1900000>; 499ef484dfcSTim Harvey regulator-boot-on; 500ef484dfcSTim Harvey regulator-always-on; 501ef484dfcSTim Harvey }; 502ef484dfcSTim Harvey 503ef484dfcSTim Harvey /* vdd_snvs_0p8 */ 504ef484dfcSTim Harvey LDO2 { 505ef484dfcSTim Harvey regulator-name = "ldo2"; 506ef484dfcSTim Harvey regulator-min-microvolt = <800000>; 507ef484dfcSTim Harvey regulator-max-microvolt = <900000>; 508ef484dfcSTim Harvey regulator-boot-on; 509ef484dfcSTim Harvey regulator-always-on; 510ef484dfcSTim Harvey }; 511ef484dfcSTim Harvey 512ef484dfcSTim Harvey /* vdda_1p8 */ 513ef484dfcSTim Harvey LDO3 { 514ef484dfcSTim Harvey regulator-name = "ldo3"; 515ef484dfcSTim Harvey regulator-min-microvolt = <1800000>; 516ef484dfcSTim Harvey regulator-max-microvolt = <3300000>; 517ef484dfcSTim Harvey regulator-boot-on; 518ef484dfcSTim Harvey regulator-always-on; 519ef484dfcSTim Harvey }; 520ef484dfcSTim Harvey 521ef484dfcSTim Harvey LDO4 { 522ef484dfcSTim Harvey regulator-name = "ldo4"; 523ef484dfcSTim Harvey regulator-min-microvolt = <900000>; 524ef484dfcSTim Harvey regulator-max-microvolt = <1800000>; 525ef484dfcSTim Harvey regulator-boot-on; 526ef484dfcSTim Harvey regulator-always-on; 527ef484dfcSTim Harvey }; 528ef484dfcSTim Harvey 529ef484dfcSTim Harvey LDO6 { 530ef484dfcSTim Harvey regulator-name = "ldo6"; 531ef484dfcSTim Harvey regulator-min-microvolt = <900000>; 532ef484dfcSTim Harvey regulator-max-microvolt = <1800000>; 533ef484dfcSTim Harvey regulator-boot-on; 534ef484dfcSTim Harvey regulator-always-on; 535ef484dfcSTim Harvey }; 536ef484dfcSTim Harvey }; 537ef484dfcSTim Harvey }; 538ef484dfcSTim Harvey 539ef484dfcSTim Harvey eeprom@50 { 540ef484dfcSTim Harvey compatible = "atmel,24c02"; 541ef484dfcSTim Harvey reg = <0x50>; 542ef484dfcSTim Harvey pagesize = <16>; 543ef484dfcSTim Harvey }; 544ef484dfcSTim Harvey 545ef484dfcSTim Harvey eeprom@51 { 546ef484dfcSTim Harvey compatible = "atmel,24c02"; 547ef484dfcSTim Harvey reg = <0x51>; 548ef484dfcSTim Harvey pagesize = <16>; 549ef484dfcSTim Harvey }; 550ef484dfcSTim Harvey 551ef484dfcSTim Harvey eeprom@52 { 552ef484dfcSTim Harvey compatible = "atmel,24c02"; 553ef484dfcSTim Harvey reg = <0x52>; 554ef484dfcSTim Harvey pagesize = <16>; 555ef484dfcSTim Harvey }; 556ef484dfcSTim Harvey 557ef484dfcSTim Harvey eeprom@53 { 558ef484dfcSTim Harvey compatible = "atmel,24c02"; 559ef484dfcSTim Harvey reg = <0x53>; 560ef484dfcSTim Harvey pagesize = <16>; 561ef484dfcSTim Harvey }; 562ef484dfcSTim Harvey 563ef484dfcSTim Harvey rtc@68 { 564ef484dfcSTim Harvey compatible = "dallas,ds1672"; 565ef484dfcSTim Harvey reg = <0x68>; 566ef484dfcSTim Harvey }; 567ef484dfcSTim Harvey}; 568ef484dfcSTim Harvey 569ef484dfcSTim Harvey&i2c2 { 570ef484dfcSTim Harvey clock-frequency = <400000>; 57119d0fc9eSTim Harvey pinctrl-names = "default", "gpio"; 572ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c2>; 57319d0fc9eSTim Harvey pinctrl-1 = <&pinctrl_i2c2_gpio>; 57419d0fc9eSTim Harvey scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 57519d0fc9eSTim Harvey sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 576ef484dfcSTim Harvey status = "okay"; 577ef484dfcSTim Harvey 578ef484dfcSTim Harvey accelerometer@19 { 579ef484dfcSTim Harvey compatible = "st,lis2de12"; 580ef484dfcSTim Harvey pinctrl-names = "default"; 581ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_accel>; 582ef484dfcSTim Harvey reg = <0x19>; 583ef484dfcSTim Harvey st,drdy-int-pin = <1>; 584ef484dfcSTim Harvey interrupt-parent = <&gpio1>; 585ef484dfcSTim Harvey interrupts = <12 IRQ_TYPE_LEVEL_LOW>; 586ef484dfcSTim Harvey interrupt-names = "INT1"; 587ef484dfcSTim Harvey }; 588ef484dfcSTim Harvey}; 589ef484dfcSTim Harvey 590ef484dfcSTim Harvey/* off-board header */ 591ef484dfcSTim Harvey&i2c3 { 592ef484dfcSTim Harvey clock-frequency = <400000>; 59319d0fc9eSTim Harvey pinctrl-names = "default", "gpio"; 594ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c3>; 59519d0fc9eSTim Harvey pinctrl-1 = <&pinctrl_i2c3_gpio>; 59619d0fc9eSTim Harvey scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 59719d0fc9eSTim Harvey sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 598ef484dfcSTim Harvey status = "okay"; 599ef484dfcSTim Harvey}; 600ef484dfcSTim Harvey 601ef484dfcSTim Harvey/* off-board header */ 602ef484dfcSTim Harvey&i2c4 { 603ef484dfcSTim Harvey clock-frequency = <400000>; 60419d0fc9eSTim Harvey pinctrl-names = "default", "gpio"; 605ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_i2c4>; 60619d0fc9eSTim Harvey pinctrl-1 = <&pinctrl_i2c4_gpio>; 60719d0fc9eSTim Harvey scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 60819d0fc9eSTim Harvey sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 609ef484dfcSTim Harvey status = "okay"; 610ef484dfcSTim Harvey}; 611ef484dfcSTim Harvey 6128cd449d7STim Harvey&pgc_gpumix { 6138cd449d7STim Harvey status = "disabled"; 6148cd449d7STim Harvey}; 6158cd449d7STim Harvey 616ef484dfcSTim Harvey/* off-board header */ 617ef484dfcSTim Harvey&sai3 { 618ef484dfcSTim Harvey pinctrl-names = "default"; 619ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_sai3>; 620ef484dfcSTim Harvey assigned-clocks = <&clk IMX8MN_CLK_SAI3>; 621ef484dfcSTim Harvey assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>; 622ef484dfcSTim Harvey assigned-clock-rates = <24576000>; 623ef484dfcSTim Harvey status = "okay"; 624ef484dfcSTim Harvey}; 625ef484dfcSTim Harvey 626ef484dfcSTim Harvey/* RS232/RS485/RS422 selectable */ 627ef484dfcSTim Harvey&uart1 { 628ef484dfcSTim Harvey pinctrl-names = "default"; 629ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart1>, <&pinctrl_uart1_gpio>; 630ef484dfcSTim Harvey status = "okay"; 631ef484dfcSTim Harvey}; 632ef484dfcSTim Harvey 633ef484dfcSTim Harvey/* RS232 console */ 634ef484dfcSTim Harvey&uart2 { 635ef484dfcSTim Harvey pinctrl-names = "default"; 636ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart2>; 637ef484dfcSTim Harvey status = "okay"; 638ef484dfcSTim Harvey}; 639ef484dfcSTim Harvey 640ef484dfcSTim Harvey/* bluetooth HCI */ 641ef484dfcSTim Harvey&uart3 { 642ef484dfcSTim Harvey pinctrl-names = "default"; 643ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_uart3_gpio>; 644ef484dfcSTim Harvey rts-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; 645ef484dfcSTim Harvey cts-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; 646ef484dfcSTim Harvey status = "okay"; 647ef484dfcSTim Harvey 648ef484dfcSTim Harvey bluetooth { 649ef484dfcSTim Harvey compatible = "brcm,bcm4330-bt"; 650ef484dfcSTim Harvey shutdown-gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>; 651ef484dfcSTim Harvey }; 652ef484dfcSTim Harvey}; 653ef484dfcSTim Harvey 654ef484dfcSTim Harvey/* LTE Cat M1/NB1/EGPRS modem or GPS (loading option) */ 655ef484dfcSTim Harvey&uart4 { 656ef484dfcSTim Harvey pinctrl-names = "default"; 657ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_uart4>; 658ef484dfcSTim Harvey status = "okay"; 659ef484dfcSTim Harvey}; 660ef484dfcSTim Harvey 661ef484dfcSTim Harvey&usbotg1 { 662ef484dfcSTim Harvey dr_mode = "host"; 663ef484dfcSTim Harvey vbus-supply = <®_usb1_vbus>; 664ef484dfcSTim Harvey disable-over-current; 665ef484dfcSTim Harvey status = "okay"; 666ef484dfcSTim Harvey}; 667ef484dfcSTim Harvey 668ef484dfcSTim Harvey/* SDIO WiFi */ 669ef484dfcSTim Harvey&usdhc2 { 670efdb4d23STim Harvey pinctrl-names = "default", "state_100mhz", "state_200mhz"; 671ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_usdhc2>; 672efdb4d23STim Harvey pinctrl-1 = <&pinctrl_usdhc2_100mhz>; 673efdb4d23STim Harvey pinctrl-2 = <&pinctrl_usdhc2_200mhz>; 674ef484dfcSTim Harvey bus-width = <4>; 675ef484dfcSTim Harvey non-removable; 676ef484dfcSTim Harvey vmmc-supply = <®_wifi>; 677efdb4d23STim Harvey #address-cells = <1>; 678efdb4d23STim Harvey #size-cells = <0>; 679ef484dfcSTim Harvey status = "okay"; 680efdb4d23STim Harvey 681efdb4d23STim Harvey wifi@0 { 682*e4f7fbf7SFabio Estevam compatible = "brcm,bcm43455-fmac", "brcm,bcm4329-fmac"; 683efdb4d23STim Harvey reg = <0>; 684efdb4d23STim Harvey }; 685ef484dfcSTim Harvey}; 686ef484dfcSTim Harvey 687ef484dfcSTim Harvey/* eMMC */ 688ef484dfcSTim Harvey&usdhc3 { 689ef484dfcSTim Harvey pinctrl-names = "default", "state_100mhz", "state_200mhz"; 690ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_usdhc3>; 691ef484dfcSTim Harvey pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 692ef484dfcSTim Harvey pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 693ef484dfcSTim Harvey bus-width = <8>; 694ef484dfcSTim Harvey non-removable; 695ef484dfcSTim Harvey status = "okay"; 696ef484dfcSTim Harvey}; 697ef484dfcSTim Harvey 698ef484dfcSTim Harvey&wdog1 { 699ef484dfcSTim Harvey pinctrl-names = "default"; 700ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_wdog>; 701ef484dfcSTim Harvey fsl,ext-reset-output; 702ef484dfcSTim Harvey status = "okay"; 703ef484dfcSTim Harvey}; 704ef484dfcSTim Harvey 705ef484dfcSTim Harvey&iomuxc { 706ef484dfcSTim Harvey pinctrl-names = "default"; 707ef484dfcSTim Harvey pinctrl-0 = <&pinctrl_hog>; 708ef484dfcSTim Harvey 709ef484dfcSTim Harvey pinctrl_hog: hoggrp { 710ef484dfcSTim Harvey fsl,pins = < 711ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x40000159 /* M2_GDIS# */ 712e59418a4STim Harvey MX8MN_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x40000041 /* M2_PWR_EN */ 7139d46d9f7STim Harvey MX8MN_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x40000041 /* M2_RESET */ 714ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA01_GPIO3_IO7 0x40000119 /* M2_OFF# */ 715ef484dfcSTim Harvey MX8MN_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x40000159 /* M2_WDIS# */ 716ef484dfcSTim Harvey MX8MN_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x40000041 /* APP GPIO1 */ 717e59418a4STim Harvey MX8MN_IOMUXC_SAI2_RXC_GPIO4_IO22 0x40000041 /* VDD_4P0_EN */ 718ef484dfcSTim Harvey MX8MN_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x40000041 /* APP GPIO2 */ 719ef484dfcSTim Harvey MX8MN_IOMUXC_SD1_DATA6_GPIO2_IO8 0x40000041 /* UART2_EN# */ 720ef484dfcSTim Harvey MX8MN_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x40000041 /* MIPI_GPIO1 */ 721ef484dfcSTim Harvey MX8MN_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x40000041 /* MIPI_GPIO2 */ 722ef484dfcSTim Harvey MX8MN_IOMUXC_SPDIF_RX_GPIO5_IO4 0x40000041 /* MIPI_GPIO3/PWM2 */ 723ef484dfcSTim Harvey MX8MN_IOMUXC_SPDIF_TX_GPIO5_IO3 0x40000041 /* MIPI_GPIO4/PWM3 */ 724ef484dfcSTim Harvey >; 725ef484dfcSTim Harvey }; 726ef484dfcSTim Harvey 727ef484dfcSTim Harvey pinctrl_accel: accelgrp { 728ef484dfcSTim Harvey fsl,pins = < 729ef484dfcSTim Harvey MX8MN_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x159 730ef484dfcSTim Harvey >; 731ef484dfcSTim Harvey }; 732ef484dfcSTim Harvey 733ef484dfcSTim Harvey pinctrl_fec1: fec1grp { 734ef484dfcSTim Harvey fsl,pins = < 735ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_MDC_ENET1_MDC 0x3 736ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 737ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f 738ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f 739ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f 740ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f 741ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 742ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 743ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 744ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 745ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f 746ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 747ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 748ef484dfcSTim Harvey MX8MN_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f 749ef484dfcSTim Harvey MX8MN_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19 /* RST# */ 750ef484dfcSTim Harvey MX8MN_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x19 /* IRQ# */ 751ef484dfcSTim Harvey >; 752ef484dfcSTim Harvey }; 753ef484dfcSTim Harvey 754ef484dfcSTim Harvey pinctrl_gsc: gscgrp { 755ef484dfcSTim Harvey fsl,pins = < 756ef484dfcSTim Harvey MX8MN_IOMUXC_SD1_DATA4_GPIO2_IO6 0x40 757ef484dfcSTim Harvey >; 758ef484dfcSTim Harvey }; 759ef484dfcSTim Harvey 760ef484dfcSTim Harvey pinctrl_i2c1: i2c1grp { 761ef484dfcSTim Harvey fsl,pins = < 762ef484dfcSTim Harvey MX8MN_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 763ef484dfcSTim Harvey MX8MN_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 764ef484dfcSTim Harvey >; 765ef484dfcSTim Harvey }; 766ef484dfcSTim Harvey 76719d0fc9eSTim Harvey pinctrl_i2c1_gpio: i2c1gpiogrp { 76819d0fc9eSTim Harvey fsl,pins = < 76919d0fc9eSTim Harvey MX8MN_IOMUXC_I2C1_SCL_GPIO5_IO14 0x400001c3 77019d0fc9eSTim Harvey MX8MN_IOMUXC_I2C1_SDA_GPIO5_IO15 0x400001c3 77119d0fc9eSTim Harvey >; 77219d0fc9eSTim Harvey }; 77319d0fc9eSTim Harvey 774ef484dfcSTim Harvey pinctrl_i2c2: i2c2grp { 775ef484dfcSTim Harvey fsl,pins = < 776ef484dfcSTim Harvey MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 777ef484dfcSTim Harvey MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 778ef484dfcSTim Harvey >; 779ef484dfcSTim Harvey }; 780ef484dfcSTim Harvey 78119d0fc9eSTim Harvey pinctrl_i2c2_gpio: i2c2gpiogrp { 78219d0fc9eSTim Harvey fsl,pins = < 78319d0fc9eSTim Harvey MX8MN_IOMUXC_I2C2_SCL_GPIO5_IO16 0x400001c3 78419d0fc9eSTim Harvey MX8MN_IOMUXC_I2C2_SDA_GPIO5_IO17 0x400001c3 78519d0fc9eSTim Harvey >; 78619d0fc9eSTim Harvey }; 78719d0fc9eSTim Harvey 788ef484dfcSTim Harvey pinctrl_i2c3: i2c3grp { 789ef484dfcSTim Harvey fsl,pins = < 790ef484dfcSTim Harvey MX8MN_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3 791ef484dfcSTim Harvey MX8MN_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 792ef484dfcSTim Harvey >; 793ef484dfcSTim Harvey }; 794ef484dfcSTim Harvey 79519d0fc9eSTim Harvey pinctrl_i2c3_gpio: i2c3gpiogrp { 79619d0fc9eSTim Harvey fsl,pins = < 79719d0fc9eSTim Harvey MX8MN_IOMUXC_I2C3_SCL_GPIO5_IO18 0x400001c3 79819d0fc9eSTim Harvey MX8MN_IOMUXC_I2C3_SDA_GPIO5_IO19 0x400001c3 79919d0fc9eSTim Harvey >; 80019d0fc9eSTim Harvey }; 80119d0fc9eSTim Harvey 802ef484dfcSTim Harvey pinctrl_i2c4: i2c4grp { 803ef484dfcSTim Harvey fsl,pins = < 804ef484dfcSTim Harvey MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 805ef484dfcSTim Harvey MX8MN_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 806ef484dfcSTim Harvey >; 807ef484dfcSTim Harvey }; 808ef484dfcSTim Harvey 80919d0fc9eSTim Harvey pinctrl_i2c4_gpio: i2c4gpiogrp { 81019d0fc9eSTim Harvey fsl,pins = < 81119d0fc9eSTim Harvey MX8MN_IOMUXC_I2C4_SCL_GPIO5_IO20 0x400001c3 81219d0fc9eSTim Harvey MX8MN_IOMUXC_I2C4_SDA_GPIO5_IO21 0x400001c3 81319d0fc9eSTim Harvey >; 81419d0fc9eSTim Harvey }; 81519d0fc9eSTim Harvey 816ef484dfcSTim Harvey pinctrl_gpio_leds: gpioledgrp { 817ef484dfcSTim Harvey fsl,pins = < 818ef484dfcSTim Harvey MX8MN_IOMUXC_SAI5_RXD0_GPIO3_IO21 0x19 819ef484dfcSTim Harvey MX8MN_IOMUXC_SAI5_RXD2_GPIO3_IO23 0x19 820ef484dfcSTim Harvey MX8MN_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x19 821ef484dfcSTim Harvey MX8MN_IOMUXC_SAI5_RXC_GPIO3_IO20 0x19 822ef484dfcSTim Harvey MX8MN_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x19 823ef484dfcSTim Harvey >; 824ef484dfcSTim Harvey }; 825ef484dfcSTim Harvey 826ef484dfcSTim Harvey pinctrl_pmic: pmicgrp { 827ef484dfcSTim Harvey fsl,pins = < 828ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA02_GPIO3_IO8 0x41 829ef484dfcSTim Harvey >; 830ef484dfcSTim Harvey }; 831ef484dfcSTim Harvey 832ef484dfcSTim Harvey pinctrl_pps: ppsgrp { 833ef484dfcSTim Harvey fsl,pins = < 834ef484dfcSTim Harvey MX8MN_IOMUXC_SAI5_RXD3_GPIO3_IO24 0x141 /* PPS */ 835ef484dfcSTim Harvey >; 836ef484dfcSTim Harvey }; 837ef484dfcSTim Harvey 838ef484dfcSTim Harvey pinctrl_reg_wl: regwlgrp { 839ef484dfcSTim Harvey fsl,pins = < 840ef484dfcSTim Harvey MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 /* WLAN_WLON */ 841ef484dfcSTim Harvey >; 842ef484dfcSTim Harvey }; 843ef484dfcSTim Harvey 844ef484dfcSTim Harvey pinctrl_reg_usb1: regusb1grp { 845ef484dfcSTim Harvey fsl,pins = < 846ef484dfcSTim Harvey MX8MN_IOMUXC_SD1_DATA5_GPIO2_IO7 0x41 847ef484dfcSTim Harvey >; 848ef484dfcSTim Harvey }; 849ef484dfcSTim Harvey 850ef484dfcSTim Harvey pinctrl_sai3: sai3grp { 851ef484dfcSTim Harvey fsl,pins = < 852ef484dfcSTim Harvey MX8MN_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6 853ef484dfcSTim Harvey MX8MN_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6 854ef484dfcSTim Harvey MX8MN_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6 855ef484dfcSTim Harvey MX8MN_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6 856ef484dfcSTim Harvey MX8MN_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6 857ef484dfcSTim Harvey >; 858ef484dfcSTim Harvey }; 859ef484dfcSTim Harvey 860ef484dfcSTim Harvey pinctrl_spi1: spi1grp { 861ef484dfcSTim Harvey fsl,pins = < 862ef484dfcSTim Harvey MX8MN_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x82 863ef484dfcSTim Harvey MX8MN_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82 864ef484dfcSTim Harvey MX8MN_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x82 865ef484dfcSTim Harvey MX8MN_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x40 866ef484dfcSTim Harvey MX8MN_IOMUXC_SD1_DATA1_GPIO2_IO3 0x140 /* CAN_IRQ# */ 867ef484dfcSTim Harvey >; 868ef484dfcSTim Harvey }; 869ef484dfcSTim Harvey 870ef484dfcSTim Harvey pinctrl_spi2: spi2grp { 871ef484dfcSTim Harvey fsl,pins = < 872ef484dfcSTim Harvey MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82 873ef484dfcSTim Harvey MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82 874ef484dfcSTim Harvey MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82 875ef484dfcSTim Harvey MX8MN_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x40 /* SS0 */ 876ef484dfcSTim Harvey >; 877ef484dfcSTim Harvey }; 878ef484dfcSTim Harvey 879ef484dfcSTim Harvey pinctrl_uart1: uart1grp { 880ef484dfcSTim Harvey fsl,pins = < 881ef484dfcSTim Harvey MX8MN_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140 882ef484dfcSTim Harvey MX8MN_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140 883ef484dfcSTim Harvey >; 884ef484dfcSTim Harvey }; 885ef484dfcSTim Harvey 886ef484dfcSTim Harvey pinctrl_uart1_gpio: uart1gpiogrp { 887ef484dfcSTim Harvey fsl,pins = < 888ef484dfcSTim Harvey MX8MN_IOMUXC_SAI2_TXD0_GPIO4_IO26 0x40000110 /* HALF */ 889ef484dfcSTim Harvey MX8MN_IOMUXC_SAI2_TXC_GPIO4_IO25 0x40000110 /* TERM */ 890ef484dfcSTim Harvey MX8MN_IOMUXC_SAI2_RXD0_GPIO4_IO23 0x40000110 /* RS485 */ 891ef484dfcSTim Harvey >; 892ef484dfcSTim Harvey }; 893ef484dfcSTim Harvey 894ef484dfcSTim Harvey pinctrl_uart2: uart2grp { 895ef484dfcSTim Harvey fsl,pins = < 896ef484dfcSTim Harvey MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 897ef484dfcSTim Harvey MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 898ef484dfcSTim Harvey >; 899ef484dfcSTim Harvey }; 900ef484dfcSTim Harvey 901ef484dfcSTim Harvey pinctrl_uart3_gpio: uart3_gpiogrp { 902ef484dfcSTim Harvey fsl,pins = < 903ef484dfcSTim Harvey MX8MN_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41 /* BT_EN# */ 904ef484dfcSTim Harvey >; 905ef484dfcSTim Harvey }; 906ef484dfcSTim Harvey 907ef484dfcSTim Harvey pinctrl_uart3: uart3grp { 908ef484dfcSTim Harvey fsl,pins = < 909ef484dfcSTim Harvey MX8MN_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140 910ef484dfcSTim Harvey MX8MN_IOMUXC_UART3_TXD_UART3_DCE_TX 0x140 911ef484dfcSTim Harvey MX8MN_IOMUXC_SD1_CLK_GPIO2_IO0 0x140 /* CTS */ 912ef484dfcSTim Harvey MX8MN_IOMUXC_SD1_CMD_GPIO2_IO1 0x140 /* RTS */ 913ef484dfcSTim Harvey >; 914ef484dfcSTim Harvey }; 915ef484dfcSTim Harvey 916ef484dfcSTim Harvey pinctrl_uart4: uart4grp { 917ef484dfcSTim Harvey fsl,pins = < 918ef484dfcSTim Harvey MX8MN_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140 919ef484dfcSTim Harvey MX8MN_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140 920ef484dfcSTim Harvey MX8MN_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x141 /* GNSS_GASP */ 921ef484dfcSTim Harvey >; 922ef484dfcSTim Harvey }; 923ef484dfcSTim Harvey 924ef484dfcSTim Harvey pinctrl_usdhc2: usdhc2grp { 925ef484dfcSTim Harvey fsl,pins = < 926ef484dfcSTim Harvey MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 927ef484dfcSTim Harvey MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 928ef484dfcSTim Harvey MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 929ef484dfcSTim Harvey MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 930ef484dfcSTim Harvey MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 931ef484dfcSTim Harvey MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 932ef484dfcSTim Harvey >; 933ef484dfcSTim Harvey }; 934ef484dfcSTim Harvey 935efdb4d23STim Harvey pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { 936efdb4d23STim Harvey fsl,pins = < 937efdb4d23STim Harvey MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 938efdb4d23STim Harvey MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 939efdb4d23STim Harvey MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 940efdb4d23STim Harvey MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 941efdb4d23STim Harvey MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 942efdb4d23STim Harvey MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 943efdb4d23STim Harvey >; 944efdb4d23STim Harvey }; 945efdb4d23STim Harvey 946efdb4d23STim Harvey pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 947efdb4d23STim Harvey fsl,pins = < 948efdb4d23STim Harvey MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 949efdb4d23STim Harvey MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 950efdb4d23STim Harvey MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 951efdb4d23STim Harvey MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 952efdb4d23STim Harvey MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 953efdb4d23STim Harvey MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 954efdb4d23STim Harvey >; 955efdb4d23STim Harvey }; 956efdb4d23STim Harvey 957ef484dfcSTim Harvey pinctrl_usdhc3: usdhc3grp { 958ef484dfcSTim Harvey fsl,pins = < 959ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190 960ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 961ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 962ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 963ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 964ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 965ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 966ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 967ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 968ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 969ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 970ef484dfcSTim Harvey >; 971ef484dfcSTim Harvey }; 972ef484dfcSTim Harvey 973ef484dfcSTim Harvey pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { 974ef484dfcSTim Harvey fsl,pins = < 975ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194 976ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 977ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 978ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 979ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 980ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 981ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 982ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 983ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 984ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 985ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 986ef484dfcSTim Harvey >; 987ef484dfcSTim Harvey }; 988ef484dfcSTim Harvey 989ef484dfcSTim Harvey pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { 990ef484dfcSTim Harvey fsl,pins = < 991ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196 992ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 993ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 994ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 995ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 996ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 997ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 998ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 999ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 1000ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 1001ef484dfcSTim Harvey MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 1002ef484dfcSTim Harvey >; 1003ef484dfcSTim Harvey }; 1004ef484dfcSTim Harvey 1005ef484dfcSTim Harvey pinctrl_wdog: wdoggrp { 1006ef484dfcSTim Harvey fsl,pins = < 1007ef484dfcSTim Harvey MX8MN_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 1008ef484dfcSTim Harvey >; 1009ef484dfcSTim Harvey }; 1010ef484dfcSTim Harvey}; 1011