xref: /openbmc/linux/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x-rs485.dtso (revision 4c33cb31)

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright 2021 Gateworks Corporation
 *
 * GW73xx RS485 HD:
 *  - GPIO1_0 rs485_term selects on-chip termination
 *  - GPIO4_0 rs485_en needs to be driven high (active)
 *  - GPIO4_2 rs485_hd needs to be driven high (active)
 *  - UART4_TX is DE for RS485 transmitter
 *  - RS485_EN needs to be pulled high
 *  - RS485_HALF needs to be pulled high
 */

#include <dt-bindings/gpio/gpio.h>

#include "imx8mm-pinfunc.h"

/dts-v1/;
/plugin/;

&{/} {
	compatible = "gw,imx8mm-gw73xx-0x";
};

&gpio4 {
	rs485_en {
		gpio-hog;
		gpios = <0 GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "rs485_en";
	};

	rs485_hd {
		gpio-hog;
		gpios = <2 GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "rs485_hd";
	};
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	rts-gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
	linux,rs485-enabled-at-boot-time;
	status = "okay";
};

&uart4 {
	status = "disabled";
};

&iomuxc {
	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX     0x140
			MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX     0x140
			MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29	0x140
		>;
	};
};