|
Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44 |
|
| #
e4f7fbf7 |
| 06-Aug-2023 |
Fabio Estevam <festevam@denx.de> |
arm64: dts: imx8m-venice: Pass "brcm,bcm4329-fmac"
Pass "brcm,bcm4329-fmac" to fix the following schema warnings:
imx8mp-venice-gw74xx.dtb: wifi@0: compatible: 'oneOf' conditional failed, one must
arm64: dts: imx8m-venice: Pass "brcm,bcm4329-fmac"
Pass "brcm,bcm4329-fmac" to fix the following schema warnings:
imx8mp-venice-gw74xx.dtb: wifi@0: compatible: 'oneOf' conditional failed, one must be fixed:
['cypress,cyw4373-fmac'] is too short
'cypress,cyw4373-fmac' is not one of ['brcm,bcm4329-fmac', 'pci14e4,43dc', 'pci14e4,4464', 'pci14e4,4488', 'pci14e4,4425', 'pci14e4,4433']
from schema $id: http://devicetree.org/schemas/net/wireless/brcm,bcm4329-fmac.yaml#
imx8mn-venice-gw7902.dtb: wifi@0: compatible: 'oneOf' conditional failed, one must be fixed:
['brcm,bcm43455-fmac'] is too short
'brcm,bcm43455-fmac' is not one of ['brcm,bcm4329-fmac', 'pci14e4,43dc', 'pci14e4,4464', 'pci14e4,4488', 'pci14e4,4425', 'pci14e4,4433']
from schema $id: http://devicetree.org/schemas/net/wireless/brcm,bcm4329-fmac.yaml#
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
| #
ebb8dbec |
| 03-Aug-2023 |
Fabio Estevam <festevam@denx.de> |
arm64: dts: imx: Pass a single BD71847 clock entry
Pass a single BD71847 clock entry to fix the following schema
warning:
imx8mm-var-som-symphony.dtb: pmic@4b: clocks: [[22], [0]] is too long
from
arm64: dts: imx: Pass a single BD71847 clock entry
Pass a single BD71847 clock entry to fix the following schema
warning:
imx8mm-var-som-symphony.dtb: pmic@4b: clocks: [[22], [0]] is too long
from schema $id: http://devicetree.org/schemas/mfd/rohm,bd71847-pmic.yaml#
Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33 |
|
| #
18bbf7ac |
| 06-Jun-2023 |
Tim Harvey <tharvey@gateworks.com> |
arm64: dts: imx8mm-venice-gw7901: add SDR50/SDR104 SDIO support for wifi
The GW7901 has a Murata LBEE5H 802.11abgnac / BT5 module based on the
Cypress CYW43455 which supports SDR50/SDR104.
Add dt p
arm64: dts: imx8mm-venice-gw7901: add SDR50/SDR104 SDIO support for wifi
The GW7901 has a Murata LBEE5H 802.11abgnac / BT5 module based on the
Cypress CYW43455 which supports SDR50/SDR104.
Add dt pinctrl for the 100mhz and 200mhz states to support SDR50/SDR104.
While at it add the dt node for the CYW43455 wifi for the brcmfmac
driver.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
| #
9a8d30b9 |
| 06-Jun-2023 |
Tim Harvey <tharvey@gateworks.com> |
arm64: dts: imx8mm-venice-gw7901: add cpu-supply node for cpufreq
Add regulator config for cpu-supply in order to support cpufreq.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Pen
arm64: dts: imx8mm-venice-gw7901: add cpu-supply node for cpufreq
Add regulator config for cpu-supply in order to support cpufreq.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
| #
c79d8096 |
| 05-Jun-2023 |
Nicolas Cavallari <nicolas.cavallari@green-communications.fr> |
arm64: dts: imx8mm-venice: Fix GSC vdd_bat data size.
On these boards, vdd_bat is 16bit, not 24bit. Reading them as 24bit
values yield garbage values because of the additional byte, which is a
conf
arm64: dts: imx8mm-venice: Fix GSC vdd_bat data size.
On these boards, vdd_bat is 16bit, not 24bit. Reading them as 24bit
values yield garbage values because of the additional byte, which is a
configurable fan trippoint[1].
So set their mode to mode_voltage_16bit = 3 instead of
mode_voltage_24bit = 1.
[1]: http://trac.gateworks.com/wiki/gsc#SystemTemperatureandVoltageMonitor
Only tested on GW7100.
Signed-off-by: Nicolas Cavallari <nicolas.cavallari@green-communications.fr>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7 |
|
| #
3c033fb1 |
| 16-Jan-2023 |
Marek Vasut <marex@denx.de> |
arm64: dts: imx8mm: Deduplicate PCIe clock-names property
Move the PCIe clock-names property from various DTs into SoC dtsi to
reduce duplication. In case of a couple of boards, reorder the clock
so
arm64: dts: imx8mm: Deduplicate PCIe clock-names property
Move the PCIe clock-names property from various DTs into SoC dtsi to
reduce duplication. In case of a couple of boards, reorder the clock
so they match the order in yaml DT bindings.
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> # imx8mm.dtsi, imx8mm-tqma8mqml-mba8mx.dts
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17 |
|
| #
fca05389 |
| 02-Jan-2023 |
Fabio Estevam <festevam@denx.de> |
arm64: dts: imx8m-venice: Remove incorrect 'uart-has-rtscts'
The following build warnings are seen when running:
make dtbs_check DT_SCHEMA_FILES=fsl-imx-uart.yaml
arch/arm64/boot/dts/freescale/imx
arm64: dts: imx8m-venice: Remove incorrect 'uart-has-rtscts'
The following build warnings are seen when running:
make dtbs_check DT_SCHEMA_FILES=fsl-imx-uart.yaml
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dtb: serial@30860000: cts-gpios: False schema does not allow [[33, 3, 1]]
From schema: Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dtb: serial@30860000: rts-gpios: False schema does not allow [[33, 5, 1]]
From schema: Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml
...
The imx8m Venice Gateworks boards do not expose the UART RTS and CTS
as native UART pins, so 'uart-has-rtscts' should not be used.
Using 'uart-has-rtscts' with 'rts-gpios' is an invalid combination
detected by serial.yaml.
Fix the problem by removing the incorrect 'uart-has-rtscts' property.
Fixes: 27c8f4ccc1b9 ("arm64: dts: imx8mm-venice-gw72xx-0x: add dt overlays for serial modes")
Fixes: d9a9a7cf32c9 ("arm64: dts: imx8m{m,n}-venice-*: add missing uart-has-rtscts property to UARTs")
Fixes: 870f645b396b ("arm64: dts: imx8mp-venice-gw74xx: add WiFi/BT module support")
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v6.1.2, v6.0.16 |
|
| #
ae066f37 |
| 28-Dec-2022 |
Tim Harvey <tharvey@gateworks.com> |
arm64: dts: imx8mm-venice-gw7901: fix USB2 controller OC polarity
The GW7901 has USB2 routed to a USB VBUS supply with over-current
protection via an active-low pin. Define the OC pin polarity prope
arm64: dts: imx8mm-venice-gw7901: fix USB2 controller OC polarity
The GW7901 has USB2 routed to a USB VBUS supply with over-current
protection via an active-low pin. Define the OC pin polarity properly.
Fixes: 2b1649a83afc ("arm64: dts: imx: Add i.mx8mm Gateworks gw7901 dts support")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77 |
|
| #
0c068a36 |
| 02-Nov-2022 |
Marek Vasut <marex@denx.de> |
arm64: dts: imx8mm: imx8mn: imx8mp: imx8mq: Replace opp-xM with opp-x000000
Fix the following dtbs_check warning on all of i.MX8M variants:
"
opp-table: Unevaluated properties are not allowed ('opp-
arm64: dts: imx8mm: imx8mn: imx8mp: imx8mq: Replace opp-xM with opp-x000000
Fix the following dtbs_check warning on all of i.MX8M variants:
"
opp-table: Unevaluated properties are not allowed ('opp-25M', 'opp-100M', 'opp-750M' were unexpected)
"
Using the following command:
"
$ sed -i '/opp-[0-9]\+M/ s@M {@000000 {@' arch/arm64/boot/dts/freescale/imx8m*
"
The Documentation/devicetree/bindings/opp/opp-v2-base.yaml expects the OPP
subnode names to be full frequency listings in Hz without unit suffixes.
Only the i.MX8M DTs are affected per "git grep 'opp-[0-9]\+M'", so fix them.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70 |
|
| #
19d0fc9e |
| 21-Sep-2022 |
Tim Harvey <tharvey@gateworks.com> |
arm64: dts: imx8m*-venice: add I2C GPIO bus recovery support
Add I2C GPIO bus recovery support by adding scl-gpios and sda-gpios for the
various I2C busses on Gateworks Venice boards.
Signed-off-by
arm64: dts: imx8m*-venice: add I2C GPIO bus recovery support
Add I2C GPIO bus recovery support by adding scl-gpios and sda-gpios for the
various I2C busses on Gateworks Venice boards.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v5.15.69, v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61 |
|
| #
7f4dbc3f |
| 12-Aug-2022 |
Tim Harvey <tharvey@gateworks.com> |
arm64: dts: imx8mm-venice-gw7901: fix port/phy validation
Since commit 65ac79e18120 ("net: dsa: microchip: add the phylink
get_caps") the phy-mode must be set otherwise the switch driver will
assume
arm64: dts: imx8mm-venice-gw7901: fix port/phy validation
Since commit 65ac79e18120 ("net: dsa: microchip: add the phylink
get_caps") the phy-mode must be set otherwise the switch driver will
assume "NA" mode and invalidate the port.
Fixes: 65ac79e18120 ("net: dsa: microchip: add the phylink get_caps")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48, v5.15.47 |
|
| #
b803d15e |
| 09-Jun-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: freescale: align gpio-key node names with dtschema
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).
Signed-off-by: Krzysztof Kozlows
arm64: dts: freescale: align gpio-key node names with dtschema
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37 |
|
| #
22463f7c |
| 29-Apr-2022 |
Tim Harvey <tharvey@gateworks.com> |
arm64: dts: imx8mm-venice-gw7901: remove unnecessary cpu temp override
Remove the unnecessary cpu_alert0 and cpu_crit0 TMU node overrides as
these are added dynamically by boot firmware based on CPU
arm64: dts: imx8mm-venice-gw7901: remove unnecessary cpu temp override
Remove the unnecessary cpu_alert0 and cpu_crit0 TMU node overrides as
these are added dynamically by boot firmware based on CPU temperature
grade.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
| #
450cec4f |
| 29-Apr-2022 |
Tim Harvey <tharvey@gateworks.com> |
arm64: dts: imx8m*venice: add missing clock-names to pcie_phy
Define the missing clock-names property for the pcie_phy required by
the fsl,imx8-pcie-phy dt bindings.
Signed-off-by: Tim Harvey <thar
arm64: dts: imx8m*venice: add missing clock-names to pcie_phy
Define the missing clock-names property for the pcie_phy required by
the fsl,imx8-pcie-phy dt bindings.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v5.15.36, v5.15.35, v5.15.34 |
|
| #
d9a9a7cf |
| 11-Apr-2022 |
Tim Harvey <tharvey@gateworks.com> |
arm64: dts: imx8m{m,n}-venice-*: add missing uart-has-rtscts property to UARTs
Add the missing 'uart-has-rtscts' property to UART's that have hardware
flow control capability.
Signed-off-by: Tim Ha
arm64: dts: imx8m{m,n}-venice-*: add missing uart-has-rtscts property to UARTs
Add the missing 'uart-has-rtscts' property to UART's that have hardware
flow control capability.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v5.15.33, v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26, v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18 |
|
| #
9d46d9f7 |
| 27-Jan-2022 |
Tim Harvey <tharvey@gateworks.com> |
arm64: dts: imx8m{m,n}_venice*: add gpio-line-names
Add gpio-line-names for the various GPIO's used on Gateworks Venice
boards. Note that these GPIO's are typically 'configured' in Boot
Firmware via
arm64: dts: imx8m{m,n}_venice*: add gpio-line-names
Add gpio-line-names for the various GPIO's used on Gateworks Venice
boards. Note that these GPIO's are typically 'configured' in Boot
Firmware via gpio-hog therefore we only configure line names to keep the
boot firmware configuration from changing on kernel init.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.16, v5.15.10 |
|
| #
afb424b9 |
| 16-Dec-2021 |
Tim Harvey <tharvey@gateworks.com> |
arm64: dts: imx8mm-venice*: add PCIe support
Add PCIe support to GW71xx/GW72xx/GW73xx/GW7901/GW7902
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
|
|
Revision tags: v5.15.9, v5.15.8, v5.15.7, v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10 |
|
| #
79730092 |
| 06-Oct-2021 |
Tim Harvey <tharvey@gateworks.com> |
arm64: dts: imx8mm-venice-gw7901.dts: disable pgc_gpumix
Since commit b21269b12e48 ("arm64: dts: imx8mm: add GPC node") the
GW7901 will hang during kernel init because it does not power the unused
G
arm64: dts: imx8mm-venice-gw7901.dts: disable pgc_gpumix
Since commit b21269b12e48 ("arm64: dts: imx8mm: add GPC node") the
GW7901 will hang during kernel init because it does not power the unused
GPU voltage rails on the IMX8MM. Disable pgc_gpumix to work around this.
We also disable the GPU devices that depend on the gpumix power domain
and pgc_gpu to avoid them staying in a probe deferred state forever.
Additionally as the MIPI voltage rail is also not connected on this
board we disable pgc_mipi and disp_blk_ctrl.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60 |
|
| #
a9c57782 |
| 27-Jul-2021 |
Tim Harvey <tharvey@gateworks.com> |
arm64: dts: imx8mm-venice-gw7901: enable pull-down on gpio outputs
Enable internal pull-down on UART transceiver GPIO config pins.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: S
arm64: dts: imx8mm-venice-gw7901: enable pull-down on gpio outputs
Enable internal pull-down on UART transceiver GPIO config pins.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
| #
590dc51b |
| 27-Jul-2021 |
Tim Harvey <tharvey@gateworks.com> |
arm64: dts: imx8mm-venice-gw7901: add support for USB hub subload
The USB hub has it's reset as GPIO4_IO17 but can be sub-loaded and
VBUS provided by a VBUS regulator with GPIO4_IO2 as the enable an
arm64: dts: imx8mm-venice-gw7901: add support for USB hub subload
The USB hub has it's reset as GPIO4_IO17 but can be sub-loaded and
VBUS provided by a VBUS regulator with GPIO4_IO2 as the enable and
GPIO1_IO15 as the active-low over-current.
Enable pull-up for GPIO4_IO17 to keep hub out of reset and move VBUS
enable to GPIO4_IO2. Additionally enable pull-up on GPIO1_IO15 so that
if the hub is loaded it never over-currents.
This allows USB to work in both configurations without a device-tree
change.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49 |
|
| #
d05cd0dc |
| 10-Jul-2021 |
Fabio Estevam <festevam@gmail.com> |
arm64: dts: imx8mm-venice-gw7901: Remove unnecessary #address-cells/#size-cells
The following dtc build warning is seen with W=1:
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts:291.14-397.4
arm64: dts: imx8mm-venice-gw7901: Remove unnecessary #address-cells/#size-cells
The following dtc build warning is seen with W=1:
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts:291.14-397.4: Warning (avoid_unnecessary_addr_size): /soc@0/bus@30800000/i2c@30a20000/gsc@20: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Remove the unnecessary #address-cells/#size-cells to fix it.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
show more ...
|
|
Revision tags: v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30 |
|
| #
2b1649a8 |
| 30-Mar-2021 |
Tim Harvey <tharvey@gateworks.com> |
arm64: dts: imx: Add i.mx8mm Gateworks gw7901 dts support
The Gateworks GW7901 is an ARM based single board computer (SBC)
featuring:
- i.MX8M Mini SoC
- LPDDR4 DRAM
- eMMC FLASH
- SPI FRAM
- G
arm64: dts: imx: Add i.mx8mm Gateworks gw7901 dts support
The Gateworks GW7901 is an ARM based single board computer (SBC)
featuring:
- i.MX8M Mini SoC
- LPDDR4 DRAM
- eMMC FLASH
- SPI FRAM
- Gateworks System Controller (GSC)
- Atmel ATECC Crypto Authentication
- USB 2.0
- Microchip GbE Switch
- Multiple multi-protocol RS232/RS485/RS422 Serial ports
- onboard 802.11ac WiFi / BT
- microSD socket
- miniPCIe socket with PCIe, USB 2.0 and dual SIM sockets
- Wide range DC power input
- 802.3at PoE
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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