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Searched refs:PIXIS_BASE (Results 1 – 25 of 25) sorted by relevance

/openbmc/u-boot/board/freescale/mpc8610hpcd/
H A Dmpc8610hpcd.c42 u8 *pixis_base = (u8 *)PIXIS_BASE; in misc_init_r()
80 u8 *pixis_base = (u8 *)PIXIS_BASE; in checkboard()
283 u8 *pixis_base = (u8 *)PIXIS_BASE; in get_board_sys_clk()
325 u8 *pixis_base = (u8 *)PIXIS_BASE; in board_reset()
H A Dlaw.c17 SET_LAW(PIXIS_BASE, LAW_SIZE_2M, LAW_TRGT_IF_LBC),
/openbmc/u-boot/board/freescale/mpc8641hpcn/
H A Dmpc8641hpcn.c25 u8 *pixis_base = (u8 *)PIXIS_BASE; in checkboard()
173 u8 *pixis_base = (u8 *)PIXIS_BASE; in get_board_sys_clk()
237 u8 *pixis_base = (u8 *)PIXIS_BASE; in board_reset()
/openbmc/u-boot/include/configs/
H A DMPC8610HPCD.h141 #define PIXIS_BASE 0xe8000000 /* PIXIS registers */ macro
378 #define CONFIG_SYS_DBAT7L (PIXIS_BASE | BATL_PP_RW | BATL_CACHEINHIBIT \
380 #define CONFIG_SYS_DBAT7U (PIXIS_BASE | BATU_BL_1M | BATU_VS | BATU_VP)
381 #define CONFIG_SYS_IBAT7L (PIXIS_BASE | BATL_PP_RW | BATL_CACHEINHIBIT)
H A DMPC8572DS.h179 #define PIXIS_BASE 0xffdf0000 /* PIXIS registers */ macro
183 #define PIXIS_BASE_PHYS PIXIS_BASE
H A DP1022DS.h268 #define PIXIS_BASE 0xffdf0000 /* PIXIS registers */ macro
272 #define PIXIS_BASE_PHYS PIXIS_BASE
H A DMPC8536DS.h192 #define PIXIS_BASE 0xffdf0000 /* PIXIS registers */ macro
196 #define PIXIS_BASE_PHYS PIXIS_BASE
H A Dcorenet_ds.h177 #define PIXIS_BASE 0xffdf0000 /* PIXIS registers */ macro
181 #define PIXIS_BASE_PHYS PIXIS_BASE
H A DMPC8641HPCN.h177 #define PIXIS_BASE (CONFIG_SYS_LBC_BASE + 0x00010000) macro
201 #define CF_BASE (PIXIS_BASE + PIXIS_SIZE)
H A DMPC8544DS.h132 #define PIXIS_BASE 0xf8100000 /* PIXIS registers */ macro
/openbmc/u-boot/board/freescale/common/p_corenet/
H A Dtlb.c36 #ifdef PIXIS_BASE
37 SET_TLB_ENTRY(0, PIXIS_BASE, PIXIS_BASE_PHYS,
/openbmc/u-boot/board/freescale/common/
H A Dngpixis.c40 void *p = (void *)PIXIS_BASE; in __pixis_read()
48 void *p = (void *)PIXIS_BASE; in __pixis_write()
H A Dngpixis.h48 #define pixis ((ngpixis_t *)PIXIS_BASE)
H A Dpixis.h163 #define pixis ((pixis_t *)PIXIS_BASE)
H A Dpixis.c12 #define pixis_base (u8 *)PIXIS_BASE
/openbmc/u-boot/board/freescale/p1022ds/
H A Dspl_minimal.c34 px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD)); in board_init_f()
H A Ddiu.c293 void *p = (void *)PIXIS_BASE; in pixis_read()
317 void *p = (void *)PIXIS_BASE; in pixis_write()
H A Dtlb.c69 SET_TLB_ENTRY(1, PIXIS_BASE, PIXIS_BASE_PHYS,
H A Dspl.c53 px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD)); in board_init_f()
/openbmc/u-boot/board/freescale/mpc8544ds/
H A Dmpc8544ds.c31 u8 *pixis_base = (u8 *)PIXIS_BASE; in checkboard()
180 u8 *pixis_base = (u8 *)PIXIS_BASE; in get_board_sys_clk()
/openbmc/u-boot/board/freescale/mpc8536ds/
H A Dtlb.c27 SET_TLB_ENTRY(0, PIXIS_BASE, PIXIS_BASE_PHYS,
H A Dmpc8536ds.c52 u8 *pixis_base = (u8 *)PIXIS_BASE; in checkboard()
/openbmc/u-boot/board/freescale/mpc8572ds/
H A Dtlb.c70 SET_TLB_ENTRY(1, PIXIS_BASE, PIXIS_BASE_PHYS,
H A Dmpc8572ds.c29 u8 *pixis_base = (u8 *)PIXIS_BASE; in checkboard()
/openbmc/u-boot/arch/powerpc/cpu/mpc86xx/
H A Dstart.S242 lis r4, PIXIS_BASE@h