1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 25a469608STimur Tabi /** 3aa8d3fb8STimur Tabi * Copyright 2010-2011 Freescale Semiconductor 45a469608STimur Tabi * Author: Timur Tabi <timur@freescale.com> 55a469608STimur Tabi * 65a469608STimur Tabi * This file provides support for the ngPIXIS, a board-specific FPGA used on 75a469608STimur Tabi * some Freescale reference boards. 85a469608STimur Tabi */ 95a469608STimur Tabi 105a469608STimur Tabi /* ngPIXIS register set. Hopefully, this won't change too much over time. 115a469608STimur Tabi * Feel free to add board-specific #ifdefs where necessary. 125a469608STimur Tabi */ 135a469608STimur Tabi typedef struct ngpixis { 145a469608STimur Tabi u8 id; 155a469608STimur Tabi u8 arch; 165a469608STimur Tabi u8 scver; 175a469608STimur Tabi u8 csr; 185a469608STimur Tabi u8 rst; 19e02aea61SKumar Gala u8 serclk; 205a469608STimur Tabi u8 aux; 215a469608STimur Tabi u8 spd; 225a469608STimur Tabi u8 brdcfg0; 235f4d3682STimur Tabi u8 brdcfg1; /* On some boards, this register is called 'dma' */ 245a469608STimur Tabi u8 addr; 25e02aea61SKumar Gala u8 brdcfg2; 26e02aea61SKumar Gala u8 gpiodir; 275a469608STimur Tabi u8 data; 285a469608STimur Tabi u8 led; 29e02aea61SKumar Gala u8 tag; 305a469608STimur Tabi u8 vctl; 315a469608STimur Tabi u8 vstat; 325a469608STimur Tabi u8 vcfgen0; 335a469608STimur Tabi u8 res4; 345a469608STimur Tabi u8 ocmcsr; 355a469608STimur Tabi u8 ocmmsg; 365a469608STimur Tabi u8 gmdbg; 375a469608STimur Tabi u8 res5[2]; 385a469608STimur Tabi u8 sclk[3]; 395a469608STimur Tabi u8 dclk[3]; 405a469608STimur Tabi u8 watch; 415a469608STimur Tabi struct { 425a469608STimur Tabi u8 sw; 435a469608STimur Tabi u8 en; 44d31e53b4STimur Tabi } s[9]; /* s[0]..s[7] is SW1..SW8, and s[8] is SW11 */ 45b4a60e52SKumar Gala } __attribute__ ((packed)) ngpixis_t; 465a469608STimur Tabi 475a469608STimur Tabi /* Pointer to the PIXIS register set */ 485a469608STimur Tabi #define pixis ((ngpixis_t *)PIXIS_BASE) 495a469608STimur Tabi 505a469608STimur Tabi /* The PIXIS SW register that corresponds to board switch X, where x >= 1 */ 515a469608STimur Tabi #define PIXIS_SW(x) (pixis->s[(x) - 1].sw) 525a469608STimur Tabi 535a469608STimur Tabi /* The PIXIS EN register that corresponds to board switch X, where x >= 1 */ 545a469608STimur Tabi #define PIXIS_EN(x) (pixis->s[(x) - 1].en) 55aa8d3fb8STimur Tabi 56aa8d3fb8STimur Tabi u8 pixis_read(unsigned int reg); 57aa8d3fb8STimur Tabi void pixis_write(unsigned int reg, u8 value); 58aa8d3fb8STimur Tabi 59aa8d3fb8STimur Tabi #define PIXIS_READ(reg) pixis_read(offsetof(ngpixis_t, reg)) 60aa8d3fb8STimur Tabi #define PIXIS_WRITE(reg, value) pixis_write(offsetof(ngpixis_t, reg), value) 61