| /openbmc/u-boot/board/xilinx/zynqmp/ |
| H A D | tap_delays.c | 60 #define MMC_TIMING_MMC_HS200 5 macro
217 case MMC_TIMING_MMC_HS200: in arasan_zynqmp_set_tapdelay()
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| /openbmc/linux/drivers/mmc/core/ |
| H A D | host.h | 68 return card->host->ios.timing == MMC_TIMING_MMC_HS200; in mmc_card_hs200()
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| H A D | debugfs.c | 147 case MMC_TIMING_MMC_HS200: in mmc_ios_show()
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| H A D | host.c | 260 &map->phase[MMC_TIMING_MMC_HS200]); in mmc_of_parse_clk_phase()
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| /openbmc/linux/drivers/mmc/host/ |
| H A D | sdhci-of-arasan.c | 759 case MMC_TIMING_MMC_HS200: in sdhci_zynqmp_sdcardclk_set_phase()
828 case MMC_TIMING_MMC_HS200: in sdhci_zynqmp_sampleclk_set_phase()
888 case MMC_TIMING_MMC_HS200: in sdhci_versal_sdcardclk_set_phase()
955 case MMC_TIMING_MMC_HS200: in sdhci_versal_sampleclk_set_phase()
1003 case MMC_TIMING_MMC_HS200: in sdhci_versal_net_emmc_sdcardclk_set_phase()
1274 zynqmp_oclk_phase[MMC_TIMING_MMC_HS200] = 90; in arasan_dt_parse_clk_phases()
1323 arasan_dt_read_clk_phase(dev, clk_data, MMC_TIMING_MMC_HS200, in arasan_dt_parse_clk_phases()
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| H A D | dw_mmc-hi3798cv200.c | 56 else if (ios->timing == MMC_TIMING_MMC_HS200) in dw_mci_hi3798cv200_set_ios()
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| H A D | sdhci-cadence.c | 269 if (host->timing != MMC_TIMING_MMC_HS200 && in sdhci_cdns_execute_tuning()
307 case MMC_TIMING_MMC_HS200: in sdhci_cdns_set_uhs_signaling()
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| H A D | sdhci-xenon.c | 204 if (timing == MMC_TIMING_MMC_HS200) in xenon_set_uhs_signaling()
291 (ios->timing == MMC_TIMING_MMC_HS200) || in xenon_set_ios()
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| H A D | sdhci-of-dwcmshc.c | 170 if ((timing == MMC_TIMING_MMC_HS200) || in dwcmshc_set_uhs_signaling()
299 if (host->mmc->ios.timing == MMC_TIMING_MMC_HS200 || in dwcmshc_rk3568_set_clock()
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| H A D | mmci_stm32_sdmmc.c | 417 host->mmc->ios.timing == MMC_TIMING_MMC_HS200) { in sdmmc_get_dctrl_cfg()
629 host->mmc->ios.timing != MMC_TIMING_MMC_HS200) || in sdmmc_execute_tuning()
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| H A D | dw_mmc-rockchip.c | 117 case MMC_TIMING_MMC_HS200: in dw_mci_rk3288_set_ios()
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| H A D | sdhci-pci-arasan.c | 277 case MMC_TIMING_MMC_HS200: in arasan_select_phy_clock()
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| H A D | sdhci-of-esdhc.c | 48 .max_clk[MMC_TIMING_MMC_HS200] = 116700000,
54 .max_clk[MMC_TIMING_MMC_HS200] = 167000000,
60 .max_clk[MMC_TIMING_MMC_HS200] = 125000000,
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| H A D | sdhci-sprd.c | 112 { "sprd,phy-delay-mmc-hs200", MMC_TIMING_MMC_HS200, },
365 case MMC_TIMING_MMC_HS200: in sdhci_sprd_set_uhs_signaling()
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| H A D | sdhci-st.c | 286 case MMC_TIMING_MMC_HS200: in sdhci_st_set_uhs_signaling()
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| H A D | sdhci-brcmstb.c | 108 if ((timing == MMC_TIMING_MMC_HS200) || in sdhci_brcmstb_set_uhs_signaling()
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| H A D | sdhci-pci-o2micro.c | 329 if ((host->timing != MMC_TIMING_MMC_HS200) && in sdhci_o2_execute_tuning()
354 if (host->timing == MMC_TIMING_MMC_HS200 || in sdhci_o2_execute_tuning()
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| H A D | sdhci-omap.c | 1126 MMC_TIMING_MMC_HS200 + 1, in sdhci_omap_config_iodelay_pinctrl_state()
1195 pinctrl_state[MMC_TIMING_MMC_HS200] = state; in sdhci_omap_config_iodelay_pinctrl_state()
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| H A D | sdhci-xenon-phy.c | 780 case MMC_TIMING_MMC_HS200: in xenon_hs_delay_adj()
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| H A D | sdhci-msm.c | 1133 ios->timing == MMC_TIMING_MMC_HS200 || in sdhci_msm_is_tuning_needed()
1341 case MMC_TIMING_MMC_HS200: in sdhci_msm_set_uhs_signaling()
1359 uhs == MMC_TIMING_MMC_HS200 || in sdhci_msm_set_uhs_signaling()
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| H A D | sdhci-esdhc-imx.c | 1226 case MMC_TIMING_MMC_HS200: in esdhc_change_pinstate()
1306 case MMC_TIMING_MMC_HS200: in esdhc_set_uhs_signaling()
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| H A D | sdhci-acpi.c | 552 host->timing == MMC_TIMING_MMC_HS200) { in amd_set_ios()
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| /openbmc/u-boot/drivers/mmc/ |
| H A D | xenon_sdhci.c | 105 #define MMC_TIMING_MMC_HS200 9 macro
231 (priv->timing == MMC_TIMING_MMC_HS200) || in xenon_mmc_phy_set()
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| /openbmc/linux/include/linux/mmc/ |
| H A D | host.h | 62 #define MMC_TIMING_MMC_HS200 9 macro
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| /openbmc/linux/drivers/staging/greybus/ |
| H A D | sdio.c | 671 case MMC_TIMING_MMC_HS200: in gb_mmc_set_ios()
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