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Searched refs:CONFIG_SYS_IBAT0L (Results 1 – 25 of 26) sorted by relevance

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/openbmc/u-boot/include/configs/km/
H A Dkm83xx-common.h224 #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \ macro
228 #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
/openbmc/u-boot/include/configs/
H A Dmpc8308_p1m.h402 #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \ macro
406 #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
H A DTQM834x.h316 #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \ macro
395 #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
H A DMPC8308RDB.h435 #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \ macro
439 #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
H A DMPC8323ERDB.h340 #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \ macro
347 #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
H A Dve8313.h365 #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW) macro
417 #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
H A Dids8313.h318 #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE |\ macro
324 #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
H A DMPC832XEMDS.h422 #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \ macro
429 #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
H A Dvme8349.h400 #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \ macro
458 #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
H A Dsbc8349.h486 #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \ macro
565 #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
H A DMPC8315ERDB.h455 #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \ macro
462 #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
H A DMPC8349ITX.h536 #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \ macro
614 #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
H A DMPC837XERDB.h504 #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_LOWER \ macro
511 #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
H A DMPC8313ERDB.h531 #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW) macro
575 #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
H A DMPC837XEMDS.h489 #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_LOWER \ macro
496 #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
H A Dhrcon.h531 #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \ macro
535 #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
H A Dstrider.h563 #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW | \ macro
567 #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
H A DMPC8349EMDS.h573 #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \ macro
652 #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L
H A DMPC8610HPCD.h287 #define CONFIG_SYS_IBAT0L (BATL_PP_RW) macro
H A Dxpedite517x.h336 #define CONFIG_SYS_IBAT0L (BATL_PP_RW | BATL_MEMCOHERENCE) macro
H A Dsbc8641d.h337 #define CONFIG_SYS_IBAT0L (BATL_PP_RW | BATL_MEMCOHERENCE ) macro
H A DMPC8641HPCN.h423 #define CONFIG_SYS_IBAT0L (BATL_PP_RW | BATL_MEMCOHERENCE) macro
/openbmc/u-boot/arch/powerpc/cpu/mpc86xx/
H A Dcpu.c201 write_bat(IBAT0, batu, CONFIG_SYS_IBAT0L); in setup_ddr_bat()
H A Dstart.S355 && defined(CONFIG_SYS_IBAT0U) && defined(CONFIG_SYS_IBAT0L)
/openbmc/u-boot/arch/powerpc/cpu/mpc83xx/
H A Dstart.S572 addis r4, r0, CONFIG_SYS_IBAT0L@h
573 ori r4, r4, CONFIG_SYS_IBAT0L@l

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