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/openbmc/u-boot/board/freescale/ls1043aqds/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0+
28 if (!pdimm->n_ranks) in fsl_ddr_board_options()
37 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
38 if (pbsp->n_ranks == pdimm->n_ranks) { in fsl_ddr_board_options()
39 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
40 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
41 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
42 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
43 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; in fsl_ddr_board_options()
44 popts->cpo_override = pbsp->cpo_override; in fsl_ddr_board_options()
[all …]
/openbmc/u-boot/board/freescale/t1040qds/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
29 if (!pdimm->n_ranks) in fsl_ddr_board_options()
38 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
39 if (pbsp->n_ranks == pdimm->n_ranks && in fsl_ddr_board_options()
40 (pdimm->rank_density >> 30) >= pbsp->rank_gb) { in fsl_ddr_board_options()
41 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
42 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
43 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
44 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
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/openbmc/u-boot/board/freescale/t104xrdb/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0+
29 if (!pdimm->n_ranks) in fsl_ddr_board_options()
38 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
39 if (pbsp->n_ranks == pdimm->n_ranks && in fsl_ddr_board_options()
40 (pdimm->rank_density >> 30) >= pbsp->rank_gb) { in fsl_ddr_board_options()
41 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
42 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
43 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
44 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
45 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; in fsl_ddr_board_options()
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/openbmc/linux/drivers/iio/pressure/
H A Dzpa2326.c1 // SPDX-License-Identifier: GPL-2.0-only
34 * - get device out of low power mode,
35 * - setup hardware sampling period,
36 * - at end of period, upon data ready interrupt: pop pressure samples out of
38 * - when no longer needed, stop sampling process by putting device into
70 /* 200 ms should be enough for the longest conversion time in one-shot mode. */
78 * struct zpa2326_frequency - Hardware sampling frequency descriptor
102 ARRAY_SIZE(zpa2326_sampling_frequencies) - 1]; in zpa2326_highest_frequency()
106 * struct zpa2326_private - Per-device internal private state
121 * @vref: Power / voltage reference.
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/openbmc/u-boot/board/freescale/ls2080a/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0+
26 if (!pdimm->n_ranks) in fsl_ddr_board_options()
33 if (popts->registered_dimm_en) in fsl_ddr_board_options()
43 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
44 if (pbsp->n_ranks == pdimm->n_ranks && in fsl_ddr_board_options()
45 (pdimm->rank_density >> 30) >= pbsp->rank_gb) { in fsl_ddr_board_options()
46 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
47 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
48 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
49 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
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/openbmc/u-boot/board/freescale/ls1021aqds/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0+
26 if (!pdimm->n_ranks) in fsl_ddr_board_options()
35 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
36 if (pbsp->n_ranks == pdimm->n_ranks) { in fsl_ddr_board_options()
37 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
38 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
39 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
40 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
41 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; in fsl_ddr_board_options()
42 popts->cpo_override = pbsp->cpo_override; in fsl_ddr_board_options()
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/openbmc/linux/drivers/iio/adc/
H A Dat91-sama5d2_adc.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/dma-mapping.h>
31 #include <linux/nvmem-consumer.h>
36 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
110 /* Interrupt Enable Register - TS X measurement ready */
112 /* Interrupt Enable Register - TS Y measurement ready */
114 /* Interrupt Enable Register - TS pressure measurement ready */
116 /* Interrupt Enable Register - Data ready */
118 /* Interrupt Enable Register - general overrun error */
120 /* Interrupt Enable Register - Pen detect */
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H A Daspeed_adc.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #include <linux/clk-provider.h>
185 dev_warn(data->dev, "Couldn't find syscon node\n"); in aspeed_adc_set_trim_data()
186 return -EOPNOTSUPP; in aspeed_adc_set_trim_data()
191 dev_warn(data->dev, "Failed to get syscon regmap\n"); in aspeed_adc_set_trim_data()
192 return -EOPNOTSUPP; in aspeed_adc_set_trim_data()
194 if (data->model_data->trim_locate) { in aspeed_adc_set_trim_data()
195 if (regmap_read(scu, data->model_data->trim_locate->offset, in aspeed_adc_set_trim_data()
197 dev_warn(data->dev, in aspeed_adc_set_trim_data()
203 (data->model_data->trim_locate->field)) >> in aspeed_adc_set_trim_data()
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H A Dingenic-adc.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (c) 2019 Artur Rojek <contact@artur-rojek.eu>
6 * based on drivers/mfd/jz4740-adc.c
9 #include <dt-bindings/iio/adc/ingenic,adc.h>
118 mutex_lock(&adc->lock); in ingenic_adc_set_adcmd()
121 readl(adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
128 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
134 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
142 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
148 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
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/openbmc/u-boot/board/freescale/t102xqds/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0+
65 struct cpu_type *cpu = gd->arch.cpu; in fsl_ddr_board_options()
71 if (!pdimm->n_ranks) in fsl_ddr_board_options()
80 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
81 if (pbsp->n_ranks == pdimm->n_ranks && in fsl_ddr_board_options()
82 (pdimm->rank_density >> 30) >= pbsp->rank_gb) { in fsl_ddr_board_options()
83 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
84 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
85 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
86 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
[all …]
/openbmc/u-boot/board/freescale/ls1043ardb/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0+
28 if (!pdimm->n_ranks) in fsl_ddr_board_options()
37 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
38 if (pbsp->n_ranks == pdimm->n_ranks) { in fsl_ddr_board_options()
39 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
40 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
41 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
42 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
43 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; in fsl_ddr_board_options()
44 popts->cpo_override = pbsp->cpo_override; in fsl_ddr_board_options()
[all …]
/openbmc/linux/drivers/media/i2c/
H A Dvpx3220.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include <media/v4l2-device.h>
17 #include <media/v4l2-ctrls.h>
25 MODULE_PARM_DESC(debug, "Debug level (0-1)");
30 /* ----------------------------------------------------------------------- */
49 return &container_of(ctrl->handler, struct vpx3220, hdl)->sd; in to_sd()
54 /* ----------------------------------------------------------------------- */
61 decoder->reg[reg] = value; in vpx3220_write()
89 return -1; in vpx3220_fp_status()
96 /* Write the 16-bit address to the FPWR register */ in vpx3220_fp_write()
[all …]
/openbmc/linux/drivers/comedi/drivers/
H A Dadv_pci1710.c1 // SPDX-License-Identifier: GPL-2.0
4 * Comedi driver for Advantech PCI-1710 series boards
13 * Description: Comedi driver for Advantech PCI-1710 series boards
14 * Devices: [Advantech] PCI-1710 (adv_pci1710), PCI-1710HG, PCI-1711,
15 * PCI-1713, PCI-1731
17 * Updated: Fri, 29 Oct 2015 17:19:35 -0700
26 * The PCI-1710 and PCI-1710HG have the same PCI device ID, so the
39 * PCI BAR2 Register map (dev->iobase)
54 #define PCI171X_STATUS_FH BIT(9) /* 1=FIFO is half full */
58 #define PCI171X_CTRL_ONEFH BIT(5) /* 1=on FIFO half full, 0=on sample */
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H A Damplc_pci224.c1 // SPDX-License-Identifier: GPL-2.0+
8 * COMEDI - Linux Control and Measurement Device Interface
22 * - ao_insn read/write
23 * - ao_do_cmd mode with the following sources:
25 * - start_src TRIG_INT TRIG_EXT
26 * - scan_begin_src TRIG_TIMER TRIG_EXT
27 * - convert_src TRIG_NOW
28 * - scan_end_src TRIG_COUNT
29 * - stop_src TRIG_COUNT TRIG_EXT TRIG_NONE
44 * Output range selection - PCI224:
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/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dmv_ddr_plat.c1 // SPDX-License-Identifier: GPL-2.0
17 * 2. U-Boot modifies internal registers base to 0xf100000,
165 1800 /* 30 - 0x1E */
214 return ((((10000 * reg) / 21445) * 1000) - 272674) / 1000; in ddr3_ctrl_get_junc_temp()
234 freq_config_info->bw_per_freq = a38x_bw_per_freq[freq]; in ddr3_tip_a38x_get_freq_config()
235 freq_config_info->rate_per_freq = a38x_rate_per_freq[freq]; in ddr3_tip_a38x_get_freq_config()
236 freq_config_info->is_supported = 1; in ddr3_tip_a38x_get_freq_config()
359 * Args: dev_num - device number
360 * enable - whether to enable or disable the server
562 info_ptr->device_id = 0x6900; in ddr3_tip_a38x_get_device_info()
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/openbmc/linux/drivers/net/phy/
H A Dbcm7xxx.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2014-2017 Broadcom
11 #include "bcm-phy-lib.h"
58 /* AFE_RXCONFIG_2, set rCal offset for HT=0 code and LT=-2 code */ in bcm7xxx_28nm_d0_afe_config_init()
73 /* AFE_HPF_TRIM_OTHERS, set 100Tx/10BT to -4.5% swing and set rCal in bcm7xxx_28nm_d0_afe_config_init()
101 /* AFE_HPF_TRIM_OTHERS, set 100Tx/10BT to -4.5% swing and set rCal in bcm7xxx_28nm_e0_plus_afe_config_init()
145 u8 rev = PHY_BRCM_7XXX_REV(phydev->dev_flags); in bcm7xxx_28nm_config_init()
146 u8 patch = PHY_BRCM_7XXX_PATCH(phydev->dev_flags); in bcm7xxx_28nm_config_init()
154 rev = phydev->phy_id & ~phydev->drv->phy_id_mask; in bcm7xxx_28nm_config_init()
157 phydev_name(phydev), phydev->drv->name, rev, patch); in bcm7xxx_28nm_config_init()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/input/
H A Dazoteq,iqs7222.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
21 - azoteq,iqs7222a
22 - azoteq,iqs7222b
23 - azoteq,iqs7222c
24 - azoteq,iqs7222d
29 irq-gpios:
32 Specifies the GPIO connected to the device's active-low RDY output.
[all …]
/openbmc/u-boot/drivers/ram/rockchip/
H A Dsdram_rk3399.c1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
3 * (C) Copyright 2016-2017 Rockchip Inc.
11 #include <dt-structs.h>
83 u32 *denali_phy = ddr_publ_regs->denali_phy; in phy_dll_bypass_set()
115 &sdram_params->ch[channel]; in set_memory_map()
116 u32 *denali_ctl = chan->pctl->denali_ctl; in set_memory_map()
117 u32 *denali_pi = chan->pi->denali_pi; in set_memory_map()
123 if (sdram_ch->ddrconfig < 2 || sdram_ch->ddrconfig == 4) in set_memory_map()
125 else if (sdram_ch->ddrconfig == 3) in set_memory_map()
130 cs_map = (sdram_ch->rank > 1) ? 3 : 1; in set_memory_map()
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/openbmc/linux/drivers/media/usb/gspca/
H A Dov519.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2008-2011 Jean-François Moine <moinejf@free.fr>
8 * This module is adapted from the ov51x-jpeg package, which itself
13 * Copyright (c) 1999-2006 Mark W. McClelland
20 * ov51x-jpeg original copyright is:
22 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
38 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
482 /*jfm: this value does not work for 800x600 - see isoc_init */
514 #define OV7670_R00_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
539 #define OV7670_R14_COM9 0x14 /* Control 9 - gain ceiling */
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/openbmc/linux/drivers/input/misc/
H A Diqs7222.c1 // SPDX-License-Identifier: GPL-2.0-or-later
116 [IQS7222_REG_GRP_CYCLE] = "cycle-%d",
117 [IQS7222_REG_GRP_CHAN] = "channel-%d",
118 [IQS7222_REG_GRP_SLDR] = "slider-%d",
120 [IQS7222_REG_GRP_GPIO] = "gpio-%d",
150 .name = "event-prox",
155 .name = "event-touch",
162 { .name = "event-press", },
164 .name = "event-tap",
171 .name = "event-swipe-pos",
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