Lines Matching +full:vref +full:- +full:half
1 // SPDX-License-Identifier: GPL-2.0+
29 if (!pdimm->n_ranks) in fsl_ddr_board_options()
38 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
39 if (pbsp->n_ranks == pdimm->n_ranks && in fsl_ddr_board_options()
40 (pdimm->rank_density >> 30) >= pbsp->rank_gb) { in fsl_ddr_board_options()
41 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
42 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
43 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
44 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
45 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; in fsl_ddr_board_options()
57 pbsp_highest->datarate_mhz_high); in fsl_ddr_board_options()
58 popts->clk_adjust = pbsp_highest->clk_adjust; in fsl_ddr_board_options()
59 popts->wrlvl_start = pbsp_highest->wrlvl_start; in fsl_ddr_board_options()
60 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
61 popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; in fsl_ddr_board_options()
69 pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb, in fsl_ddr_board_options()
70 pbsp->clk_adjust, pbsp->wrlvl_start, pbsp->wrlvl_ctl_2, in fsl_ddr_board_options()
71 pbsp->wrlvl_ctl_3); in fsl_ddr_board_options()
74 * Factors to consider for half-strength driver enable: in fsl_ddr_board_options()
75 * - number of DIMMs installed in fsl_ddr_board_options()
78 popts->half_strength_driver_enable = 1; in fsl_ddr_board_options()
79 /* optimize cpo for erratum A-009942 */ in fsl_ddr_board_options()
80 popts->cpo_sample = 0x59; in fsl_ddr_board_options()
82 popts->half_strength_driver_enable = 0; in fsl_ddr_board_options()
87 popts->wrlvl_override = 1; in fsl_ddr_board_options()
88 popts->wrlvl_sample = 0xf; in fsl_ddr_board_options()
93 popts->rtt_override = 0; in fsl_ddr_board_options()
96 popts->zq_en = 1; in fsl_ddr_board_options()
100 popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_120OHM); in fsl_ddr_board_options()
101 popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_120OHM) | in fsl_ddr_board_options()
102 DDR_CDR2_VREF_OVRD(70); /* Vref = 70% */ in fsl_ddr_board_options()
104 popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm); in fsl_ddr_board_options()
105 popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm); in fsl_ddr_board_options()
139 gd->ram_size = dram_size; in dram_init()