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/openbmc/linux/tools/testing/selftests/timers/
H A Dvalid-adjtimex.c9 * Usage: valid-adjtimex
12 * $ gcc valid-adjtimex.c -o valid-adjtimex -lrt
40 int clock_adjtime(clockid_t id, struct timex *tx) in clock_adjtime() argument
42 return syscall(__NR_clock_adjtime, id, tx); in clock_adjtime()
49 struct timex tx; in clear_time_state() local
52 tx.modes = ADJ_STATUS; in clear_time_state()
53 tx.status = 0; in clear_time_state()
54 ret = adjtimex(&tx); in clear_time_state()
65 -499 * SHIFTED_PPM,
66 -450 * SHIFTED_PPM,
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H A Dchange_skew.c6 * NOTE: This is a meta-test which cranks the ADJ_FREQ knob and
8 * that the raw_skew, inconsistency-check and nanosleep tests be
12 * $ gcc change_skew.c -o change_skew -lrt
38 struct timex tx; in change_skew_test() local
41 tx.modes = ADJ_FREQUENCY; in change_skew_test()
42 tx.freq = ppm << 16; in change_skew_test()
44 ret = adjtimex(&tx); in change_skew_test()
46 printf("Error adjusting freq\n"); in change_skew_test()
51 ret |= system("./inconsistency-check"); in change_skew_test()
60 struct timex tx; in main() local
[all …]
/openbmc/openbmc/meta-openembedded/meta-networking/recipes-support/open-vm-tools/open-vm-tools/
H A D0014-timeSync-Portable-way-to-print-64bit-time_t.patch3 Date: Tue, 3 Jan 2023 13:36:01 -0800
7 -D_TIME_BITS=64 ) then it can print it correctly as well.
10 …43:20: error: format specifies type 'long' but the argument has type 'long long' [-Werror,-Wformat]
11 | prefix, tx->offset, tx->freq, tx->maxerror, tx->esterror,
14 Upstream-Status: Submitted [https://github.com/vmware/open-vm-tools/pull/631]
16 Signed-off-by: Khem Raj <raj.khem@gmail.com>
17 ---
18 open-vm-tools/services/plugins/timeSync/pllLinux.c | 8 ++++----
19 open-vm-tools/services/plugins/timeSync/slewLinux.c | 2 +-
20 2 files changed, 5 insertions(+), 5 deletions(-)
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/openbmc/linux/sound/soc/fsl/
H A Dfsl_esai.c1 // SPDX-License-Identifier: GPL-2.0
17 #include "imx-pcm.h"
25 * struct fsl_esai_soc_data - soc specific data
33 * struct fsl_esai - ESAI private data
45 * @fifo_depth: depth of tx/rx FIFO
48 * @tx_mask: slot mask for TX
50 * @channels: channel num for tx or rx
56 * @synchronous: if using tx/rx synchronous mode
101 struct platform_device *pdev = esai_priv->pdev; in esai_isr()
105 regmap_read(esai_priv->regmap, REG_ESAI_ESR, &esr); in esai_isr()
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H A Dfsl_sai.c1 // SPDX-License-Identifier: GPL-2.0+
5 // Copyright 2012-2015 Freescale Semiconductor, Inc.
23 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
27 #include "imx-pcm.h"
45 * fsl_sai_dir_is_synced - Check if stream is synced by the opposite stream
56 int adir = (dir == TX) ? RX : TX; in fsl_sai_dir_is_synced()
59 return !sai->synchronous[dir] && sai->synchronous[adir]; in fsl_sai_dir_is_synced()
66 if (sai->is_pdm_mode) { in fsl_sai_get_pins_state()
69 state = pinctrl_lookup_state(sai->pinctrl, "dsd512"); in fsl_sai_get_pins_state()
73 state = pinctrl_lookup_state(sai->pinctrl, "dsd"); in fsl_sai_get_pins_state()
[all …]
H A Dfsl_xcvr.c1 // SPDX-License-Identifier: GPL-2.0
18 #include "imx-pcm.h"
61 * HDMI2.1 spec defines 6- and 12-channels layout for one bit audio
99 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in fsl_xcvr_arc_mode_put()
100 unsigned int *item = ucontrol->value.enumerated.item; in fsl_xcvr_arc_mode_put()
102 xcvr->arc_mode = snd_soc_enum_item_to_val(e, item[0]); in fsl_xcvr_arc_mode_put()
113 ucontrol->value.enumerated.item[0] = xcvr->arc_mode; in fsl_xcvr_arc_mode_get()
133 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; in fsl_xcvr_type_capds_bytes_info()
134 uinfo->count = FSL_XCVR_CAPDS_SIZE; in fsl_xcvr_type_capds_bytes_info()
145 memcpy(ucontrol->value.bytes.data, xcvr->cap_ds, FSL_XCVR_CAPDS_SIZE); in fsl_xcvr_capds_get()
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H A Dfsl_ssi.c1 // SPDX-License-Identifier: GPL-2.0
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
9 // Some notes why imx-pcm-fiq is used instead of DMA on some boards:
16 // we receive in our (PCM-) data stream. The only chance we have is to
43 #include <linux/dma/imx-dma.h>
53 #include "imx-pcm.h"
55 /* Define RX and TX to index ssi->regvals array; Can be 0 or 1 only */
57 #define TX 1 macro
66 * (bit-endianness must match byte-endianness). Processors typically write
68 * written in. So if the host CPU is big-endian, then only big-endian
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/openbmc/u-boot/drivers/video/meson/
H A Dmeson_vclk.c1 // SPDX-License-Identifier: GPL-2.0
239 readl_poll_timeout(priv->hhi_base + HHI_HDMI_PLL_CNTL, val, in meson_venci_cvbs_clock_config()
250 VCLK2_DIV_MASK, (55 - 1)); in meson_venci_cvbs_clock_config()
290 /* PLL O1 O2 O3 VP DV EN TX */
414 readl_poll_timeout(priv->hhi_base + HHI_HDMI_PLL_CNTL, val, in meson_hdmi_pll_set_params()
432 readl_poll_timeout(priv->hhi_base + HHI_HDMI_PLL_CNTL, val, in meson_hdmi_pll_set_params()
466 /* The GXBB PLL has a /2 pre-multiplier */ in meson_hdmi_pll_get_m()
485 /* The GXBB PLL has a /2 pre-multiplier and a larger FRAC width */ in meson_hdmi_pll_get_frac()
500 frac -= frac_m; in meson_hdmi_pll_get_frac()
502 return min((u16)frac, (u16)(frac_max - 1)); in meson_hdmi_pll_get_frac()
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/openbmc/linux/drivers/media/rc/
H A Dite-cir.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * skeleton provided by the nuvoton-cir driver.
10 * The lirc_it87 driver was originally written by Hans-Gunter Lutke Uphues
13 * <jimbo-lirc@edwardsclan.net>.
16 * <spmf2004-lirc@yahoo.fr> in 2008.
29 #include <media/rc-core.h>
32 #include "ite-cir.h"
42 static int model_number = -1;
47 /* HW-independent code functions */
50 static inline bool ite_is_high_carrier_freq(unsigned int freq) in ite_is_high_carrier_freq() argument
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H A Dwinbond-cir.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * winbond-cir.c - Driver for the Consumer IR functionality of Winbond
12 * Copyright (C) 2009 - 2011 David Härdeman <david@hardeman.nu>
26 * o Wake-On-CIR functionality
44 #include <media/rc-core.h>
46 #define DRVNAME "winbond-cir"
48 /* CEIR Wake-Up Registers, relative to data->wbase */
60 /* CEIR Enhanced Functionality Registers, relative to data->ebase */
67 /* SP3 Banked Registers, relative to data->sbase */
71 #define WBCIR_REG_SP3_TXDATA 0x00 /* FIFO TX data (w) */
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/openbmc/linux/drivers/gpu/drm/meson/
H A Dmeson_vclk.c1 // SPDX-License-Identifier: GPL-2.0-or-later
21 * - CVBS 27MHz generator via the VCLK2 to the VENCI and VDAC blocks
22 * - HDMI Pixel Clocks generation
26 * - Genenate Pixel clocks for 2K/4K 10bit formats
33 * | | | | | |--ENCI
34 * | HDMI PLL |-| PLL_DIV |--- VCLK--| |--ENCL
35 * |__________| |_________| \ | MUX |--ENCP
36 * --VCLK2-| |--VDAC
37 * |_____|--HDMI-TX
140 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, VID_PLL_EN, 0); in meson_vid_pll_set()
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/openbmc/u-boot/drivers/spi/
H A Dtegra114_spi.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2013 NVIDIA Corporation
12 #include <asm/arch-tegra/clk_rst.h>
80 u32 rsvd[56]; /* 028-107 reserved */
82 u32 rsvd2[31]; /* 10c-187 reserved */
89 unsigned int freq; member
98 struct tegra_spi_platdata *plat = bus->platdata; in tegra114_spi_ofdata_to_platdata()
100 plat->base = dev_read_addr(bus); in tegra114_spi_ofdata_to_platdata()
101 plat->periph_id = clock_decode_periph_id(bus); in tegra114_spi_ofdata_to_platdata()
103 if (plat->periph_id == PERIPH_ID_NONE) { in tegra114_spi_ofdata_to_platdata()
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H A Dtegra210_qspi.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch-tegra/clk_rst.h>
79 u32 rsvd[56]; /* 028-107 reserved */
81 u32 rsvd2[31]; /* 10c-187 reserved */
88 unsigned int freq; member
97 struct tegra_spi_platdata *plat = bus->platdata; in tegra210_qspi_ofdata_to_platdata()
98 const void *blob = gd->fdt_blob; in tegra210_qspi_ofdata_to_platdata()
101 plat->base = devfdt_get_addr(bus); in tegra210_qspi_ofdata_to_platdata()
102 plat->periph_id = clock_decode_periph_id(bus); in tegra210_qspi_ofdata_to_platdata()
104 if (plat->periph_id == PERIPH_ID_NONE) { in tegra210_qspi_ofdata_to_platdata()
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H A Domap3_spi.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
43 /* per-register bitmasks */
90 unsigned int tx; /* 0x38, 0x4C, 0x60, 0x74 */ member
104 /* channel0: 0x2C - 0x3C, bus 0 & 1 & 2 & 3 */
105 /* channel1: 0x40 - 0x50, bus 0 & 1 */
106 /* channel2: 0x54 - 0x64, bus 0 & 1 */
107 /* channel3: 0x68 - 0x78, bus 0 */
116 unsigned int freq; member
124 writel(val, &priv->regs->channel[priv->cs].chconf); in omap3_spi_write_chconf()
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H A Ddesignware_spi.c1 // SPDX-License-Identifier: GPL-2.0
8 * drivers/spi/spi-dw.c, which is:
13 #include <asm-generic/gpio.h>
91 s32 frequency; /* Default clock frequency, -1 for none */
97 unsigned int freq; /* Default frequency */ member
102 struct gpio_desc cs_gpio; /* External chip-select gpio */
111 void *tx; member
121 return __raw_readl(priv->regs + offset); in dw_read()
126 __raw_writel(val, priv->regs + offset); in dw_write()
136 ret = gpio_request_by_name(bus, "cs-gpio", 0, &priv->cs_gpio, 0); in request_gpio_cs()
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/openbmc/linux/drivers/media/radio/
H A Dradio-keene.c1 // SPDX-License-Identifier: GPL-2.0-or-later
13 #include <media/v4l2-device.h>
14 #include <media/v4l2-ioctl.h>
15 #include <media/v4l2-ctrls.h>
16 #include <media/v4l2-event.h>
57 u8 tx; member
69 /* Set frequency (if non-0), PA, mute and turn on/off the FM transmitter. */
70 static int keene_cmd_main(struct keene_device *radio, unsigned freq, bool play) in keene_cmd_main() argument
72 unsigned short freq_send = freq ? (freq - 76 * 16000) / 800 : 0; in keene_cmd_main()
75 radio->buffer[0] = 0x00; in keene_cmd_main()
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/openbmc/linux/drivers/tty/serial/
H A Dip22zilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
31 #define BRG_TO_BPS(brg, freq) ((freq) / 2 / ((brg) + 2)) argument
32 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2) argument
66 #define RES_Tx_CRC 0x80 /* Reset Tx CRC Checker */
72 #define TxINT_ENAB 0x2 /* Tx Int Enable */
124 #define TxCRC_ENAB 0x1 /* Tx CRC Enable */
126 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
127 #define TxENAB 0x8 /* Tx Enable */
129 #define Tx5 0x0 /* Tx 5 bits (or less)/character */
130 #define Tx7 0x20 /* Tx 7 bits/character */
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H A Dzs.h1 /* SPDX-License-Identifier: GPL-2.0 */
38 * Per-SCC state for locking and the interrupt handler.
52 #define ZS_BRG_TO_BPS(brg, freq) ((freq) / 2 / ((brg) + 2)) argument
53 #define ZS_BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2) argument
87 #define RES_Tx_CRC 0x80 /* Reset Tx CRC Checker */
90 /* Write Register 1 (Tx/Rx/Ext Int Enable and WAIT/DMA Commands) */
92 #define TxINT_ENAB 0x2 /* Tx Int Enable */
142 #define TxCRC_ENAB 0x1 /* Tx CRC Enable */
144 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
145 #define TxENAB 0x8 /* Tx Enable */
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H A Dsunzilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
23 #define BRG_TO_BPS(brg, freq) ((freq) / 2 / ((brg) + 2)) argument
24 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2) argument
58 #define RES_Tx_CRC 0x80 /* Reset Tx CRC Checker */
64 #define TxINT_ENAB 0x2 /* Tx Int Enable */
116 #define TxCRC_ENAB 0x1 /* Tx CRC Enable */
118 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
119 #define TxENAB 0x8 /* Tx Enable */
121 #define Tx5 0x0 /* Tx 5 bits (or less)/character */
122 #define Tx7 0x20 /* Tx 7 bits/character */
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/openbmc/linux/drivers/media/radio/wl128x/
H A Dfmdrv_v4l2.c1 // SPDX-License-Identifier: GPL-2.0-only
29 /* -- V4L2 RADIO (/dev/radioX) device file operation interfaces --- */
43 return -EIO; in fm_v4l2_fops_read()
46 if (mutex_lock_interruptible(&fmdev->mutex)) in fm_v4l2_fops_read()
47 return -ERESTARTSYS; in fm_v4l2_fops_read()
67 mutex_unlock(&fmdev->mutex); in fm_v4l2_fops_read()
71 /* Write TX RDS data */
80 rds.text[sizeof(rds.text) - 1] = '\0'; in fm_v4l2_fops_write()
84 return -EFAULT; in fm_v4l2_fops_write()
87 if (mutex_lock_interruptible(&fmdev->mutex)) in fm_v4l2_fops_write()
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H A Dfmdrv_common.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * This sub-module of FM driver is common for FM RX and TX
7 * 1) Forming group of Channel-8 commands to perform particular
9 * one Channel-8 command to be sent to the chip).
10 * 2) Sending each Channel-8 command to the chip and reading
12 * 3) Managing TX and RX Queues and Tasklets.
14 * 5) Loading FM firmware to the chip (common, FM TX, and FM RX
64 static u32 radio_nr = -1;
115 /* TX power enable irq handler */
149 fm_irq_handle_power_enb, /* TX power enable irq handler */
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/openbmc/linux/drivers/ptp/
H A Dptp_clock.c1 // SPDX-License-Identifier: GPL-2.0-or-later
13 #include <linux/posix-clock.h>
39 return PTP_MAX_TIMESTAMPS - queue_cnt(q) - 1; in queue_free()
50 seconds = div_u64_rem(src->timestamp, 1000000000, &remainder); in enqueue_external_timestamp()
52 spin_lock_irqsave(&queue->lock, flags); in enqueue_external_timestamp()
54 dst = &queue->buf[queue->tail]; in enqueue_external_timestamp()
55 dst->index = src->index; in enqueue_external_timestamp()
56 dst->t.sec = seconds; in enqueue_external_timestamp()
57 dst->t.nsec = remainder; in enqueue_external_timestamp()
61 WRITE_ONCE(queue->head, (queue->head + 1) % PTP_MAX_TIMESTAMPS); in enqueue_external_timestamp()
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/openbmc/linux/drivers/net/can/peak_canfd/
H A Dpeak_pciefd_main.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Stephane Grosjean <s.grosjean@peak-system.com>
7 * Copyright (C) 2001-2006 PEAK System-Technik GmbH
22 MODULE_AUTHOR("Stephane Grosjean <s.grosjean@peak-system.com>");
23 MODULE_DESCRIPTION("Socket-CAN driver for PEAK PCAN PCIe/M.2 FD family cards");
30 #define PCAN_CPCIEFD_ID 0x0014 /* for Compact-PCI Serial slot cards */
31 #define PCAN_PCIE104FD_ID 0x0017 /* for PCIe-104 Express slot cards */
32 #define PCAN_MINIPCIEFD_ID 0x0018 /* for mini-PCIe slot cards */
59 /* CAN-FD channel addresses */
64 /* CAN-FD channel registers */
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/openbmc/linux/drivers/net/wireless/ath/ath5k/
H A Dphy.c2 * Copyright (c) 2004-2007 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2009 Nick Kossifidis <mickflemm@gmail.com>
4 * Copyright (c) 2007-2008 Jiri Slaby <jirislaby@gmail.com>
5 * Copyright (c) 2008-2009 Felix Fietkau <nbd@openwrt.org>
42 * Here we handle the low-level functions related to baseband
48 * - Channel setting/switching
50 * - Automatic Gain Control (AGC) calibration
52 * - Noise Floor calibration
54 * - I/Q imbalance calibration (QAM correction)
56 * - Calibration due to thermal changes (gain_F)
[all …]
/openbmc/linux/drivers/i2c/busses/
H A Di2c-cpm.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 * (C) 2000-2001 Felix Domke (tmbinc@gmx.net), Gillem (htoa@gmx.net)
15 * Converted to of_platform_device. Renamed to i2c-cpm.c.
28 #include <linux/dma-mapping.h>
51 ushort tbase; /* Tx Buffer descriptor base address */
53 u_char tfcr; /* Tx function code */
62 ushort tbptr; /* Tx Buffer descriptor pointer */
104 int freq; member
125 i2c_reg = cpm->i2c_reg; in cpm_i2c_interrupt()
128 i = in_8(&i2c_reg->i2cer); in cpm_i2c_interrupt()
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