1 // SPDX-License-Identifier: GPL-2.0
239 	readl_poll_timeout(priv->hhi_base + HHI_HDMI_PLL_CNTL, val,  in meson_venci_cvbs_clock_config()
250 			VCLK2_DIV_MASK, (55 - 1));  in meson_venci_cvbs_clock_config()
290 /* PLL	O1 O2 O3 VP DV     EN TX */
414 		readl_poll_timeout(priv->hhi_base + HHI_HDMI_PLL_CNTL, val,  in meson_hdmi_pll_set_params()
432 		readl_poll_timeout(priv->hhi_base + HHI_HDMI_PLL_CNTL, val,  in meson_hdmi_pll_set_params()
466 	/* The GXBB PLL has a /2 pre-multiplier */  in meson_hdmi_pll_get_m()
485 	/* The GXBB PLL has a /2 pre-multiplier and a larger FRAC width */  in meson_hdmi_pll_get_frac()
500 	frac -= frac_m;  in meson_hdmi_pll_get_frac()
502 	return min((u16)frac, (u16)(frac_max - 1));  in meson_hdmi_pll_get_frac()
528 				       unsigned int freq,  in meson_hdmi_pll_find_params()  argument
535 		*m = meson_hdmi_pll_get_m(priv, freq * *od);  in meson_hdmi_pll_find_params()
538 		*frac = meson_hdmi_pll_get_frac(priv, *m, freq * *od);  in meson_hdmi_pll_find_params()
541 		      freq, *m, *frac, *od);  in meson_hdmi_pll_find_params()
552 				   unsigned int freq)  in meson_vclk_dmt_supported_freq()  argument
557 	freq *= 10;  in meson_vclk_dmt_supported_freq()
559 	if (meson_hdmi_pll_find_params(priv, freq, &m, &frac, &od))  in meson_vclk_dmt_supported_freq()
589 	printf("Fatal, unable to find parameters for PLL freq %d\n",  in meson_hdmi_pll_generic_set()
600 	/* Set HDMI-TX sys clock */  in meson_vclk_set()
651 			VCLK_DIV_MASK, vclk_div - 1);  in meson_vclk_set()
653 	/* Set HDMI-TX source */  in meson_vclk_set()
660 		/* select vclk_div1 for HDMI-TX */  in meson_vclk_set()
669 		/* select vclk_div2 for HDMI-TX */  in meson_vclk_set()
679 		/* select vclk_div4 for HDMI-TX */  in meson_vclk_set()
689 		/* select vclk_div6 for HDMI-TX */  in meson_vclk_set()
699 		/* select vclk_div12 for HDMI-TX */  in meson_vclk_set()
806 	unsigned int freq;  in meson_vclk_setup()  local
815 		 * - automatic PLL freq + OD management  in meson_vclk_setup()
816 		 * - vid_pll_div = VID_PLL_DIV_5  in meson_vclk_setup()
817 		 * - vclk_div = 2  in meson_vclk_setup()
818 		 * - hdmi_tx_div = 1  in meson_vclk_setup()
819 		 * - venc_div = 1  in meson_vclk_setup()
820 		 * - encp encoder  in meson_vclk_setup()
831 		printf("Fatal Error, invalid HDMI-TX freq %d\n",  in meson_vclk_setup()
839 		printf("Fatal Error, invalid HDMI venc freq %d\n",  in meson_vclk_setup()
847 			freq = MESON_VCLK_HDMI_ENCI_54000;  in meson_vclk_setup()
849 			freq = MESON_VCLK_HDMI_DDR_54000;  in meson_vclk_setup()
852 		freq = MESON_VCLK_HDMI_74250;  in meson_vclk_setup()
856 			freq = MESON_VCLK_HDMI_DDR_148500;  in meson_vclk_setup()
858 			freq = MESON_VCLK_HDMI_148500;  in meson_vclk_setup()
861 		freq = MESON_VCLK_HDMI_297000;  in meson_vclk_setup()
864 		freq = MESON_VCLK_HDMI_594000;  in meson_vclk_setup()
867 		printf("Fatal Error, invalid HDMI vclk freq %d\n",  in meson_vclk_setup()
872 	meson_vclk_set(priv, params[freq].pll_base_freq,  in meson_vclk_setup()
873 		       params[freq].pll_od1, params[freq].pll_od2,  in meson_vclk_setup()
874 		       params[freq].pll_od3, params[freq].vid_pll_div,  in meson_vclk_setup()
875 		       params[freq].vclk_div, hdmi_tx_div, venc_div,  in meson_vclk_setup()
889 	vclk_freq = mode->pixelclock.typ / 1000;  in meson_vpu_setup_vclk()