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/openbmc/u-boot/doc/device-tree-bindings/adc/
H A Dst,stm32-adc.txt26 "st,stm32h7-adc-core"
30 and stm32h7 share a common ADC interrupt line. stm32mp1 has two separate
35 It's optional on stm32h7.
38 It's required on stm32h7.
58 "st,stm32h7-adc"
67 It can have up to 16 channels on stm32f4 or 20 channels on stm32h7, numbered
71 instead of single-ended (e.g. stm32h7). List here positive and negative
73 from 0 to 19 on stm32h7)
88 * can be 8, 10, 12, 14 or 16 on stm32h7
133 compatible = "st,stm32h7-adc-core";
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32h743.dtsi44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
110 compatible = "st,stm32h7-spi";
122 compatible = "st,stm32h7-spi";
131 compatible = "st,stm32h7-uart";
139 compatible = "st,stm32h7-uart";
147 compatible = "st,stm32h7-uart";
191 compatible = "st,stm32h7-dac-core";
215 compatible = "st,stm32h7-uart";
225 compatible = "st,stm32h7-spi";
[all …]
H A Dstm32mp131.dtsi134 compatible = "st,stm32h7-timer-trigger";
170 compatible = "st,stm32h7-timer-trigger";
204 compatible = "st,stm32h7-timer-trigger";
240 compatible = "st,stm32h7-timer-trigger";
265 compatible = "st,stm32h7-timer-trigger";
285 compatible = "st,stm32h7-timer-trigger";
326 compatible = "st,stm32h7-i2s";
337 compatible = "st,stm32h7-spi";
351 compatible = "st,stm32h7-i2s";
362 compatible = "st,stm32h7-spi";
[all …]
H A Dstm32mp151.dtsi150 compatible = "st,stm32h7-timer-trigger";
186 compatible = "st,stm32h7-timer-trigger";
220 compatible = "st,stm32h7-timer-trigger";
256 compatible = "st,stm32h7-timer-trigger";
281 compatible = "st,stm32h7-timer-trigger";
301 compatible = "st,stm32h7-timer-trigger";
325 compatible = "st,stm32h7-timer-trigger";
349 compatible = "st,stm32h7-timer-trigger";
373 compatible = "st,stm32h7-timer-trigger";
411 compatible = "st,stm32h7-spi";
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dstm32mp157c.dtsi151 compatible = "st,stm32h7-timer-trigger";
172 compatible = "st,stm32h7-timer-trigger";
193 compatible = "st,stm32h7-timer-trigger";
214 compatible = "st,stm32h7-timer-trigger";
230 compatible = "st,stm32h7-timer-trigger";
246 compatible = "st,stm32h7-timer-trigger";
267 compatible = "st,stm32h7-timer-trigger";
288 compatible = "st,stm32h7-timer-trigger";
309 compatible = "st,stm32h7-timer-trigger";
343 compatible = "st,stm32h7-uart";
[all …]
H A Dstm32h743.dtsi45 #include <dt-bindings/clock/stm32h7-clks.h>
46 #include <dt-bindings/mfd/stm32h7-rcc.h>
80 compatible = "st,stm32h7-uart";
88 compatible = "st,stm32h7-uart";
108 compatible = "st,stm32h7-fmc";
/openbmc/linux/Documentation/devicetree/bindings/iio/adc/
H A Dst,stm32-adc.yaml28 - st,stm32h7-adc-core
38 - stm32f4 and stm32h7 share a common ADC interrupt line.
52 It's optional on stm32h7 and stm32mp1.
55 It's required on stm32h7 and stm32mp1.
72 analog input switches on stm32h7 and stm32mp1.
130 const: st,stm32h7-adc-core
238 - st,stm32h7-adc
284 - can be 8, 10, 12, 14 or 16 on stm32h7 and stm32mp1
291 - 20 channels, numbered from 0 to 19 (for in0..in19) on stm32h7 and
299 be configured as differential instead of single-ended on stm32h7 and
[all …]
H A Dst,stm32-dfsdm-adc.yaml21 up to 4 filters on stm32h7 or 6 filters on stm32mp1.
28 - st,stm32h7-dfsdm
94 On stm32h7 and stm32mp1:
235 - st,stm32h7-dfsdm-dai
255 const: st,stm32h7-dfsdm
307 compatible = "st,stm32h7-dfsdm-dai";
/openbmc/u-boot/arch/arm/mach-stm32/
H A DKconfig57 config STM32H7 config
58 bool "stm32h7 family"
77 source "arch/arm/mach-stm32/stm32h7/Kconfig"
/openbmc/u-boot/drivers/adc/
H A Dstm32-adc-core.c14 /* STM32H7 - common registers for all ADC instances */
27 * struct stm32h7_adc_ck_spec - specification for stm32h7 adc clock
65 /* stm32h7 bus clock is common for all ADC instances (mandatory) */ in stm32h7_adc_clk_sel()
72 * stm32h7 can use either 'bus' or 'adc' clock for analog circuitry. in stm32h7_adc_clk_sel()
198 { .compatible = "st,stm32h7-adc-core" },
H A Dstm32-adc.c15 /* STM32H7 - Registers for each ADC instance */
46 /* BOOST bit must be set on STM32H7 when ADC clock is above 20MHz */
243 { .compatible = "st,stm32h7-adc",
/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dst,stm32-spi.yaml35 - st,stm32h7-spi
70 Only for STM32H7, (Master Inter-Data Idleness) minimum time
89 compatible = "st,stm32h7-spi";
/openbmc/u-boot/doc/device-tree-bindings/clock/
H A Dst,stm32h7-rcc.txt1 STMicroelectronics STM32H7 Reset and Clock Controller
65 STM32H7 PLL
118 dt-bindings/clock/stm32h7-clks.h header and can be used in device
145 All available preprocessor macros for reset are defined dt-bindings//mfd/stm32h7-rcc.h
/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Dst,stm32-dmamux.yaml20 const: st,stm32h7-dmamux
44 compatible = "st,stm32h7-dmamux";
H A Dst,stm32-mdma.yaml63 const: st,stm32h7-mdma
95 compatible = "st,stm32h7-mdma";
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dst,stm32-spdifrx.yaml22 - st,stm32h7-spdifrx
70 compatible = "st,stm32h7-spdifrx";
H A Dst,stm32-i2s.yaml22 - st,stm32h7-i2s
85 compatible = "st,stm32h7-i2s";
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dst,stm32-exti.yaml19 - st,stm32h7-exti
71 - st,stm32h7-exti
/openbmc/linux/Documentation/devicetree/bindings/iio/dac/
H A Dst,stm32-dac.yaml24 - st,stm32h7-dac-core
89 compatible = "st,stm32h7-dac-core";
/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Dst,stm32-uart.yaml17 - st,stm32h7-uart
114 compatible = "st,stm32h7-uart";
/openbmc/linux/Documentation/devicetree/bindings/rtc/
H A Dst,stm32-rtc.yaml16 - st,stm32h7-rtc
77 const: st,stm32h7-rtc
/openbmc/linux/drivers/regulator/
H A Dstm32-booster.c13 /* STM32H7 SYSCFG register */
106 .compatible = "st,stm32h7-booster",
/openbmc/u-boot/board/st/stm32h743-eval/
H A DKconfig13 default "stm32h7"
/openbmc/u-boot/board/st/stm32h743-disco/
H A DKconfig13 default "stm32h7"
/openbmc/u-boot/arch/arm/mach-stm32/stm32h7/
H A DKconfig1 if STM32H7

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