1ef32b63bSBenjamin Gaignard# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2ef32b63bSBenjamin Gaignard%YAML 1.2 3ef32b63bSBenjamin Gaignard--- 4ef32b63bSBenjamin Gaignard$id: http://devicetree.org/schemas/spi/st,stm32-spi.yaml# 5ef32b63bSBenjamin Gaignard$schema: http://devicetree.org/meta-schemas/core.yaml# 6ef32b63bSBenjamin Gaignard 784e85359SKrzysztof Kozlowskititle: STMicroelectronics STM32 SPI Controller 8ef32b63bSBenjamin Gaignard 9ef32b63bSBenjamin Gaignarddescription: | 10ef32b63bSBenjamin Gaignard The STM32 SPI controller is used to communicate with external devices using 11ef32b63bSBenjamin Gaignard the Serial Peripheral Interface. It supports full-duplex, half-duplex and 12ef32b63bSBenjamin Gaignard simplex synchronous serial communication with external devices. It supports 13ef32b63bSBenjamin Gaignard from 4 to 32-bit data size. 14ef32b63bSBenjamin Gaignard 15ef32b63bSBenjamin Gaignardmaintainers: 16f4eedebdSPatrice Chotard - Erwan Leray <erwan.leray@foss.st.com> 17f4eedebdSPatrice Chotard - Fabrice Gasnier <fabrice.gasnier@foss.st.com> 18ef32b63bSBenjamin Gaignard 19ef32b63bSBenjamin GaignardallOf: 20*99a7fa0eSKrzysztof Kozlowski - $ref: spi-controller.yaml# 21ef32b63bSBenjamin Gaignard - if: 22ef32b63bSBenjamin Gaignard properties: 23ef32b63bSBenjamin Gaignard compatible: 24ef32b63bSBenjamin Gaignard contains: 25ef32b63bSBenjamin Gaignard const: st,stm32f4-spi 26ef32b63bSBenjamin Gaignard 27ef32b63bSBenjamin Gaignard then: 28ef32b63bSBenjamin Gaignard properties: 29ef32b63bSBenjamin Gaignard st,spi-midi-ns: false 30ef32b63bSBenjamin Gaignard 31ef32b63bSBenjamin Gaignardproperties: 32ef32b63bSBenjamin Gaignard compatible: 33ef32b63bSBenjamin Gaignard enum: 34ef32b63bSBenjamin Gaignard - st,stm32f4-spi 35ef32b63bSBenjamin Gaignard - st,stm32h7-spi 36ef32b63bSBenjamin Gaignard 37ef32b63bSBenjamin Gaignard reg: 38ef32b63bSBenjamin Gaignard maxItems: 1 39ef32b63bSBenjamin Gaignard 40ef32b63bSBenjamin Gaignard clocks: 41ef32b63bSBenjamin Gaignard maxItems: 1 42ef32b63bSBenjamin Gaignard 43ef32b63bSBenjamin Gaignard interrupts: 44ef32b63bSBenjamin Gaignard maxItems: 1 45ef32b63bSBenjamin Gaignard 46ef32b63bSBenjamin Gaignard resets: 47ef32b63bSBenjamin Gaignard maxItems: 1 48ef32b63bSBenjamin Gaignard 49ef32b63bSBenjamin Gaignard dmas: 50ef32b63bSBenjamin Gaignard description: | 51ef32b63bSBenjamin Gaignard DMA specifiers for tx and rx dma. DMA fifo mode must be used. See 52a40df28cSMauro Carvalho Chehab the STM32 DMA bindings Documentation/devicetree/bindings/dma/st,stm32-dma.yaml. 53ef32b63bSBenjamin Gaignard items: 54ef32b63bSBenjamin Gaignard - description: rx DMA channel 55ef32b63bSBenjamin Gaignard - description: tx DMA channel 56ef32b63bSBenjamin Gaignard 57ef32b63bSBenjamin Gaignard dma-names: 58ef32b63bSBenjamin Gaignard items: 59ef32b63bSBenjamin Gaignard - const: rx 60ef32b63bSBenjamin Gaignard - const: tx 61ef32b63bSBenjamin Gaignard 62ef32b63bSBenjamin GaignardpatternProperties: 63ef32b63bSBenjamin Gaignard "^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-f]+$": 64ef32b63bSBenjamin Gaignard type: object 65ef32b63bSBenjamin Gaignard # SPI slave nodes must be children of the SPI master node and can 66ef32b63bSBenjamin Gaignard # contain the following properties. 67ef32b63bSBenjamin Gaignard properties: 68ef32b63bSBenjamin Gaignard st,spi-midi-ns: 69ef32b63bSBenjamin Gaignard description: | 70ef32b63bSBenjamin Gaignard Only for STM32H7, (Master Inter-Data Idleness) minimum time 71ef32b63bSBenjamin Gaignard delay in nanoseconds inserted between two consecutive data frames. 72ef32b63bSBenjamin Gaignard 73ef32b63bSBenjamin Gaignardrequired: 74ef32b63bSBenjamin Gaignard - compatible 75ef32b63bSBenjamin Gaignard - reg 76ef32b63bSBenjamin Gaignard - clocks 77ef32b63bSBenjamin Gaignard - interrupts 78ef32b63bSBenjamin Gaignard 796fdc6e23SRob HerringunevaluatedProperties: false 806fdc6e23SRob Herring 81ef32b63bSBenjamin Gaignardexamples: 82ef32b63bSBenjamin Gaignard - | 83ef32b63bSBenjamin Gaignard #include <dt-bindings/interrupt-controller/arm-gic.h> 84ef32b63bSBenjamin Gaignard #include <dt-bindings/clock/stm32mp1-clks.h> 85ef32b63bSBenjamin Gaignard #include <dt-bindings/reset/stm32mp1-resets.h> 86ef32b63bSBenjamin Gaignard spi@4000b000 { 87ef32b63bSBenjamin Gaignard #address-cells = <1>; 88ef32b63bSBenjamin Gaignard #size-cells = <0>; 89ef32b63bSBenjamin Gaignard compatible = "st,stm32h7-spi"; 90ef32b63bSBenjamin Gaignard reg = <0x4000b000 0x400>; 91ef32b63bSBenjamin Gaignard interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 92ef32b63bSBenjamin Gaignard clocks = <&rcc SPI2_K>; 93ef32b63bSBenjamin Gaignard resets = <&rcc SPI2_R>; 94ef32b63bSBenjamin Gaignard dmas = <&dmamux1 0 39 0x400 0x05>, 95ef32b63bSBenjamin Gaignard <&dmamux1 1 40 0x400 0x05>; 96ef32b63bSBenjamin Gaignard dma-names = "rx", "tx"; 97ef32b63bSBenjamin Gaignard cs-gpios = <&gpioa 11 0>; 98ef32b63bSBenjamin Gaignard }; 99ef32b63bSBenjamin Gaignard 100ef32b63bSBenjamin Gaignard... 101