xref: /openbmc/u-boot/arch/arm/dts/stm32h743.dtsi (revision 002e9108)
1d983a0f0SPatrice Chotard/*
2d983a0f0SPatrice Chotard * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
3d983a0f0SPatrice Chotard *
4d983a0f0SPatrice Chotard * This file is dual-licensed: you can use it either under the terms
5d983a0f0SPatrice Chotard * of the GPL or the X11 license, at your option. Note that this dual
6d983a0f0SPatrice Chotard * licensing only applies to this file, and not this project as a
7d983a0f0SPatrice Chotard * whole.
8d983a0f0SPatrice Chotard *
9d983a0f0SPatrice Chotard *  a) This file is free software; you can redistribute it and/or
10d983a0f0SPatrice Chotard *     modify it under the terms of the GNU General Public License as
11d983a0f0SPatrice Chotard *     published by the Free Software Foundation; either version 2 of the
12d983a0f0SPatrice Chotard *     License, or (at your option) any later version.
13d983a0f0SPatrice Chotard *
14d983a0f0SPatrice Chotard *     This file is distributed in the hope that it will be useful,
15d983a0f0SPatrice Chotard *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16d983a0f0SPatrice Chotard *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17d983a0f0SPatrice Chotard *     GNU General Public License for more details.
18d983a0f0SPatrice Chotard *
19d983a0f0SPatrice Chotard * Or, alternatively,
20d983a0f0SPatrice Chotard *
21d983a0f0SPatrice Chotard *  b) Permission is hereby granted, free of charge, to any person
22d983a0f0SPatrice Chotard *     obtaining a copy of this software and associated documentation
23d983a0f0SPatrice Chotard *     files (the "Software"), to deal in the Software without
24d983a0f0SPatrice Chotard *     restriction, including without limitation the rights to use,
25d983a0f0SPatrice Chotard *     copy, modify, merge, publish, distribute, sublicense, and/or
26d983a0f0SPatrice Chotard *     sell copies of the Software, and to permit persons to whom the
27d983a0f0SPatrice Chotard *     Software is furnished to do so, subject to the following
28d983a0f0SPatrice Chotard *     conditions:
29d983a0f0SPatrice Chotard *
30d983a0f0SPatrice Chotard *     The above copyright notice and this permission notice shall be
31d983a0f0SPatrice Chotard *     included in all copies or substantial portions of the Software.
32d983a0f0SPatrice Chotard *
33d983a0f0SPatrice Chotard *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34d983a0f0SPatrice Chotard *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35d983a0f0SPatrice Chotard *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36d983a0f0SPatrice Chotard *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37d983a0f0SPatrice Chotard *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38d983a0f0SPatrice Chotard *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39d983a0f0SPatrice Chotard *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40d983a0f0SPatrice Chotard *     OTHER DEALINGS IN THE SOFTWARE.
41d983a0f0SPatrice Chotard */
42d983a0f0SPatrice Chotard
43d983a0f0SPatrice Chotard#include "skeleton.dtsi"
44d983a0f0SPatrice Chotard#include "armv7-m.dtsi"
45a1e384b4SPatrice Chotard#include <dt-bindings/clock/stm32h7-clks.h>
46*eccac3e1SPatrice Chotard#include <dt-bindings/mfd/stm32h7-rcc.h>
47d983a0f0SPatrice Chotard
48d983a0f0SPatrice Chotard/ {
49d983a0f0SPatrice Chotard	clocks {
50d983a0f0SPatrice Chotard		clk_hse: clk-hse {
51d983a0f0SPatrice Chotard			#clock-cells = <0>;
52d983a0f0SPatrice Chotard			compatible = "fixed-clock";
53a1e384b4SPatrice Chotard			clock-frequency = <25000000>;
54d983a0f0SPatrice Chotard		};
55d983a0f0SPatrice Chotard
56a1e384b4SPatrice Chotard		clk_lse: clk-lse {
57d983a0f0SPatrice Chotard			#clock-cells = <0>;
58d983a0f0SPatrice Chotard			compatible = "fixed-clock";
59a1e384b4SPatrice Chotard			clock-frequency = <32768>;
60a1e384b4SPatrice Chotard		};
61a1e384b4SPatrice Chotard
62a1e384b4SPatrice Chotard		clk_i2s: i2s_ckin {
63a1e384b4SPatrice Chotard			#clock-cells = <0>;
64a1e384b4SPatrice Chotard			compatible = "fixed-clock";
65a1e384b4SPatrice Chotard			clock-frequency = <0>;
66d983a0f0SPatrice Chotard		};
67d983a0f0SPatrice Chotard	};
68d983a0f0SPatrice Chotard
69d983a0f0SPatrice Chotard	soc {
70a1e384b4SPatrice Chotard		rcc: rcc@58024400 {
71a1e384b4SPatrice Chotard			#clock-cells = <1>;
72a1e384b4SPatrice Chotard			#reset-cells = <1>;
73a1e384b4SPatrice Chotard			compatible = "st,stm32h743-rcc", "st,stm32-rcc";
74a1e384b4SPatrice Chotard			reg = <0x58024400 0x400>;
75a1e384b4SPatrice Chotard			clocks = <&clk_hse>, <&clk_lse>, <&clk_i2s>, <&clk_hsi>, <&clk_csi>;
76a1e384b4SPatrice Chotard			st,syscfg = <&pwrcfg>;
77a1e384b4SPatrice Chotard		};
78a1e384b4SPatrice Chotard
79d983a0f0SPatrice Chotard		usart1: serial@40011000 {
8075d5853fSPatrice Chotard			compatible = "st,stm32h7-uart";
81d983a0f0SPatrice Chotard			reg = <0x40011000 0x400>;
82d983a0f0SPatrice Chotard			interrupts = <37>;
83d983a0f0SPatrice Chotard			status = "disabled";
84a1e384b4SPatrice Chotard			clocks = <&rcc USART1_CK>;
85d983a0f0SPatrice Chotard		};
86d983a0f0SPatrice Chotard
87d983a0f0SPatrice Chotard		usart2: serial@40004400 {
8875d5853fSPatrice Chotard			compatible = "st,stm32h7-uart";
89d983a0f0SPatrice Chotard			reg = <0x40004400 0x400>;
90d983a0f0SPatrice Chotard			interrupts = <38>;
91d983a0f0SPatrice Chotard			status = "disabled";
92a1e384b4SPatrice Chotard			clocks = <&rcc USART2_CK>;
93d983a0f0SPatrice Chotard		};
94d983a0f0SPatrice Chotard
95d983a0f0SPatrice Chotard		timer5: timer@40000c00 {
96d983a0f0SPatrice Chotard			compatible = "st,stm32-timer";
97d983a0f0SPatrice Chotard			reg = <0x40000c00 0x400>;
98d983a0f0SPatrice Chotard			interrupts = <50>;
99a1e384b4SPatrice Chotard			clocks = <&rcc TIM5_CK>;
100a1e384b4SPatrice Chotard		};
101a1e384b4SPatrice Chotard
102a1e384b4SPatrice Chotard		pwrcfg: power-config@58024800 {
103a1e384b4SPatrice Chotard			compatible = "syscon";
104a1e384b4SPatrice Chotard			reg = <0x58024800 0x400>;
105a1e384b4SPatrice Chotard		};
106a1e384b4SPatrice Chotard
107a1e384b4SPatrice Chotard		fmc: fmc@52004000 {
108a1e384b4SPatrice Chotard			compatible = "st,stm32h7-fmc";
109a1e384b4SPatrice Chotard			reg = <0x52004000 0x1000>;
110a1e384b4SPatrice Chotard			clocks = <&rcc FMC_CK>;
111a1e384b4SPatrice Chotard		};
112a1e384b4SPatrice Chotard
113a1e384b4SPatrice Chotard		clk_hsi: clk-hsi {
114a1e384b4SPatrice Chotard			#clock-cells = <0>;
115a1e384b4SPatrice Chotard			compatible = "fixed-clock";
116a1e384b4SPatrice Chotard			clock-frequency = <64000000>;
117a1e384b4SPatrice Chotard		};
118a1e384b4SPatrice Chotard
119a1e384b4SPatrice Chotard		clk_csi: clk-csi {
120a1e384b4SPatrice Chotard			#clock-cells = <0>;
121a1e384b4SPatrice Chotard			compatible = "fixed-clock";
122a1e384b4SPatrice Chotard			clock-frequency = <4000000>;
123d983a0f0SPatrice Chotard		};
124*eccac3e1SPatrice Chotard
125*eccac3e1SPatrice Chotard		sdmmc1: sdmmc@52007000 {
126*eccac3e1SPatrice Chotard			compatible = "st,stm32-sdmmc2";
127*eccac3e1SPatrice Chotard			reg = <0x52007000 0x1000>;
128*eccac3e1SPatrice Chotard			interrupts = <49>;
129*eccac3e1SPatrice Chotard			clocks = <&rcc SDMMC1_CK>;
130*eccac3e1SPatrice Chotard			resets = <&rcc STM32H7_AHB3_RESET(SDMMC1)>;
131*eccac3e1SPatrice Chotard			st,idma = <1>;
132*eccac3e1SPatrice Chotard			cap-sd-highspeed;
133*eccac3e1SPatrice Chotard			cap-mmc-highspeed;
134*eccac3e1SPatrice Chotard			status = "disabled";
135*eccac3e1SPatrice Chotard		};
136d983a0f0SPatrice Chotard	};
137d983a0f0SPatrice Chotard};
138d983a0f0SPatrice Chotard
139d983a0f0SPatrice Chotard&systick {
140d983a0f0SPatrice Chotard	clock-frequency = <250000000>;
141d983a0f0SPatrice Chotard	status = "okay";
142d983a0f0SPatrice Chotard};
143