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/openbmc/linux/Documentation/devicetree/bindings/ata/
H A Dnvidia,tegra-ahci.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/nvidia,tegra-ahci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra AHCI SATA Controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra124-ahci
17 - nvidia,tegra132-ahci
18 - nvidia,tegra210-ahci
[all …]
/openbmc/linux/drivers/ata/
H A Dahci_tegra.c1 // SPDX-License-Identifier: GPL-2.0-only
25 #define DRV_NAME "tegra-ahci"
184 struct tegra_ahci_priv *tegra = hpriv->plat_data; in tegra_ahci_handle_quirks()
187 if (tegra->sata_aux_regs && !tegra->soc->supports_devslp) { in tegra_ahci_handle_quirks()
188 val = readl(tegra->sata_aux_regs + SATA_AUX_MISC_CNTL_1_0); in tegra_ahci_handle_quirks()
190 writel(val, tegra->sata_aux_regs + SATA_AUX_MISC_CNTL_1_0); in tegra_ahci_handle_quirks()
196 struct tegra_ahci_priv *tegra = hpriv->plat_data; in tegra124_ahci_init()
208 writel(BIT(0), tegra->sata_regs + SCFG_OFFSET + T_SATA0_INDEX); in tegra124_ahci_init()
210 val = readl(tegra->sata_regs + in tegra124_ahci_init()
216 writel(val, tegra->sata_regs + SCFG_OFFSET + in tegra124_ahci_init()
[all …]
H A Dahci.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * ahci.h - Common AHCI SATA definitions and declarations
6 * Please ALWAYS copy linux-ide@vger.kernel.org
9 * Copyright 2004-2005 Red Hat, Inc.
12 * as Documentation/driver-api/libata.rst
80 HOST_RESET = BIT(0), /* reset controller; self-clear */
86 HOST_CAP_SXS = BIT(5), /* Supports External SATA */
92 HOST_CAP_FBS = BIT(16), /* FIS-based switching support */
98 HOST_CAP_SSS = BIT(27), /* Staggered Spin-up */
102 HOST_CAP_64 = BIT(31), /* PCI DAC (64-bit DMA) support */
[all …]
H A Dlibata-acpi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * libata-acpi.c
4 * Provides ACPI support for PATA/SATA.
26 …fermode, 0x2=lock/freeze lock, 0x4=DIPM, 0x8=FPDMA non-zero offset, 0x10=FPDMA DMA Setup FIS auto-…
33 u8 tf[REGS_PER_GTF]; /* regs. 0x1f1 - 0x1f7 */
38 kfree(dev->gtf_cache); in ata_acpi_clear_gtf()
39 dev->gtf_cache = NULL; in ata_acpi_clear_gtf()
50 #define ata_hotplug_data(context) (container_of((context), struct ata_acpi_hotplug_context, hp)->da…
53 * ata_dev_acpi_handle - provide the acpi_handle for an ata_device
62 return dev->flags & ATA_DFLAG_ACPI_DISABLED ? in ata_dev_acpi_handle()
[all …]
H A Dsata_nv.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sata_nv.c - NVIDIA nForce SATA
9 * as Documentation/driver-api/libata.rst
12 * This driver programs the NVIDIA SATA controller in a similar
14 * NV-specific details such as register offsets, SATA phy location,
19 * This allows the use of NCQ. Non-DMA-mapped ATA commands are still
84 NV_ADMA_SGTBL_LEN = (1024 - NV_ADMA_CPB_SZ) /
188 /* ADMA Physical Region Descriptor - one SG segment */
199 WNB = (1 << 14), /* wait-not-BSY */
219 __le16 reserved2; /* 6-7 */
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/openbmc/u-boot/include/
H A Dahci.h1 /* SPDX-License-Identifier: GPL-2.0+ */
39 #define HOST_RESET (1 << 0) /* reset controller; self-clear */
43 /* Registers for each SATA port */
54 #define PORT_SCR 0x28 /* SATA phy register block */
55 #define PORT_SCR_STAT 0x28 /* SATA phy register: SStatus */
56 #define PORT_SCR_CTL 0x2c /* SATA phy register: SControl */
57 #define PORT_SCR_ERR 0x30 /* SATA phy register: SError */
58 #define PORT_SCR_ACT 0x34 /* SATA phy register: SActive */
65 #define PORT_IRQ_COLD_PRES (1 << 31) /* cold presence detect */
70 #define PORT_IRQ_IF_NONFATAL (1 << 26) /* interface non-fatal error */
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/openbmc/qemu/hw/ide/
H A Dahci-internal.h29 #include "ide-internal.h"
75 #define HOST_CTL_RESET (1 << 0) /* reset controller; self-clear */
83 #define HOST_CAP_SSS (1 << 27) /* Staggered Spin-up */
85 #define HOST_CAP_64 (1U << 31) /* PCI DAC (64-bit DMA) support */
87 /* registers for each SATA port */
99 AHCI_PORT_REG_SCR_STAT = 10, /* PxSSTS: SATA phy register: SStatus */
100 AHCI_PORT_REG_SCR_CTL = 11, /* PxSCTL: SATA phy register: SControl */
101 AHCI_PORT_REG_SCR_ERR = 12, /* PxSERR: SATA phy register: SError */
102 AHCI_PORT_REG_SCR_ACT = 13, /* PxSACT: SATA phy register: SActive */
104 AHCI_PORT_REG_SCR_NOTIF = 15, /* PxSNTF: SATA phy register: SNotification */
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dtegra124.dtsi1 #include <dt-bindings/clock/tegra124-car.h>
2 #include <dt-bindings/gpio/tegra-gpio.h>
3 #include <dt-bindings/memory/tegra124-mc.h>
4 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/tegra124-car.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
14 interrupt-parent = <&lic>;
17 pcie-controller@01003000 {
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/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra124.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/tegra124-car.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
11 #include "tegra124-peripherals-opp.dtsi"
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/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra132.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
11 #include "tegra132-peripherals-opp.dtsi"
[all …]
H A Dtegra210.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra210-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra210-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/reset/tegra210-car.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/tegra124-soctherm.h>
10 #include <dt-bindings/soc/tegra-pmc.h>
[all …]
H A Dtegra186.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra186-clock.h>
3 #include <dt-bindings/gpio/tegra186-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/memory/tegra186-mc.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
8 #include <dt-bindings/power/tegra186-powergate.h>
9 #include <dt-bindings/reset/tegra186-reset.h>
10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
[all …]
/openbmc/u-boot/board/freescale/b4860qds/
H A Db4860qds.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2011-2012 Freescale Semiconductor, Inc.
39 struct cpu_type *cpu = gd->arch.cpu; in checkboard()
44 printf("Board: %sQDS, ", cpu->name); in checkboard()
118 return -1; in read_voltage()
180 ret = -1; in adjust_vdd()
185 fusesr = in_be32(&gur->dcfg_fusesr); in adjust_vdd()
221 ret = -1; in adjust_vdd()
229 ret = -1; in adjust_vdd()
244 no need to re-set */ in adjust_vdd()
[all …]
/openbmc/u-boot/arch/arm/mach-sunxi/
H A DKconfig4 default "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" if !ARM64
87 ---help---
100 ---help---
102 as the original A10 (mach-sun4i).
106 ---help---
113 ---help---
116 not have official open-source DRAM initialization code, but can
122 ---help---
124 have only 16-bit memory buswidth.
128 ---help---
[all …]
/openbmc/ipmitool/doc/
H A Dipmitool.13 ipmitool \- utility for controlling IPMI\-enabled devices
6 ipmitool [ <options> ] <command> [ <sub-commands and sub-options> ]
8 <options> := [ <general-options> | <conditional-opts> ]
13 <general-options> := [ -h | -V | -v | -I <interface> | -H <address> |
14 -d <N> | -p <port> | -c | -U <username> |
15 -L <privlvl> | -l <lun> | -m <local_address> |
16 -N <sec> | -R <count> | <password-option> |
17 <oem-option> | <bridge-options> ]
19 <conditional-opts> := [ <lan-options> | <lanplus-options> |
20 <command-options> ]
[all …]
/openbmc/ipmitool/lib/
H A Dipmi_strings.c22 * PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED.
42 { IPMI_OEM_HP, "Hewlett-Packard" },
106 { IPMI_OEM_KONTRON,6006, "DT-64" },
125 { IPMI_OEM_ADVANTECH, 0x3393, "MIC-3393" },
126 { IPMI_OEM_ADVANTECH, 0x3395, "MIC-3395" },
127 { IPMI_OEM_ADVANTECH, 0x3396, "MIC-3396" },
128 { IPMI_OEM_ADVANTECH, 0x5302, "MIC-5302" },
129 { IPMI_OEM_ADVANTECH, 0x5304, "MIC-5304" },
130 { IPMI_OEM_ADVANTECH, 0x5320, "MIC-5320" },
131 { IPMI_OEM_ADVANTECH, 0x5321, "MIC-5321" },
[all …]
/openbmc/u-boot/doc/
H A DREADME.x861 # SPDX-License-Identifier: GPL-2.0+
6 U-Boot on x86
9 This document describes the information about U-Boot running on x86 targets,
13 ------
14 U-Boot supports running as a coreboot [1] payload on x86. So far only Link
17 most of the low-level details.
19 U-Boot is a main bootloader on Intel Edison board.
21 U-Boot also supports booting directly from x86 reset vector, without coreboot.
23 'bare metal', U-Boot acts like a BIOS replacement. The following platforms
26 - Bayley Bay CRB
[all …]
/openbmc/linux/include/uapi/linux/
H A Dpci_regs.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
5 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
25 * Conventional PCI and PCI-X Mode 1 devices have 256 bytes of
26 * configuration space. PCI-X Mode 2 and PCIe devices have 4096 bytes of
50 #define PCI_COMMAND_FAST_BACK 0x200 /* Enable back-to-back writes */
59 #define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */
123 /* 0x35-0x3b are reserved */
129 /* Header type 1 (PCI-to-PCI bridges) */
157 /* 0x35-0x3b is reserved */
159 /* 0x3c-0x3d are same as for htype 0 */
[all …]
/openbmc/qemu/include/standard-headers/linux/
H A Dpci_regs.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
5 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
25 * Conventional PCI and PCI-X Mode 1 devices have 256 bytes of
26 * configuration space. PCI-X Mode 2 and PCIe devices have 4096 bytes of
50 #define PCI_COMMAND_FAST_BACK 0x200 /* Enable back-to-back writes */
59 #define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */
83 #define PCI_HEADER_TYPE_MFD 0x80 /* Multi-Function Device (possible) */
124 /* 0x35-0x3b are reserved */
130 /* Header type 1 (PCI-to-PCI bridges) */
158 /* 0x35-0x3b is reserved */
[all …]
/openbmc/qemu/tests/qtest/
H A Dahci-test.c29 #include "libqos/libqos-pc.h"
31 #include "libqos/pci-pc.h"
34 #include "qemu/host-utils.h"
72 while (bytes--) { in string_bswap16()
88 ahci_fingerprint = qpci_config_readl(ahci->dev, PCI_VENDOR_ID); in verify_state()
89 g_assert_cmphex(ahci_fingerprint, ==, ahci->fingerprint); in verify_state()
92 if (!ahci->enabled) { in verify_state()
96 hba_base = (uint64_t)qpci_config_readl(ahci->dev, PCI_BASE_ADDRESS_5); in verify_state()
99 g_assert_cmphex(ahci_rreg(ahci, AHCI_CAP), ==, ahci->cap); in verify_state()
100 g_assert_cmphex(ahci_rreg(ahci, AHCI_CAP2), ==, ahci->cap2); in verify_state()
[all …]
/openbmc/linux/Documentation/admin-guide/
H A Dkernel-parameters.txt5 force -- enable ACPI if default was off
6 on -- enable ACPI but allow fallback to DT [arm64,riscv64]
7 off -- disable ACPI if default was on
8 noirq -- do not use ACPI for IRQ routing
9 strict -- Be less tolerant of platforms that are not
11 rsdt -- prefer RSDT over (default) XSDT
12 copy_dsdt -- copy DSDT to memory
26 If set to vendor, prefer vendor-specific driver
58 Documentation/firmware-guide/acpi/debug.rst for more information about
116 Format: <byte> or <bitmap-list>
[all …]
/openbmc/linux/
H A Dopengrok0.0.log1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz'
2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz'
3 2024-12-2
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H A Dopengrok1.0.log1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c'
2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms)
3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa
[all...]
/openbmc/
Dopengrok1.0.log1 2025-01-08 03:00:39.311-0600 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler
2 2025-01-08 03:00:39.421-0600 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, -
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Dopengrok2.0.log1 2025-01-07 03:00:34.968-0600 FINE t1 Executor.registerErrorHandler: Installing default uncaught exception handler
2 2025-01-07 03:00:35.081-0600 INFO t1 Indexer.parseOptions: Indexer options: [-c, /usr/local/bin/ctags, -T, 12, -s, /opengrok/src, -
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