Lines Matching +full:sata +full:- +full:cold

29 #include "ide-internal.h"
75 #define HOST_CTL_RESET            (1 << 0)  /* reset controller; self-clear */
83 #define HOST_CAP_SSS              (1 << 27) /* Staggered Spin-up */
85 #define HOST_CAP_64               (1U << 31) /* PCI DAC (64-bit DMA) support */
87 /* registers for each SATA port */
99     AHCI_PORT_REG_SCR_STAT    = 10, /* PxSSTS: SATA phy register: SStatus */
100     AHCI_PORT_REG_SCR_CTL     = 11, /* PxSCTL: SATA phy register: SControl */
101     AHCI_PORT_REG_SCR_ERR     = 12, /* PxSERR: SATA phy register: SError */
102     AHCI_PORT_REG_SCR_ACT     = 13, /* PxSACT: SATA phy register: SActive */
104     AHCI_PORT_REG_SCR_NOTIF   = 15, /* PxSNTF: SATA phy register: SNotification */
141 #define PORT_IRQ_COLD_PRES        (1U << 31) /* cold presence detect */
146 #define PORT_IRQ_IF_NONFATAL      (1 << 26) /* interface non-fatal error */
187 /* ap->flags bits */
338  * NCQFrame is the same as a Register H2D FIS (described in SATA 3.2),
339  * but some fields have been re-mapped and re-purposed, as seen in
340  * SATA 3.2 section 13.6.4.1 ("READ FPDMA QUEUED")
347  * bytes 16-19 become an le32 "auxiliary" field.