Lines Matching +full:sata +full:- +full:cold
4 default "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" if !ARM64
87 ---help---
100 ---help---
102 as the original A10 (mach-sun4i).
106 ---help---
113 ---help---
116 not have official open-source DRAM initialization code, but can
122 ---help---
124 have only 16-bit memory buswidth.
128 ---help---
130 32-bit memory buswidth.
336 ---help---
337 Prepend a 1536 byte (empty) header to the U-Boot image file, to be
339 blob relies on this information to load and execute U-Boot.
340 Only needed on 64-bit Allwinner boards so far when using boot0.
347 ---help---
348 Insert some ARM32 code at the very beginning of the U-Boot binary
353 This allows both the SPL and the U-Boot proper to be entered in
375 ---help---
382 ---help---
390 ---help---
391 This option is only for the DDR2 memory chip which is co-packaged in
401 ---help---
413 ---help---
414 Set the dram clock speed, valid range 240 - 480 (prior to sun9i),
416 (for DDR3-1600) are 312 to 792.
422 ---help---
435 ---help---
444 ---help---
452 ---help---
458 ---help---
469 ---help---
473 means that the delay is 5 quarter-cycles for one lane (1.25
474 cycles) and 6 quarter-cycles (1.5 cycles) for 3 other lanes.
477 temperature (sometimes producing different results on cold start
485 ---help---
490 ---help---
494 bool "JEDEC DDR3-1333H with down binning to DDR3-1066F"
495 ---help---
496 Use the timings of the standard JEDEC DDR3-1066F speed bin for
497 DRAM_CLK <= 533MHz and the timings of the DDR3-1333H speed bin
499 used in Allwinner A10/A13/A20 devices. In the case of DDR3-1333
500 or DDR3-1600 chips, be sure to check the DRAM datasheet to confirm
501 that down binning to DDR3-1066F is supported (because DDR3-1066F
502 uses a bit faster timings than DDR3-1333H).
505 bool "JEDEC DDR3-800E / DDR3-1066G / DDR3-1333J"
506 ---help---
509 DDR3-800E, DDR3-1066G or DDR3-1333J.
519 ---help---
520 Set the dram odt correction value (range -255 - 255). In allwinner
521 fex files, this option is found in bits 8-15 of the u32 odt_en variable
555 ---help---
557 console. Primarily useful only for low level u-boot debugging on
566 ---help---
568 sub-optimal settings for newer kernels, only enable if needed.
581 ---help---
589 ---help---
595 ---help---
601 ---help---
607 ---help---
614 ---help---
620 ---help---
625 default -1
626 ---help---
628 slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
634 ---help---
643 ---help---
650 ---help---
657 ---help---
665 ---help---
674 ---help---
680 ---help---
688 ---help---
698 ---help---
705 ---help---
713 ---help---
723 ---help---
732 ---help---
737 bool "Enable support for gpio-s on axp PMICs"
739 ---help---
754 ---help---
763 ---help---
770 ---help---
777 ---help---
786 ---help---
796 ---help---
804 ---help---
811 ---help---
815 Also see: http://linux-sunxi.org/LCD
821 ---help---
822 Select LCD panel display clock phase shift, range 0-3.
828 ---help---
836 ---help---
844 ---help---
853 ---help---
861 ---help---
869 ---help---
877 ---help---
885 ---help---
909 ---help---
917 ---help---
929 bool "MIPI 4-lane, 513Mbps LCD panel via SSD2828 bridge chip"
932 ---help---
936 bool "eDP 4-lane, 1.62G LCD panel via ANX9804 bridge chip"
940 ---help---
948 ---help---
955 ---help---
962 string "SATA power pin"
965 Set the pins used to power the SATA. This takes a string in the
972 ---help---