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/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Drohm,bd71847-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71847-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
14 single-core, dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is
18 …/www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applica…
19 …//www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applic…
24 - rohm,bd71847
25 - rohm,bd71850
[all …]
H A Drohm,bd71837-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71837-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
13 BD71837MWV is programmable Power Management ICs for powering single-core,
14 dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is optimized for low
18 …/www.rohm.com/products/power-management/power-management-ic-for-system/industrial-consumer-applica…
35 clock-names:
38 "#clock-cells":
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/openbmc/qemu/hw/arm/
H A Dfsl-imx7.c8 * Based on hw/arm/fsl-imx6.c
23 #include "hw/arm/fsl-imx7.h"
27 #include "qemu/error-report.h"
29 #include "target/arm/cpu-qom.h"
43 for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX7_NUM_CPUS); i++) { in fsl_imx7_init()
45 object_initialize_child(obj, name, &s->cpu[i], in fsl_imx7_init()
46 ARM_CPU_TYPE_NAME("cortex-a7")); in fsl_imx7_init()
52 object_initialize_child(obj, "a7mpcore", &s->a7mpcore, in fsl_imx7_init()
60 object_initialize_child(obj, name, &s->gpio[i], TYPE_IMX_GPIO); in fsl_imx7_init()
68 object_initialize_child(obj, name, &s->gpt[i], TYPE_IMX7_GPT); in fsl_imx7_init()
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H A Dfsl-imx6.c2 * Copyright (c) 2015 Jean-Christophe Dubois <jcd@tribudubois.net>
6 * Based on hw/arm/fsl-imx31.c
24 #include "hw/arm/fsl-imx6.h"
26 #include "hw/usb/imx-usb-phy.h"
28 #include "hw/qdev-properties.h"
31 #include "qemu/error-report.h"
33 #include "target/arm/cpu-qom.h"
46 for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX6_NUM_CPUS); i++) { in fsl_imx6_init()
48 object_initialize_child(obj, name, &s->cpu[i], in fsl_imx6_init()
49 ARM_CPU_TYPE_NAME("cortex-a9")); in fsl_imx6_init()
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/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mn-ddr4-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
9 #include "imx8mn-evk.dtsi"
13 compatible = "fsl,imx8mn-ddr4-evk", "fsl,imx8mn";
17 cpu-supply = <&buck2_reg>;
21 cpu-supply = <&buck2_reg>;
25 cpu-supply = <&buck2_reg>;
29 cpu-supply = <&buck2_reg>;
33 operating-points-v2 = <&ddrc_opp_table>;
35 ddrc_opp_table: opp-table {
[all …]
H A Dimx8mn-bsh-smm-s2-common.dtsi1 // SPDX-License-Identifier: GPL-2.0+
7 /dts-v1/;
13 stdout-path = &uart4;
16 fec_supply: fec-supply-en {
17 compatible = "regulator-fixed";
18 vin-supply = <&buck4_reg>;
19 regulator-name = "tja1101_en";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
23 enable-active-high;
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H A Dimx8mn-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
14 compatible = "mmc-pwrseq-simple";
15 pinctrl-names = "default";
16 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
17 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
19 clock-names = "ext_clock";
20 post-power-on-delay-ms = <80>;
30 cpu-supply = <&buck2_reg>;
34 cpu-supply = <&buck2_reg>;
38 cpu-supply = <&buck2_reg>;
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H A Dimx8mq-librem5-devkit.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 Purism SPC
6 /dts-v1/;
8 #include "dt-bindings/input/input.h"
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/leds/common.h>
11 #include "dt-bindings/pwm/pwm.h"
12 #include "dt-bindings/usb/pd.h"
17 compatible = "purism,librem5-devkit", "fsl,imx8mq";
19 backlight_dsi: backlight-dsi {
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H A Dimx8mm-innocomm-wb15.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 reg_modem: regulator-modem {
11 compatible = "regulator-fixed";
12 pinctrl-names = "default";
13 pinctrl-0 = <&pinctrl_modem_regulator>;
14 regulator-min-microvolt = <3300000>;
15 regulator-max-microvolt = <3300000>;
16 regulator-name = "epdev_on";
18 enable-active-high;
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H A Dimx8mm-beacon-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
13 compatible = "mmc-pwrseq-simple";
14 pinctrl-names = "default";
15 pinctrl-0 = <&pinctrl_usdhc1_gpio>;
16 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
18 clock-names = "ext_clock";
19 post-power-on-delay-ms = <80>;
29 cpu-supply = <&buck2_reg>;
33 cpu-supply = <&buck2_reg>;
37 cpu-supply = <&buck2_reg>;
[all …]
H A Dimx8mm-var-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 model = "Variscite VAR-SOM-MX8MM module";
11 compatible = "variscite,var-som-mx8mm", "fsl,imx8mm";
14 stdout-path = &uart4;
22 reg_eth_phy: regulator-eth-phy {
23 compatible = "regulator-fixed";
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_reg_eth_phy>;
26 regulator-name = "eth_phy_pwr";
27 regulator-min-microvolt = <3300000>;
[all …]
H A Dimx8mn-var-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright 2019-2020 Variscite Ltd.
11 model = "Variscite VAR-SOM-MX8MN module";
12 compatible = "variscite,var-som-mx8mn", "fsl,imx8mn";
15 stdout-path = &uart4;
23 reg_eth_phy: regulator-eth-phy {
24 compatible = "regulator-fixed";
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_reg_eth_phy>;
27 regulator-name = "eth_phy_pwr";
[all …]
H A Dimx8mm-evk.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
9 #include <dt-bindings/usb/pd.h>
14 stdout-path = &uart2;
22 hdmi-connector {
23 compatible = "hdmi-connector";
29 remote-endpoint = <&adv7535_out>;
35 compatible = "gpio-leds";
36 pinctrl-names = "default";
[all …]
H A Dimx8mm-emcon.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
13 stdout-path = &uart1;
17 compatible = "gpio-leds";
18 pinctrl-names = "default";
19 pinctrl-0 = <&pinctrl_gpio_led>;
21 led-green {
24 default-state = "on";
25 linux,default-trigger = "heartbeat";
28 led-red {
[all …]
H A Dimx8mm-data-modul-edm-sbc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/net/qca-ar803x.h>
9 #include <dt-bindings/phy/phy-imx8-pcie.h>
14 compatible = "dmo,imx8mm-data-modul-edm-sbc", "fsl,imx8mm";
22 stdout-path = &uart3;
32 compatible = "pwm-backlight";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pinctrl_panel_backlight>;
35 brightness-levels = <0 1 10 20 30 40 50 60 70 75 80 90 100>;
[all …]
H A Dimx8mq-librem5.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2020 Purism SPC
6 /dts-v1/;
8 #include "dt-bindings/input/input.h"
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/leds/common.h>
11 #include "dt-bindings/pwm/pwm.h"
12 #include "dt-bindings/usb/pd.h"
18 chassis-type = "handset";
20 backlight_dsi: backlight-dsi {
[all …]
H A Dimx8mm-venice-gw7904.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
17 compatible = "gateworks,imx8mm-gw7904", "fsl,imx8mm";
20 stdout-path = &uart2;
28 gpio-keys {
29 compatible = "gpio-keys";
[all …]
H A Dimx8mm-venice-gw7903.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
17 compatible = "gw,imx8mm-gw7903", "fsl,imx8mm";
25 stdout-path = &uart2;
33 gpio-keys {
34 compatible = "gpio-keys";
[all …]
H A Dimx8mn-venice-gw7902.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/net/ti-dp83867.h>
17 compatible = "gw,imx8mn-gw7902", "fsl,imx8mn";
24 stdout-path = &uart2;
33 compatible = "fixed-clock";
34 #clock-cells = <0>;
[all …]
H A Dimx8mm-venice-gw7901.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
17 compatible = "gw,imx8mm-gw7901", "fsl,imx8mm";
30 stdout-path = &uart2;
38 gpio-keys {
39 compatible = "gpio-keys";
[all …]
H A Dimx8mm-venice-gw7902.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include <dt-bindings/phy/phy-imx8-pcie.h>
18 compatible = "gw,imx8mm-gw7902", "fsl,imx8mm";
27 stdout-path = &uart2;
36 compatible = "fixed-clock";
[all …]
/openbmc/linux/drivers/regulator/
H A Dbd718x7-regulator.c1 // SPDX-License-Identifier: GPL-2.0
3 // bd71837-regulator.c ROHM BD71837MWV/BD71847MWV regulator driver
9 #include <linux/mfd/rohm-bd718x7.h>
50 * controlled by software - or by PMIC internal HW state machine. Whether
51 * regulator should be under SW or HW control can be defined from device-tree.
102 * Note for next hacker - these PMICs have a register where the HW state can be
103 * read. If assuming RUN appears to be false in your use-case - you can
122 ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, &val); in bd71837_get_buck34_enable_hwctrl()
137 * guarantee minimum of 1ms sleep - it shouldn't matter if we in voltage_change_done()
142 ret = regmap_clear_bits(rdev->regmap, BD718XX_REG_MVRFLTMASK2, in voltage_change_done()
[all …]
/openbmc/linux/
H A Dopengrok1.0.log1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c'
2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms)
3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa
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