| /openbmc/linux/Documentation/devicetree/bindings/nvmem/ |
| H A D | st,stm32-romem.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/st,stm32-romem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Factory-programmed data
10 This represents STM32 Factory-programmed read only non-volatile area: locked
11 flash, OTP, read-only HW regs... This contains various information such as:
16 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
19 - $ref: nvmem.yaml#
24 - st,stm32f4-otp
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| /openbmc/openbmc/meta-arm/meta-arm-bsp/documentation/corstone1000/ |
| H A D | software-architecture.rst | 2 # Copyright (c) 2022-2024, Arm Limited.
4 # SPDX-License-Identifier: MIT
12 Arm Corstone-1000
15 Arm Corstone-1000 is a reference solution for IoT devices. It is part of
19 Corstone-1000 software plus hardware reference solution is PSA Level-2 ready
21 More information on the Corstone-1000 subsystem product and design can be
23 `Arm Corstone-1000 Software`_ and `Arm Corstone-1000 Technical Overview`_.
28 present in the user-guide document.
34 The software architecture of Corstone-1000 platform is a reference
36 framework to build secure IoT devices.
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| H A D | user-guide.rst | 2 # Copyright (c) 2022-2024, Arm Limited.
4 # SPDX-License-Identifier: MIT
11 ------
12 The Corstone-1000 software stack uses the `Yocto Project <https://www.yoctoproject.org/>`__ to build
13 a tiny Linux distribution suitable for the Corstone-1000 platform (kernel and initramfs filesystem …
14 The Yocto Project relies on the `BitBake <https://docs.yoctoproject.org/bitbake.html#bitbake-docume…
19 -------------
26 - Git 1.8.3.1 or greater.
27 - Python 3.8.0 or greater.
28 - GNU Tar 1.28 or greater.
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| /openbmc/linux/drivers/nvmem/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
5 Support for NVMEM(Non Volatile Memory) devices like EEPROM, EFUSES...
37 calibration data required for the PCIe or the USB-C PHY.
40 be called nvmem-apple-efuses.
43 tristate "Broadcom On-Chip OTP Controller support"
48 Say y here to enable read/write access to the Broadcom OTP
52 will be called nvmem-bcm-ocotp.
72 will be called nvmem-imx-iim.
75 tristate "i.MX 6/7/8 On-Chip OTP Controller support"
79 This is a driver for the On-Chip OTP Controller (OCOTP) available on
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| H A D | stm32-romem.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Factory-programmed memory read access driver
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
9 #include <linux/arm-smccc.h>
12 #include <linux/nvmem-provider.h>
16 #include "stm32-bsec-optee-ta.h"
18 /* BSEC secure service access from non-secure */
49 *buf8++ = readb_relaxed(priv->base + i); in stm32_romem_read()
54 static int stm32_bsec_smc(u8 op, u32 otp, u32 data, u32 *result) in stm32_bsec_smc() argument
59 arm_smccc_smc(STM32_SMC_BSEC, op, otp, data, 0, 0, 0, 0, &res); in stm32_bsec_smc()
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| /openbmc/u-boot/cmd/ |
| H A D | otp_info.h | 7 #define OTP_REG_RESERVED -1
8 #define OTP_REG_VALUE -2
9 #define OTP_REG_VALID_BIT -3
33 { 0, 1, 0, "Disable Secure Boot" },
34 { 0, 1, 1, "Enable Secure Boot" },
74 { 22, 1, 1, "Disable dedicated BMC functions for non-BMC application" },
103 { 41, 1, 0, "Disable boot SPI 3B address mode auto-clear" },
104 { 41, 1, 1, "Enable boot SPI 3B address mode auto-clear" },
152 { 0, 1, 0, "Disable Secure Boot" },
153 { 0, 1, 1, "Enable Secure Boot" },
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| H A D | otp.c | 1 // SPDX-License-Identifier: GPL-2.0+
19 #include <u-boot/sha256.h>
20 #include <u-boot/sha512.h>
21 #include <u-boot/rsa.h>
22 #include <u-boot/rsa-mod-exp.h>
36 #define OTP_USAGE -1
37 #define OTP_FAILURE -2
214 …{0, OTP_KEY_TYPE_AES, OTP_LIT_END, 0, "AES-256 as OEM platform key for image encryption/decr…
215 {1, OTP_KEY_TYPE_VAULT, OTP_LIT_END, 0, "AES-256 as secret vault key"},
217 {8, OTP_KEY_TYPE_RSA_PUB, OTP_LIT_END, 1, "RSA-public as OEM DSS public keys in Mode 2"},
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| H A D | Kconfig | 4 bool "Support U-Boot commands"
7 Enable U-Boot's command-line functions. This provides a means
8 to enter commands into U-Boot for a wide variety of purposes. It
12 substantially to the size of U-Boot.
71 U-Boot automatic booting process and bring the device
72 to the U-Boot prompt for user input.
103 autoboot starts booting, U-Boot gives a command prompt. The
104 U-Boot prompt will time out if CONFIG_BOOT_RETRY_TIME is
116 U-Boot gives a command prompt. The U-Boot prompt never
120 bool "Enable Ctrl-C autoboot interruption"
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| /openbmc/u-boot/arch/arm/mach-stm32mp/ |
| H A D | cpu.c | 1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
48 * - boot instance = bit 31:16
49 * - boot device = bit 15:0
57 /* BSEC OTP index */
82 /* allow non secure access in Write/Read for all peripheral */ in security_init()
85 /* Open SYSRAM for no secure access */ in security_init()
98 /* bit 30 / 31 => Secure Global Enable : write/read */ in security_init()
125 /* Freeze IWDG2 if Cortex-A7 is in debug mode */ in dbgmcu_init()
178 gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE; in arch_cpu_init()
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| /openbmc/u-boot/board/warp7/ |
| H A D | warp7.c | 1 // SPDX-License-Identifier: GPL-2.0+
8 #include <asm/arch/imx-regs.h>
9 #include <asm/arch/mx7-pins.h>
12 #include <asm/mach-imx/hab.h>
13 #include <asm/mach-imx/iomux-v3.h>
32 gd->ram_size = PHYS_SDRAM_SIZE; in dram_init()
36 gd->ram_size -= CONFIG_OPTEE_TZDRAM_SIZE; in dram_init()
70 if (ret == -ENODEV) in power_init_board()
102 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; in board_init()
112 mode = "secure"; in checkboard()
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| /openbmc/qemu/docs/about/ |
| H A D | removed-features.rst | 10 --------------------------------------
12 ``-hdachs`` (removed in 2.12)
15 The geometry defined by ``-hdachs c,h,s,t`` should now be specified via
16 ``-device ide-hd,drive=dr,cyls=c,heads=h,secs=s,bios-chs-trans=t``
17 (together with ``-drive if=none,id=dr,...``).
19 ``-net channel`` (removed in 2.12)
22 This option has been replaced by ``-net user,guestfwd=...``.
24 ``-net dump`` (removed in 2.12)
27 ``-net dump[,vlan=n][,file=filename][,len=maxlen]`` has been replaced by
28 ``-object filter-dump,id=id,netdev=dev[,file=filename][,maxlen=maxlen]``.
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| /openbmc/linux/drivers/net/wireless/ath/wil6210/ |
| H A D | wmi.c | 1 // SPDX-License-Identifier: ISC
3 * Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
4 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
24 " 0 - use default; < 0 - don't auto-establish");
29 " 60G device led enablement. Set the led ID (0-2) to enable");
35 * DOC: WMI event receiving - theory of operations
42 * event list @wil->pending_wmi_ev. Then, work queue @wil->wmi_wq wakes up
47 * if WMI event handling involves another WMI command flow, this 2-nd flow
52 * DOC: Addressing - theory of operations
57 * - MAC CPU (ucode)
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| /openbmc/linux/drivers/net/ethernet/sfc/siena/ |
| H A D | mcdi_pcol.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
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| /openbmc/linux/drivers/net/ethernet/sfc/ |
| H A D | mcdi_pcol.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
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| /openbmc/linux/ |
| H A D | opengrok0.0.log | 1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz'
2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz'
3 2024-12-2
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| H A D | opengrok1.0.log | 1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c'
2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms)
3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa
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| H A D | opengrok2.0.log | 1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms)
2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c'
3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms)
4 2024-1
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