Lines Matching +full:non +full:- +full:secure +full:- +full:otp
1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Factory-programmed memory read access driver
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
9 #include <linux/arm-smccc.h>
12 #include <linux/nvmem-provider.h>
16 #include "stm32-bsec-optee-ta.h"
18 /* BSEC secure service access from non-secure */
49 *buf8++ = readb_relaxed(priv->base + i); in stm32_romem_read()
54 static int stm32_bsec_smc(u8 op, u32 otp, u32 data, u32 *result) in stm32_bsec_smc() argument
59 arm_smccc_smc(STM32_SMC_BSEC, op, otp, data, 0, 0, 0, 0, &res); in stm32_bsec_smc()
61 return -EIO; in stm32_bsec_smc()
68 return -ENXIO; in stm32_bsec_smc()
76 struct device *dev = priv->cfg.dev; in stm32_bsec_read()
81 /* Round unaligned access to 32-bits */ in stm32_bsec_read()
86 if (roffset + rbytes > priv->cfg.size) in stm32_bsec_read()
87 return -EINVAL; in stm32_bsec_read()
90 u32 otp = i >> 2; in stm32_bsec_read() local
92 if (otp < priv->lower) { in stm32_bsec_read()
95 priv->base + STM32MP15_BSEC_DATA0 + i); in stm32_bsec_read()
97 ret = stm32_bsec_smc(STM32_SMC_READ_SHADOW, otp, 0, in stm32_bsec_read()
100 dev_err(dev, "Can't read data%d (%d)\n", otp, in stm32_bsec_read()
107 size = min(bytes, (size_t)(4 - skip_bytes)); in stm32_bsec_read()
111 bytes -= size; in stm32_bsec_read()
123 struct device *dev = priv->cfg.dev; in stm32_bsec_write()
127 /* Allow only writing complete 32-bits aligned words */ in stm32_bsec_write()
129 return -EINVAL; in stm32_bsec_write()
140 if (offset + bytes >= priv->lower * 4) in stm32_bsec_write()
151 return stm32_bsec_optee_ta_read(priv->ctx, offset, buf, bytes); in stm32_bsec_pta_read()
159 return stm32_bsec_optee_ta_write(priv->ctx, priv->lower, offset, buf, bytes); in stm32_bsec_pta_write()
167 /* check that the OP-TEE support the BSEC SMC (legacy mode) */ in stm32_bsec_smc_check()
178 /* check that the OP-TEE node is present and available. */ in optee_presence_check()
179 np = of_find_compatible_node(NULL, NULL, "linaro,optee-tz"); in optee_presence_check()
190 struct device *dev = &pdev->dev; in stm32_romem_probe()
197 return -ENOMEM; in stm32_romem_probe()
199 priv->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in stm32_romem_probe()
200 if (IS_ERR(priv->base)) in stm32_romem_probe()
201 return PTR_ERR(priv->base); in stm32_romem_probe()
203 priv->cfg.name = "stm32-romem"; in stm32_romem_probe()
204 priv->cfg.word_size = 1; in stm32_romem_probe()
205 priv->cfg.stride = 1; in stm32_romem_probe()
206 priv->cfg.dev = dev; in stm32_romem_probe()
207 priv->cfg.priv = priv; in stm32_romem_probe()
208 priv->cfg.owner = THIS_MODULE; in stm32_romem_probe()
209 priv->cfg.type = NVMEM_TYPE_OTP; in stm32_romem_probe()
210 priv->cfg.add_legacy_fixed_of_cells = true; in stm32_romem_probe()
212 priv->lower = 0; in stm32_romem_probe()
215 of_match_device(dev->driver->of_match_table, dev)->data; in stm32_romem_probe()
217 priv->cfg.read_only = true; in stm32_romem_probe()
218 priv->cfg.size = resource_size(res); in stm32_romem_probe()
219 priv->cfg.reg_read = stm32_romem_read; in stm32_romem_probe()
221 priv->cfg.size = cfg->size; in stm32_romem_probe()
222 priv->lower = cfg->lower; in stm32_romem_probe()
223 if (cfg->ta || optee_presence_check()) { in stm32_romem_probe()
224 rc = stm32_bsec_optee_ta_open(&priv->ctx); in stm32_romem_probe()
226 /* wait for OP-TEE client driver to be up and ready */ in stm32_romem_probe()
227 if (rc == -EPROBE_DEFER) in stm32_romem_probe()
228 return -EPROBE_DEFER; in stm32_romem_probe()
230 if (cfg->ta || !stm32_bsec_smc_check()) in stm32_romem_probe()
234 if (priv->ctx) { in stm32_romem_probe()
235 rc = devm_add_action_or_reset(dev, stm32_bsec_optee_ta_close, priv->ctx); in stm32_romem_probe()
240 priv->cfg.reg_read = stm32_bsec_pta_read; in stm32_romem_probe()
241 priv->cfg.reg_write = stm32_bsec_pta_write; in stm32_romem_probe()
243 priv->cfg.reg_read = stm32_bsec_read; in stm32_romem_probe()
244 priv->cfg.reg_write = stm32_bsec_write; in stm32_romem_probe()
248 return PTR_ERR_OR_ZERO(devm_nvmem_register(dev, &priv->cfg)); in stm32_romem_probe()
252 * STM32MP15/13 BSEC OTP regions: 4096 OTP bits (with 3072 effective bits)
253 * => 96 x 32-bits data words
254 * - Lower: 1K bits, 2:1 redundancy, incremental bit programming
255 * => 32 (x 32-bits) lower shadow registers = words 0 to 31
256 * - Upper: 2K bits, ECC protection, word programming only
257 * => 64 (x 32-bits) = words 32 to 95
272 { .compatible = "st,stm32f4-otp", }, {
273 .compatible = "st,stm32mp15-bsec",
276 .compatible = "st,stm32mp13-bsec",
286 .name = "stm32-romem",
293 MODULE_DESCRIPTION("STMicroelectronics STM32 RO-MEM");
294 MODULE_ALIAS("platform:nvmem-stm32-romem");