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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dcanaan,k210-fpioa.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/canaan,k210-fpioa.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Damien Le Moal <dlemoal@kernel.org>
16 a per-pin basis.
20 const: canaan,k210-fpioa
29 - description: Controller reference clock source
30 - description: APB interface clock source
32 clock-names:
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/openbmc/linux/Documentation/devicetree/bindings/iio/addac/
H A Dadi,ad74115.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cosmin Tanislav <cosmin.tanislav@analog.com>
13 The AD74115H is a single-channel software configurable input/output
15 analog output, analog input, digital output, digital input, resistance
17 chip solution with an SPI interface. The device features a 16-bit ADC and a
18 14-bit DAC.
25 - adi,ad74115h
30 spi-max-frequency:
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/openbmc/linux/Documentation/devicetree/bindings/display/ti/
H A Dti,omap2-dss.txt4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
8 --------
11 - compatible: "ti,omap2-dss"
12 - reg: address and length of the register space
13 - ti,hwmods: "dss_core"
16 - Video port for DPI output
19 - data-lines: number of lines used
23 -----
26 - compatible: "ti,omap2-dispc"
27 - reg: address and length of the register space
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H A Dti,omap3-dss.txt4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
8 --------
11 - compatible: "ti,omap3-dss"
12 - reg: address and length of the register space
13 - ti,hwmods: "dss_core"
14 - clocks: handle to fclk
15 - clock-names: "fck"
18 - Video ports:
19 - Port 0: DPI output
20 - Port 1: SDI output
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H A Dti,omap4-dss.txt4 See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
8 --------
11 - compatible: "ti,omap4-dss"
12 - reg: address and length of the register space
13 - ti,hwmods: "dss_core"
14 - clocks: handle to fclk
15 - clock-names: "fck"
18 - DISPC
21 - DSS Submodules: RFBI, VENC, DSI, HDMI
22 - Video port for DPI output
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/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dcirrus,cs42l43.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
17 loudspeakers, and two ADCs for wired headset microphone input or
18 stereo line input. PDM inputs are provided for digital microphones.
21 - $ref: dai-common.yaml#
26 - cirrus,cs42l43
31 vdd-p-supply:
35 vdd-a-supply:
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H A Dcirrus,cs35l41.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - david.rhodes@cirrus.com
19 - cirrus,cs35l40
20 - cirrus,cs35l41
28 '#sound-dai-cells':
33 reset-gpios:
36 VA-supply:
39 VP-supply:
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/openbmc/linux/Documentation/devicetree/bindings/extcon/
H A Dwlf,arizona.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
20 wlf,hpdet-channel:
30 wlf,use-jd2:
32 Use the additional JD input along with JD1 for dual pin jack detection.
35 wlf,use-jd2-nopull:
40 wlf,jd-invert:
42 Invert the polarity of the jack detection switch.
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/openbmc/u-boot/drivers/gpio/
H A Dpca953x.c1 // SPDX-License-Identifier: GPL-2.0
68 return -1; in pca953x_reg_write()
76 return -1; in pca953x_reg_write()
94 return -1; in pca953x_reg_read()
98 return -1; in pca953x_reg_read()
114 * Set read polarity of IO pins in 'mask' to corresponding value in 'data'
124 * 0 = output, 1 = input
139 return -1; in pca953x_get_val()
153 int msb = nr_gpio - 1; in pca953x_info()
157 for (i = msb; i >= 0; i--) in pca953x_info()
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H A Dtca642x.c20 * MA 02111-1307 USA
58 ret = -1; in tca642x_reg_write()
80 ret = -1; in tca642x_reg_read()
104 * Set read polarity of IO pins in 'reg_bit' to corresponding value in 'data'
117 * 0 = output, 1 = input
136 return -1; in tca642x_get_val()
181 return -1; in tca642x_info()
183 for (j = 7; j >= 0; j--) in tca642x_info()
189 return -1; in tca642x_info()
191 for (j = 7; j >= 0; j--) in tca642x_info()
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H A Dpca953x_gpio.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Take linux kernel driver drivers/gpio/gpio-pca953x.c for reference.
14 * Also the Polarity Inversion feature is not supported now.
19 * 3. Support Polarity Inversion
30 #include <dt-bindings/gpio/gpio.h>
53 * struct pca953x_info - Data for pca953x
57 * @invert: Polarity inversion or not
67 int invert; member
79 int bank_shift = fls((info->gpio_count - 1) / BANK_SZ); in pca953x_write_single()
96 int bank_shift = fls((info->gpio_count - 1) / BANK_SZ); in pca953x_read_single()
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/openbmc/linux/include/dt-bindings/sound/
H A Dcs35l45.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * cs35l45.h -- CS35L45 ALSA SoC audio driver DT bindings header
12 * cirrus,asp-sdout-hiz-ctrl
14 * TX_HIZ_UNUSED: TX pin high-impedance during unused slots.
15 * TX_HIZ_DISABLED: TX pin high-impedance when all channels disabled.
21 * Optional GPIOX Sub-nodes:
22 * The cs35l45 node can have up to three "cirrus,gpio-ctrlX" ('X' = [1,2,3])
23 * sub-nodes for configuring the GPIO pins.
25 * - gpio-dir : GPIO pin direction. Valid only when 'gpio-ctrl'
28 * 1 = Input (Default)
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/openbmc/linux/drivers/gpu/drm/bridge/adv7511/
H A Dadv7511.h1 /* SPDX-License-Identifier: GPL-2.0-only */
62 #define ADV7511_REG_GC(x) (0x4b + (x)) /* 0x4b - 0x51 */
66 #define ADV7511_REG_AVI_INFOFRAME(x) (0x55 + (x)) /* 0x55 - 0x6f */
70 #define ADV7511_REG_AUDIO_INFOFRAME(x) (0x73 + (x)) /* 0x73 - 0x7c */
77 #define ADV7511_REG_AN(x) (0xb0 + (x)) /* 0xb0 - 0xb7 */
80 #define ADV7511_REG_BKSV(x) (0xc0 + (x)) /* 0xc0 - 0xc3 */
84 #define ADV7511_REG_BSTATUS(x) (0xca + (x)) /* 0xca - 0xcb */
89 #define ADV7511_REG_SYNC_ADJUSTMENT(x) (0xd7 + (x)) /* 0xd7 - 0xdc */
251 * enum adv7511_sync_polarity - Polarity for the input sync signals
252 * @ADV7511_SYNC_POLARITY_PASSTHROUGH: Sync polarity matches that of
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/openbmc/linux/drivers/media/i2c/
H A Dtda1997x_regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 /* Page 0x00 - General Control */
130 #define DETECT_5V_SEL BIT(2) /* 5V present on selected input */
131 #define DETECT_5V_B BIT(1) /* 5V present on input B */
132 #define DETECT_5V_A BIT(0) /* 5V present on input A */
134 /* Input Select */
159 #define HPD_MAN_CTRL_HPD_B BIT(1) /* Assert HPD High for Input A */
160 #define HPD_MAN_CTRL_HPD_A BIT(0) /* Assert HPD High for Input A */
165 #define RT_MAN_CTRL_RT_B BIT(1) /* enable TMDS pull-up on Input B */
166 #define RT_MAN_CTRL_RT_A BIT(0) /* enable TMDS pull-up on Input A */
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/openbmc/linux/Documentation/hwmon/
H A Dds1621.rst47 - Christian W. Zuckschwerdt <zany@triq.net>
48 - valuable contributions by Jan M. Sendler <sendler@sendler.de>
49 - ported to 2.6 by Aurelien Jarno <aurelien@aurel32.net>
53 ------------------
55 * polarity int
56 Output's polarity:
62 -----------
66 programmed into non-volatile on-chip registers). Temperature range is -55
68 Fahrenheit range of -67 to +257 degrees with 0.9 steps. If polarity
71 As for the thermostat, behavior can also be programmed using the polarity
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/openbmc/linux/Documentation/devicetree/bindings/input/
H A Diqs269a.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/input/iqs269a.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 The Azoteq IQS269A is an 8-channel capacitive touch controller that features
14 additional Hall-effect and inductive sensing capabilities.
28 "#address-cells":
31 "#size-cells":
34 azoteq,hall-enable:
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H A Dazoteq,iqs7222.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/input/azoteq,iqs7222.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
21 - azoteq,iqs7222a
22 - azoteq,iqs7222b
23 - azoteq,iqs7222c
24 - azoteq,iqs7222d
29 irq-gpios:
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H A Diqs626a.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/input/iqs626a.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jeff LaBundy <jeff@labundy.com>
13 The Azoteq IQS626A is a 14-channel capacitive touch controller that features
14 additional Hall-effect and inductive sensing capabilities.
19 - $ref: touchscreen/touchscreen.yaml#
31 "#address-cells":
34 "#size-cells":
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/openbmc/linux/include/linux/iio/frequency/
H A Dad9523.h1 /* SPDX-License-Identifier: GPL-2.0-only */
38 * struct ad9523_channel_spec - Output channel configuration
41 * @divider_output_invert_en: Invert the polarity of the output clock.
42 * @sync_ignore_en: Ignore chip-level SYNC signal.
48 LSB = 1/2 of a period of the divider input clock.
49 * @channel_divider: 10-bit channel divider.
106 * struct ad9523_platform_data - platform specific information
109 * @refa_diff_rcv_en: REFA differential/single-ended input selection.
110 * @refb_diff_rcv_en: REFB differential/single-ended input selection.
111 * @zd_in_diff_en: Zero Delay differential/single-ended input selection.
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/openbmc/u-boot/drivers/phy/marvell/
H A Dcomphy_a3700.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015-2016 Marvell International Ltd.
67 /*-----------------------------------------------------------*/
144 for (timeout = PLL_LOCK_TIMEOUT; timeout > 0; timeout--) { in comphy_poll_reg()
165 static int comphy_pcie_power_up(u32 speed, u32 invert) in comphy_pcie_power_up() argument
226 * 10. Check the Polarity invert bit in comphy_pcie_power_up()
228 if (invert & PHY_POLARITY_TXD_INVERT) in comphy_pcie_power_up()
231 if (invert & PHY_POLARITY_RXD_INVERT) in comphy_pcie_power_up()
286 * 1. Select 40-bit data width width in comphy_sata_power_up()
312 * 5. Set vendor-specific configuration (??) in comphy_sata_power_up()
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/openbmc/linux/drivers/watchdog/
H A Dsmsc37b787_wdt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 * any of this software. This material is provided "AS-IS" in
12 * (C) Copyright 2003-2006 Sven Anders <anders@anduras.de>
15 * 2003 - Created version 1.0 for Linux 2.4.x.
16 * 2006 - Ported to Linux 2.6, added nowayout and MAGICCLOSE
38 * For an example userspace keep-alive daemon, see:
86 /* -- Low level function ----------------------------------------*/
124 /* -- Medium level functions ------------------------------------*/
128 /* -- General Purpose I/O Bit 1.2 -- in gpio_bit12()
129 * Bit 0, In/Out: 0 = Output, 1 = Input in gpio_bit12()
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/openbmc/linux/drivers/gpio/
H A Dgpio-pca953x.c1 // SPDX-License-Identifier: GPL-2.0-only
126 { "irq-gpios", &pca953x_irq_gpios, 1, ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER },
138 ret = acpi_dev_gpio_irq_get_by(ACPI_COMPANION(dev), "irq-gpios", 0); in pca953x_acpi_get_irq()
152 * relative. Since first controller (gpio-sch.c) and
153 * second (gpio-dwapb.c) are at the fixed bases, we may
175 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
180 int input; member
181 int invert; member
187 .input = PCA953X_INPUT,
188 .invert = PCA953X_INVERT,
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/openbmc/linux/arch/sh/boards/mach-microdev/
H A Dfdc37c93xapm.c1 // SPDX-License-Identifier: GPL-2.0
9 * SuperH SH4-202 MicroDev board support.
61 /* General-Purpose base address on CPU-board FPGA */
80 return -ENODEV; in smsc_superio_setup()
141 * bit[0] In/Out 1==input; 0==output in smsc_superio_setup()
142 * bit[1] Polarity 1==invert; 0==no invert in smsc_superio_setup()
/openbmc/linux/drivers/pinctrl/
H A Dpinctrl-k210.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include <linux/pinctrl/pinconf-generic.h>
21 #include <dt-bindings/pinctrl/k210-fpioa.h>
25 #include "pinctrl-utils.h"
49 #define K210_PC_OE_INV BIT(13) /* INVert Output Enable */
51 #define K210_PC_DO_INV BIT(15) /* INVert final Data Output */
57 #define K210_PC_IE BIT(20) /* Input Enable */
58 #define K210_PC_IE_INV BIT(21) /* INVert Input Enable */
59 #define K210_PC_DI_INV BIT(22) /* INVert Data Input */
61 #define K210_PC_DI BIT(31) /* raw Data Input */
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/openbmc/linux/sound/soc/codecs/
H A Des8316.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * es8316.c -- es8316 ALSA SoC audio driver
6 * Authors: David Yang <yangxiaohua@everest-semi.com>,
21 #include <sound/soc-dapm.h>
51 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(dac_vol_tlv, -9600, 50, 1);
52 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_vol_tlv, -9600, 50, 1);
53 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(alc_max_gain_tlv, -650, 150, 0);
54 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(alc_min_gain_tlv, -1200, 150, 0);
57 0, 10, TLV_DB_SCALE_ITEM(-1650, 150, 0),
58 11, 11, TLV_DB_SCALE_ITEM(-150, 0, 0),
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