media/i2c/tda1997x_regs.h

1 /* SPDX-License-Identifier: GPL-2.0 */
6 /* Page 0x00 - General Control */
130 #define DETECT_5V_SEL		BIT(2)	/* 5V present on selected input */
131 #define DETECT_5V_B		BIT(1)	/* 5V present on input B */
132 #define DETECT_5V_A		BIT(0)	/* 5V present on input A */
134 /* Input Select */
159 #define HPD_MAN_CTRL_HPD_B	BIT(1)	/* Assert HPD High for Input A */
160 #define HPD_MAN_CTRL_HPD_A	BIT(0)	/* Assert HPD High for Input A */
165 #define RT_MAN_CTRL_RT_B	BIT(1)	/* enable TMDS pull-up on Input B */
166 #define RT_MAN_CTRL_RT_A	BIT(0)	/* enable TMDS pull-up on Input A */
212 #define PCLK_DELAY_SHIFT	4	/* Pixel delay (-8..+7) */
227 /* Page 0x01 - HDMI info and packets */
247 /* Page 0x12 - HDMI Extra control and debug */
279 /* Page 0x13 - HDMI Extra control and debug */
351 /* Page 0x14 - Audio Extra control and debug */
399 /* Page 0x21 - EDID content */
409 /* Page 0x30 - NV Configuration */
429 /* Page 0x80 - CEC */
468 #define MASK_SUS_ACT		BIT(2) /* Activity of selected input changed */
469 #define MASK_SUS_CH		BIT(1) /* Selected input changed */
520 #define AUDCFG_CLK_INVERT	BIT(7)	/* invert A_CLK polarity */
545 #define OF_FMT_422_SMPT		1L	/* YUV422 semi-planar */
550 #define HS_HREF_DELAY_SHIFT	4	/* Pixel delay (-8..+7) */
552 #define HS_HREF_INV_SHIFT	2	/* polarity (1=invert) */
562 #define VS_VREF_DELAY_SHIFT	4	/* Pixel delay (-8..+7) */
563 #define VS_VREF_INV_SHIFT	2	/* polarity (1=invert) */
573 #define DE_FREF_DELAY_SHIFT	4	/* Pixel delay (-8..+7) */
575 #define DE_FREF_INV_SHIFT	2	/* polarity (1=invert) */
586 #define RESET_KSV		BIT(5)	/* Reset KSV-FIFO */
589 #define RESET_PA		BIT(2)	/* Reset polarity adjust */
612 #define AUDIO_LAYOUT_LAYOUT1	BIT(0)  /* Layout1: AP0-3 vs Layout0:AP0 */