/openbmc/linux/Documentation/devicetree/bindings/pci/ |
H A D | fsl,imx6q-pcie-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lucas Stach <l.stach@pengutronix.de> 11 - Richard Zhu <hongxing.zhu@nxp.com> 22 clock-names: 26 num-lanes: 29 fsl,imx7d-pcie-phy: 31 description: A phandle to an fsl,imx7d-pcie-phy node. Additional [all …]
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H A D | fsl,imx6q-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lucas Stach <l.stach@pengutronix.de> 11 - Richard Zhu <hongxing.zhu@nxp.com> 15 and thus inherits all the common properties defined in snps,dw-pcie.yaml. 19 See fsl,imx6q-pcie-ep.yaml for details on the Endpoint mode device tree 25 - fsl,imx6q-pcie 26 - fsl,imx6sx-pcie [all …]
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H A D | fsl,imx6q-pcie-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lucas Stach <l.stach@pengutronix.de> 11 - Richard Zhu <hongxing.zhu@nxp.com> 15 thus inherits all the common properties defined in snps,dw-pcie-ep.yaml. 22 - fsl,imx8mm-pcie-ep 23 - fsl,imx8mq-pcie-ep 24 - fsl,imx8mp-pcie-ep [all …]
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/openbmc/linux/Documentation/devicetree/bindings/media/ |
H A D | nxp,imx8mq-mipi-csi2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/nxp,imx8mq-mipi-csi2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8MQ MIPI CSI-2 receiver 10 - Martin Kepplinger <martin.kepplinger@puri.sm> 12 description: |- 13 This binding covers the CSI-2 RX PHY and host controller included in the 20 - fsl,imx8mq-mipi-csi2 27 - description: core is the RX Controller Core Clock input. This clock [all …]
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/openbmc/linux/Documentation/devicetree/bindings/reset/ |
H A D | fsl,imx7-src.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/reset/fsl,imx7-src.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX7 System Reset Controller 10 - Andrey Smirnov <andrew.smirnov@gmail.com> 13 The system reset controller can be used to reset various set of 14 peripherals. Device nodes that need access to reset lines should 15 specify them as a reset phandle in their corresponding node as 16 specified in reset.txt. [all …]
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/openbmc/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8mq.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de> 7 #include <dt-bindings/clock/imx8mq-clock.h> 8 #include <dt-bindings/power/imx8mq-power.h> 9 #include <dt-bindings/reset/imx8mq-reset.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include "dt-bindings/input/input.h" 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/interconnect/imx8mq.h> [all …]
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H A D | imx8mq-nitrogen-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "imx8mq.dtsi" 11 compatible = "boundary,imx8mq-nitrogen8m-som", "fsl,imx8mq"; 14 stdout-path = &uart1; 17 reg_1p8v: regulator-fixed-1v8 { 18 compatible = "regulator-fixed"; 19 regulator-name = "1P8V"; 20 regulator-min-microvolt = <1800000>; 21 regulator-max-microvolt = <1800000>; 24 reg_snvs: regulator-fixed-snvs { [all …]
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H A D | imx8mq-tqma8mq-mba8mx.dts | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2019-2021 TQ-Systems GmbH 6 /dts-v1/; 8 #include "imx8mq-tqma8mq.dtsi" 12 model = "TQ-Systems GmbH i.MX8MQ TQMa8MQ on MBa8Mx"; 13 compatible = "tq,imx8mq-tqma8mq-mba8mx", "tq,imx8mq-tqma8mq", "fsl,imx8mq"; 23 extcon_usbotg: extcon-usbotg0 { 24 compatible = "linux,extcon-usb-gpio"; 25 pinctrl-names = "default"; 26 pinctrl-0 = <&pinctrl_usbcon0>; [all …]
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H A D | imx8mq-zii-ultra-rmb3.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 /dts-v1/; 8 #include "imx8mq-zii-ultra.dtsi" 12 compatible = "zii,imx8mq-ultra-rmb3", "zii,imx8mq-ultra", "fsl,imx8mq"; 15 compatible = "simple-audio-card"; 16 simple-audio-card,name = "front"; 17 simple-audio-card,format = "i2s"; 18 simple-audio-card,bitclock-master = <&sound1_codec>; 19 simple-audio-card,frame-master = <&sound1_codec>; 20 simple-audio-card,widgets = [all …]
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H A D | imx8mq-evk.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de> 7 /dts-v1/; 9 #include "imx8mq.dtsi" 13 compatible = "fsl,imx8mq-evk", "fsl,imx8mq"; 16 stdout-path = &uart1; 24 pcie0_refclk: pcie0-refclk { 25 compatible = "fixed-clock"; 26 #clock-cells = <0>; 27 clock-frequency = <100000000>; [all …]
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H A D | imx8mq-phanbell.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 * Copyright 2017-2019 NXP 6 /dts-v1/; 8 #include "imx8mq.dtsi" 9 #include <dt-bindings/interrupt-controller/irq.h> 13 compatible = "google,imx8mq-phanbell", "fsl,imx8mq"; 16 stdout-path = &uart1; 24 pmic_osc: clock-pmic { 25 compatible = "fixed-clock"; 26 #clock-cells = <0>; [all …]
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H A D | imx8mq-nitrogen.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/input/input.h> 9 #include "imx8mq.dtsi" 13 compatible = "boundary,imx8mq-nitrogen8m", "fsl,imx8mq"; 16 stdout-path = "serial0:115200n8"; 24 gpio-keys { 25 compatible = "gpio-keys"; 26 pinctrl-names = "default"; 27 pinctrl-0 = <&pinctrl_gpio_keys>; [all …]
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H A D | imx8mm.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mm-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/imx8mm-power.h> 11 #include <dt-bindings/reset/imx8mq-reset.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mm-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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H A D | imx8mn.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mn-clock.h> 7 #include <dt-bindings/power/imx8mn-power.h> 8 #include <dt-bindings/reset/imx8mq-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mn-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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H A D | imx8mq-mnt-reform2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * Copyright 2019-2021 MNT Research GmbH 8 /dts-v1/; 10 #include "imx8mq-nitrogen-som.dtsi" 14 compatible = "mntre,reform2", "boundary,imx8mq-nitrogen8m-som", "fsl,imx8mq"; 15 chassis-type = "laptop"; 18 compatible = "pwm-backlight"; 19 pinctrl-names = "default"; 20 pinctrl-0 = <&pinctrl_backlight>; 22 power-supply = <®_main_usb>; [all …]
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H A D | imx8mq-hummingboard-pulse.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 * Copyright (C) 2018 Jon Nettleton <jon@solid-run.com> 6 /dts-v1/; 8 #include "dt-bindings/usb/pd.h" 9 #include "imx8mq-sr-som.dtsi" 13 compatible = "solidrun,hummingboard-pulse", "fsl,imx8mq"; 16 stdout-path = &uart1; 19 reg_usdhc2_vmmc: regulator-usdhc2-vmmc { 20 compatible = "regulator-fixed"; 21 pinctrl-names = "default"; [all …]
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H A D | imx8mq-thor96.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 7 /dts-v1/; 9 #include "imx8mq.dtsi" 13 compatible = "einfochips,imx8mq-thor96", "fsl,imx8mq"; 16 stdout-path = &uart1; 25 compatible = "gpio-leds"; 26 pinctrl-names = "default"; 27 pinctrl-0 = <&pinctrl_leds>; 29 user-led1 { 32 linux,default-trigger = "heartbeat"; [all …]
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H A D | imx8mq-tqma8mq.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2019-2021 TQ-Systems GmbH 6 #include "imx8mq.dtsi" 9 model = "TQ-Systems GmbH i.MX8MQ TQMa8MQ"; 10 compatible = "tq,imx8mq-tqma8mq", "fsl,imx8mq"; 18 /* e-MMC IO, needed for HS modes */ 19 reg_vcc1v8: regulator-vcc1v8 { 20 compatible = "regulator-fixed"; 21 regulator-name = "TQMA8MX_VCC1V8"; 22 regulator-min-microvolt = <1800000>; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/display/bridge/ |
H A D | nwl-dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Northwest Logic MIPI-DSI controller on i.MX SoCs 10 - Guido Gúnther <agx@sigxcpu.org> 11 - Robert Chiras <robert.chiras@nxp.com> 14 NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for 15 the SOCs NWL MIPI-DSI host controller. 18 - $ref: ../dsi-controller.yaml# [all …]
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/openbmc/linux/drivers/pci/controller/dwc/ |
H A D | pci-imx6.c | 1 // SPDX-License-Identifier: GPL-2.0 17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h> 18 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h> 31 #include <linux/reset.h> 36 #include "pcie-designware.h" 45 #define to_imx6_pcie(x) dev_get_drvdata((x)->dev) 52 IMX8MQ, enumerator 109 /* PCIe Port Logic registers (memory-mapped) */ 122 /* PHY registers (not memory-mapped) */ 159 WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ && in imx6_pcie_grp_offset() [all …]
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/openbmc/linux/Documentation/devicetree/bindings/watchdog/ |
H A D | fsl-imx-wdt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/watchdog/fsl-imx-wdt.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Anson Huang <Anson.Huang@nxp.com> 15 - const: fsl,imx21-wdt 16 - items: 17 - enum: 18 - fsl,imx25-wdt 19 - fsl,imx27-wdt [all …]
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/openbmc/linux/Documentation/devicetree/bindings/power/ |
H A D | fsl,imx-gpcv2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/power/fsl,imx-gpcv2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andrey Smirnov <andrew.smirnov@gmail.com> 18 Documentation/devicetree/bindings/power/power-domain.yaml, which are 21 IP cores belonging to a power domain should contain a 'power-domains' 27 - fsl,imx7d-gpc 28 - fsl,imx8mn-gpc 29 - fsl,imx8mq-gpc [all …]
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/openbmc/linux/Documentation/devicetree/bindings/net/ |
H A D | fsl,fec.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shawn Guo <shawnguo@kernel.org> 11 - Wei Fang <wei.fang@nxp.com> 12 - NXP Linux Team <linux-imx@nxp.com> 15 - $ref: ethernet-controller.yaml# 20 - enum: 21 - fsl,imx25-fec 22 - fsl,imx27-fec [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | fsl-imx8mq-evk.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 6 /dts-v1/; 11 #include "fsl-imx8mq.dtsi" 15 compatible = "fsl,imx8mq-evk", "fsl,imx8mq"; 22 compatible = "simple-bus"; 23 #address-cells = <1>; 24 #size-cells = <0>; 27 compatible = "regulator-fixed"; 28 regulator-name = "VSD_3V3"; 29 regulator-min-microvolt = <3300000>; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/phy/ |
H A D | fsl,imx8-pcie-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/fsl,imx8-pcie-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Richard Zhu <hongxing.zhu@nxp.com> 13 "#phy-cells": 18 - fsl,imx8mm-pcie-phy 19 - fsl,imx8mp-pcie-phy 27 clock-names: 29 - const: ref [all …]
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