16885e66bSGuido Günther# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 26885e66bSGuido Günther%YAML 1.2 36885e66bSGuido Günther--- 46885e66bSGuido Günther$id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml# 56885e66bSGuido Günther$schema: http://devicetree.org/meta-schemas/core.yaml# 66885e66bSGuido Günther 76885e66bSGuido Günthertitle: Northwest Logic MIPI-DSI controller on i.MX SoCs 86885e66bSGuido Günther 96885e66bSGuido Günthermaintainers: 106885e66bSGuido Günther - Guido Gúnther <agx@sigxcpu.org> 116885e66bSGuido Günther - Robert Chiras <robert.chiras@nxp.com> 126885e66bSGuido Günther 136885e66bSGuido Güntherdescription: | 146885e66bSGuido Günther NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for 156885e66bSGuido Günther the SOCs NWL MIPI-DSI host controller. 166885e66bSGuido Günther 1724d59795SRob HerringallOf: 1824d59795SRob Herring - $ref: ../dsi-controller.yaml# 1924d59795SRob Herring 206885e66bSGuido Güntherproperties: 216885e66bSGuido Günther compatible: 226885e66bSGuido Günther const: fsl,imx8mq-nwl-dsi 236885e66bSGuido Günther 246885e66bSGuido Günther reg: 256885e66bSGuido Günther maxItems: 1 266885e66bSGuido Günther 276885e66bSGuido Günther interrupts: 286885e66bSGuido Günther maxItems: 1 296885e66bSGuido Günther 306885e66bSGuido Günther '#address-cells': 316885e66bSGuido Günther const: 1 326885e66bSGuido Günther 336885e66bSGuido Günther '#size-cells': 346885e66bSGuido Günther const: 0 356885e66bSGuido Günther 3633f9e507SKrzysztof Kozlowski assigned-clock-parents: true 3733f9e507SKrzysztof Kozlowski assigned-clock-rates: true 3833f9e507SKrzysztof Kozlowski assigned-clocks: true 3933f9e507SKrzysztof Kozlowski 406885e66bSGuido Günther clocks: 416885e66bSGuido Günther items: 426885e66bSGuido Günther - description: DSI core clock 436885e66bSGuido Günther - description: RX_ESC clock (used in escape mode) 446885e66bSGuido Günther - description: TX_ESC clock (used in escape mode) 456885e66bSGuido Günther - description: PHY_REF clock 466885e66bSGuido Günther - description: LCDIF clock 476885e66bSGuido Günther 486885e66bSGuido Günther clock-names: 496885e66bSGuido Günther items: 506885e66bSGuido Günther - const: core 516885e66bSGuido Günther - const: rx_esc 526885e66bSGuido Günther - const: tx_esc 536885e66bSGuido Günther - const: phy_ref 546885e66bSGuido Günther - const: lcdif 556885e66bSGuido Günther 566885e66bSGuido Günther mux-controls: 576885e66bSGuido Günther description: 586885e66bSGuido Günther mux controller node to use for operating the input mux 596885e66bSGuido Günther 606885e66bSGuido Günther phys: 616885e66bSGuido Günther maxItems: 1 626885e66bSGuido Günther description: 636885e66bSGuido Günther A phandle to the phy module representing the DPHY 646885e66bSGuido Günther 656885e66bSGuido Günther phy-names: 666885e66bSGuido Günther items: 676885e66bSGuido Günther - const: dphy 686885e66bSGuido Günther 696885e66bSGuido Günther power-domains: 706885e66bSGuido Günther maxItems: 1 716885e66bSGuido Günther 726885e66bSGuido Günther resets: 736885e66bSGuido Günther items: 746885e66bSGuido Günther - description: dsi byte reset line 756885e66bSGuido Günther - description: dsi dpi reset line 766885e66bSGuido Günther - description: dsi esc reset line 776885e66bSGuido Günther - description: dsi pclk reset line 786885e66bSGuido Günther 796885e66bSGuido Günther reset-names: 806885e66bSGuido Günther items: 816885e66bSGuido Günther - const: byte 826885e66bSGuido Günther - const: dpi 836885e66bSGuido Günther - const: esc 846885e66bSGuido Günther - const: pclk 856885e66bSGuido Günther 866885e66bSGuido Günther ports: 87*b6755423SRob Herring $ref: /schemas/graph.yaml#/properties/ports 88*b6755423SRob Herring 896885e66bSGuido Günther properties: 906885e66bSGuido Günther port@0: 91*b6755423SRob Herring $ref: /schemas/graph.yaml#/$defs/port-base 926885e66bSGuido Günther description: 936885e66bSGuido Günther Input port node to receive pixel data from the 946885e66bSGuido Günther display controller. Exactly one endpoint must be 956885e66bSGuido Günther specified. 966885e66bSGuido Günther properties: 976885e66bSGuido Günther endpoint@0: 98*b6755423SRob Herring $ref: /schemas/graph.yaml#/properties/endpoint 996885e66bSGuido Günther description: sub-node describing the input from LCDIF 1006885e66bSGuido Günther 1016885e66bSGuido Günther endpoint@1: 102*b6755423SRob Herring $ref: /schemas/graph.yaml#/properties/endpoint 1036885e66bSGuido Günther description: sub-node describing the input from DCSS 1046885e66bSGuido Günther 1056885e66bSGuido Günther oneOf: 1066885e66bSGuido Günther - required: 1076885e66bSGuido Günther - endpoint@0 1086885e66bSGuido Günther - required: 1096885e66bSGuido Günther - endpoint@1 1106885e66bSGuido Günther 111*b6755423SRob Herring unevaluatedProperties: false 1126885e66bSGuido Günther 1136885e66bSGuido Günther port@1: 114*b6755423SRob Herring $ref: /schemas/graph.yaml#/properties/port 1156885e66bSGuido Günther description: 1166885e66bSGuido Günther DSI output port node to the panel or the next bridge 1176885e66bSGuido Günther in the chain 1186885e66bSGuido Günther 1196885e66bSGuido Günther required: 1206885e66bSGuido Günther - port@0 1216885e66bSGuido Günther - port@1 1226885e66bSGuido Günther 1236885e66bSGuido Güntherrequired: 1246885e66bSGuido Günther - '#address-cells' 1256885e66bSGuido Günther - '#size-cells' 1266885e66bSGuido Günther - clock-names 1276885e66bSGuido Günther - clocks 1286885e66bSGuido Günther - compatible 1296885e66bSGuido Günther - interrupts 1306885e66bSGuido Günther - mux-controls 1316885e66bSGuido Günther - phy-names 1326885e66bSGuido Günther - phys 1336885e66bSGuido Günther - ports 1346885e66bSGuido Günther - reg 1356885e66bSGuido Günther - reset-names 1366885e66bSGuido Günther - resets 1376885e66bSGuido Günther 13824d59795SRob HerringunevaluatedProperties: false 1396885e66bSGuido Günther 1406885e66bSGuido Güntherexamples: 1416885e66bSGuido Günther - | 1426885e66bSGuido Günther #include <dt-bindings/clock/imx8mq-clock.h> 143724884c3SOndrej Jirman #include <dt-bindings/gpio/gpio.h> 1446885e66bSGuido Günther #include <dt-bindings/interrupt-controller/arm-gic.h> 1456885e66bSGuido Günther #include <dt-bindings/reset/imx8mq-reset.h> 1466885e66bSGuido Günther 14724d59795SRob Herring dsi@30a00000 { 1486885e66bSGuido Günther #address-cells = <1>; 1496885e66bSGuido Günther #size-cells = <0>; 1506885e66bSGuido Günther compatible = "fsl,imx8mq-nwl-dsi"; 1516885e66bSGuido Günther reg = <0x30A00000 0x300>; 1526885e66bSGuido Günther clocks = <&clk IMX8MQ_CLK_DSI_CORE>, 1536885e66bSGuido Günther <&clk IMX8MQ_CLK_DSI_AHB>, 1546885e66bSGuido Günther <&clk IMX8MQ_CLK_DSI_IPG_DIV>, 1556885e66bSGuido Günther <&clk IMX8MQ_CLK_DSI_PHY_REF>, 1566885e66bSGuido Günther <&clk IMX8MQ_CLK_LCDIF_PIXEL>; 1576885e66bSGuido Günther clock-names = "core", "rx_esc", "tx_esc", "phy_ref", "lcdif"; 1586885e66bSGuido Günther interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 1596885e66bSGuido Günther mux-controls = <&mux 0>; 1606885e66bSGuido Günther power-domains = <&pgc_mipi>; 1616885e66bSGuido Günther resets = <&src IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N>, 1626885e66bSGuido Günther <&src IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N>, 1636885e66bSGuido Günther <&src IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N>, 1646885e66bSGuido Günther <&src IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N>; 1656885e66bSGuido Günther reset-names = "byte", "dpi", "esc", "pclk"; 1666885e66bSGuido Günther phys = <&dphy>; 1676885e66bSGuido Günther phy-names = "dphy"; 1686885e66bSGuido Günther 1696885e66bSGuido Günther panel@0 { 1706885e66bSGuido Günther compatible = "rocktech,jh057n00900"; 1716885e66bSGuido Günther reg = <0>; 172724884c3SOndrej Jirman vcc-supply = <®_2v8_p>; 173724884c3SOndrej Jirman iovcc-supply = <®_1v8_p>; 174724884c3SOndrej Jirman reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>; 175724884c3SOndrej Jirman port { 1766885e66bSGuido Günther panel_in: endpoint { 1776885e66bSGuido Günther remote-endpoint = <&mipi_dsi_out>; 1786885e66bSGuido Günther }; 1796885e66bSGuido Günther }; 1806885e66bSGuido Günther }; 1816885e66bSGuido Günther 1826885e66bSGuido Günther ports { 1836885e66bSGuido Günther #address-cells = <1>; 1846885e66bSGuido Günther #size-cells = <0>; 1856885e66bSGuido Günther 1866885e66bSGuido Günther port@0 { 1876885e66bSGuido Günther #size-cells = <0>; 1886885e66bSGuido Günther #address-cells = <1>; 1896885e66bSGuido Günther reg = <0>; 1906885e66bSGuido Günther mipi_dsi_in: endpoint@0 { 1916885e66bSGuido Günther reg = <0>; 1926885e66bSGuido Günther remote-endpoint = <&lcdif_mipi_dsi>; 1936885e66bSGuido Günther }; 1946885e66bSGuido Günther }; 1956885e66bSGuido Günther port@1 { 1966885e66bSGuido Günther reg = <1>; 1976885e66bSGuido Günther mipi_dsi_out: endpoint { 1986885e66bSGuido Günther remote-endpoint = <&panel_in>; 1996885e66bSGuido Günther }; 2006885e66bSGuido Günther }; 2016885e66bSGuido Günther }; 2026885e66bSGuido Günther }; 203