1751ca492SRichard Zhu# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2751ca492SRichard Zhu%YAML 1.2 3751ca492SRichard Zhu--- 4751ca492SRichard Zhu$id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie.yaml# 5751ca492SRichard Zhu$schema: http://devicetree.org/meta-schemas/core.yaml# 6751ca492SRichard Zhu 7751ca492SRichard Zhutitle: Freescale i.MX6 PCIe host controller 8751ca492SRichard Zhu 9751ca492SRichard Zhumaintainers: 10751ca492SRichard Zhu - Lucas Stach <l.stach@pengutronix.de> 11751ca492SRichard Zhu - Richard Zhu <hongxing.zhu@nxp.com> 12751ca492SRichard Zhu 13751ca492SRichard Zhudescription: |+ 14751ca492SRichard Zhu This PCIe host controller is based on the Synopsys DesignWare PCIe IP 15751ca492SRichard Zhu and thus inherits all the common properties defined in snps,dw-pcie.yaml. 16b10f8238SRichard Zhu The controller instances are dual mode where in they can work either in 17b10f8238SRichard Zhu Root Port mode or Endpoint mode but one at a time. 18b10f8238SRichard Zhu 19b10f8238SRichard Zhu See fsl,imx6q-pcie-ep.yaml for details on the Endpoint mode device tree 20b10f8238SRichard Zhu bindings. 21751ca492SRichard Zhu 22751ca492SRichard Zhuproperties: 23751ca492SRichard Zhu compatible: 24751ca492SRichard Zhu enum: 25751ca492SRichard Zhu - fsl,imx6q-pcie 26751ca492SRichard Zhu - fsl,imx6sx-pcie 27751ca492SRichard Zhu - fsl,imx6qp-pcie 28751ca492SRichard Zhu - fsl,imx7d-pcie 29751ca492SRichard Zhu - fsl,imx8mq-pcie 3021d5929fSRichard Zhu - fsl,imx8mm-pcie 319be01ee2SRichard Zhu - fsl,imx8mp-pcie 32751ca492SRichard Zhu 33751ca492SRichard Zhu reg: 34751ca492SRichard Zhu items: 35751ca492SRichard Zhu - description: Data Bus Interface (DBI) registers. 36751ca492SRichard Zhu - description: PCIe configuration space region. 37751ca492SRichard Zhu 38751ca492SRichard Zhu reg-names: 39751ca492SRichard Zhu items: 40751ca492SRichard Zhu - const: dbi 41751ca492SRichard Zhu - const: config 42751ca492SRichard Zhu 43*8bbec86cSKrzysztof Kozlowski clocks: 44*8bbec86cSKrzysztof Kozlowski minItems: 3 45*8bbec86cSKrzysztof Kozlowski items: 46*8bbec86cSKrzysztof Kozlowski - description: PCIe bridge clock. 47*8bbec86cSKrzysztof Kozlowski - description: PCIe bus clock. 48*8bbec86cSKrzysztof Kozlowski - description: PCIe PHY clock. 49*8bbec86cSKrzysztof Kozlowski - description: Additional required clock entry for imx6sx-pcie, 50*8bbec86cSKrzysztof Kozlowski imx6sx-pcie-ep, imx8mq-pcie, imx8mq-pcie-ep. 51*8bbec86cSKrzysztof Kozlowski 52*8bbec86cSKrzysztof Kozlowski clock-names: 53*8bbec86cSKrzysztof Kozlowski minItems: 3 54*8bbec86cSKrzysztof Kozlowski maxItems: 4 55*8bbec86cSKrzysztof Kozlowski 56751ca492SRichard Zhu interrupts: 57751ca492SRichard Zhu items: 58751ca492SRichard Zhu - description: builtin MSI controller. 59751ca492SRichard Zhu 60751ca492SRichard Zhu interrupt-names: 61751ca492SRichard Zhu items: 62751ca492SRichard Zhu - const: msi 63751ca492SRichard Zhu 64751ca492SRichard Zhu reset-gpio: 65751ca492SRichard Zhu description: Should specify the GPIO for controlling the PCI bus device 66751ca492SRichard Zhu reset signal. It's not polarity aware and defaults to active-low reset 67751ca492SRichard Zhu sequence (L=reset state, H=operation state) (optional required). 68751ca492SRichard Zhu 69751ca492SRichard Zhu reset-gpio-active-high: 70751ca492SRichard Zhu description: If present then the reset sequence using the GPIO 71751ca492SRichard Zhu specified in the "reset-gpio" property is reversed (H=reset state, 72751ca492SRichard Zhu L=operation state) (optional required). 73fba48662SRob Herring type: boolean 74751ca492SRichard Zhu 75751ca492SRichard Zhurequired: 76751ca492SRichard Zhu - compatible 77751ca492SRichard Zhu - reg 78751ca492SRichard Zhu - reg-names 79751ca492SRichard Zhu - "#address-cells" 80751ca492SRichard Zhu - "#size-cells" 81751ca492SRichard Zhu - device_type 82751ca492SRichard Zhu - bus-range 83751ca492SRichard Zhu - ranges 84751ca492SRichard Zhu - interrupts 85751ca492SRichard Zhu - interrupt-names 86751ca492SRichard Zhu - "#interrupt-cells" 87751ca492SRichard Zhu - interrupt-map-mask 88751ca492SRichard Zhu - interrupt-map 89751ca492SRichard Zhu 90b8a83e60SSerge SeminallOf: 91b8a83e60SSerge Semin - $ref: /schemas/pci/snps,dw-pcie.yaml# 92b10f8238SRichard Zhu - $ref: /schemas/pci/fsl,imx6q-pcie-common.yaml# 93*8bbec86cSKrzysztof Kozlowski - if: 94*8bbec86cSKrzysztof Kozlowski properties: 95*8bbec86cSKrzysztof Kozlowski compatible: 96*8bbec86cSKrzysztof Kozlowski enum: 97*8bbec86cSKrzysztof Kozlowski - fsl,imx6sx-pcie 98*8bbec86cSKrzysztof Kozlowski then: 99*8bbec86cSKrzysztof Kozlowski properties: 100*8bbec86cSKrzysztof Kozlowski clocks: 101*8bbec86cSKrzysztof Kozlowski minItems: 4 102*8bbec86cSKrzysztof Kozlowski clock-names: 103*8bbec86cSKrzysztof Kozlowski items: 104*8bbec86cSKrzysztof Kozlowski - const: pcie 105*8bbec86cSKrzysztof Kozlowski - const: pcie_bus 106*8bbec86cSKrzysztof Kozlowski - const: pcie_phy 107*8bbec86cSKrzysztof Kozlowski - const: pcie_inbound_axi 108*8bbec86cSKrzysztof Kozlowski 109*8bbec86cSKrzysztof Kozlowski - if: 110*8bbec86cSKrzysztof Kozlowski properties: 111*8bbec86cSKrzysztof Kozlowski compatible: 112*8bbec86cSKrzysztof Kozlowski enum: 113*8bbec86cSKrzysztof Kozlowski - fsl,imx8mq-pcie 114*8bbec86cSKrzysztof Kozlowski then: 115*8bbec86cSKrzysztof Kozlowski properties: 116*8bbec86cSKrzysztof Kozlowski clocks: 117*8bbec86cSKrzysztof Kozlowski minItems: 4 118*8bbec86cSKrzysztof Kozlowski clock-names: 119*8bbec86cSKrzysztof Kozlowski items: 120*8bbec86cSKrzysztof Kozlowski - const: pcie 121*8bbec86cSKrzysztof Kozlowski - const: pcie_bus 122*8bbec86cSKrzysztof Kozlowski - const: pcie_phy 123*8bbec86cSKrzysztof Kozlowski - const: pcie_aux 124*8bbec86cSKrzysztof Kozlowski 125*8bbec86cSKrzysztof Kozlowski - if: 126*8bbec86cSKrzysztof Kozlowski properties: 127*8bbec86cSKrzysztof Kozlowski compatible: 128*8bbec86cSKrzysztof Kozlowski enum: 129*8bbec86cSKrzysztof Kozlowski - fsl,imx6q-pcie 130*8bbec86cSKrzysztof Kozlowski - fsl,imx6qp-pcie 131*8bbec86cSKrzysztof Kozlowski - fsl,imx7d-pcie 132*8bbec86cSKrzysztof Kozlowski then: 133*8bbec86cSKrzysztof Kozlowski properties: 134*8bbec86cSKrzysztof Kozlowski clocks: 135*8bbec86cSKrzysztof Kozlowski maxItems: 3 136*8bbec86cSKrzysztof Kozlowski clock-names: 137*8bbec86cSKrzysztof Kozlowski items: 138*8bbec86cSKrzysztof Kozlowski - const: pcie 139*8bbec86cSKrzysztof Kozlowski - const: pcie_bus 140*8bbec86cSKrzysztof Kozlowski - const: pcie_phy 141*8bbec86cSKrzysztof Kozlowski 142*8bbec86cSKrzysztof Kozlowski - if: 143*8bbec86cSKrzysztof Kozlowski properties: 144*8bbec86cSKrzysztof Kozlowski compatible: 145*8bbec86cSKrzysztof Kozlowski enum: 146*8bbec86cSKrzysztof Kozlowski - fsl,imx8mm-pcie 147*8bbec86cSKrzysztof Kozlowski - fsl,imx8mp-pcie 148*8bbec86cSKrzysztof Kozlowski then: 149*8bbec86cSKrzysztof Kozlowski properties: 150*8bbec86cSKrzysztof Kozlowski clocks: 151*8bbec86cSKrzysztof Kozlowski maxItems: 3 152*8bbec86cSKrzysztof Kozlowski clock-names: 153*8bbec86cSKrzysztof Kozlowski items: 154*8bbec86cSKrzysztof Kozlowski - const: pcie 155*8bbec86cSKrzysztof Kozlowski - const: pcie_bus 156*8bbec86cSKrzysztof Kozlowski - const: pcie_aux 1571a2cead1SMarek Vasut 158751ca492SRichard ZhuunevaluatedProperties: false 159751ca492SRichard Zhu 160751ca492SRichard Zhuexamples: 161751ca492SRichard Zhu - | 162751ca492SRichard Zhu #include <dt-bindings/clock/imx6qdl-clock.h> 163751ca492SRichard Zhu #include <dt-bindings/interrupt-controller/arm-gic.h> 164751ca492SRichard Zhu 165751ca492SRichard Zhu pcie: pcie@1ffc000 { 166751ca492SRichard Zhu compatible = "fsl,imx6q-pcie"; 167751ca492SRichard Zhu reg = <0x01ffc000 0x04000>, 168751ca492SRichard Zhu <0x01f00000 0x80000>; 169751ca492SRichard Zhu reg-names = "dbi", "config"; 170751ca492SRichard Zhu #address-cells = <3>; 171751ca492SRichard Zhu #size-cells = <2>; 172751ca492SRichard Zhu device_type = "pci"; 173751ca492SRichard Zhu bus-range = <0x00 0xff>; 174751ca492SRichard Zhu ranges = <0x81000000 0 0 0x01f80000 0 0x00010000>, 175751ca492SRichard Zhu <0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; 176751ca492SRichard Zhu num-lanes = <1>; 177751ca492SRichard Zhu interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 178751ca492SRichard Zhu interrupt-names = "msi"; 179751ca492SRichard Zhu #interrupt-cells = <1>; 180751ca492SRichard Zhu interrupt-map-mask = <0 0 0 0x7>; 181751ca492SRichard Zhu interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 182751ca492SRichard Zhu <0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 183751ca492SRichard Zhu <0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 184751ca492SRichard Zhu <0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 185751ca492SRichard Zhu clocks = <&clks IMX6QDL_CLK_PCIE_AXI>, 186751ca492SRichard Zhu <&clks IMX6QDL_CLK_LVDS1_GATE>, 187751ca492SRichard Zhu <&clks IMX6QDL_CLK_PCIE_REF_125M>; 188751ca492SRichard Zhu clock-names = "pcie", "pcie_bus", "pcie_phy"; 189751ca492SRichard Zhu }; 190751ca492SRichard Zhu... 191