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/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dfsl,imx-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX Co-Processor
10 This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs.
13 - Peng Fan <peng.fan@nxp.com>
18 - fsl,imx6sx-cm4
19 - fsl,imx7d-cm4
20 - fsl,imx7ulp-cm4
[all …]
/openbmc/linux/drivers/phy/freescale/
H A Dphy-fsl-imx8m-pcie.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
20 #include <dt-bindings/phy/phy-imx8-pcie.h>
50 IMX8MM, enumerator
79 pad_mode = imx8_phy->refclk_pad_mode; in imx8_pcie_phy_power_on()
80 switch (imx8_phy->drvdata->variant) { in imx8_pcie_phy_power_on()
81 case IMX8MM: in imx8_pcie_phy_power_on()
82 reset_control_assert(imx8_phy->reset); in imx8_pcie_phy_power_on()
84 /* Tune PHY de-emphasis setting to pass PCIe compliance. */ in imx8_pcie_phy_power_on()
85 if (imx8_phy->tx_deemph_gen1) in imx8_pcie_phy_power_on()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dfsl,imx8m-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/fsl,imx8m-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peng Fan <peng.fan@nxp.com>
13 Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
19 - fsl,imx8mm-iomuxc
20 - fsl,imx8mn-iomuxc
21 - fsl,imx8mp-iomuxc
22 - fsl,imx8mq-iomuxc
[all …]
/openbmc/linux/drivers/pci/controller/dwc/
H A Dpci-imx6.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
18 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
36 #include "pcie-designware.h"
45 #define to_imx6_pcie(x) dev_get_drvdata((x)->dev)
53 IMX8MM, enumerator
109 /* PCIe Port Logic registers (memory-mapped) */
122 /* PHY registers (not memory-mapped) */
159 WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ && in imx6_pcie_grp_offset()
160 imx6_pcie->drvdata->variant != IMX8MQ_EP && in imx6_pcie_grp_offset()
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mm.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mm-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/imx8mm-power.h>
11 #include <dt-bindings/reset/imx8mq-reset.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mm-pinfunc.h"
17 interrupt-parent = <&gic>;
[all …]
H A Dimx8mm-ddr4-evk.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
8 #include "imx8mm-evk.dtsi"
12 compatible = "fsl,imx8mm-ddr4-evk", "fsl,imx8mm";
15 pinctrl-0 = <&pinctrl_gpio_led_2>;
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_gpmi_nand>;
26 nand-on-flash-bbt;
30 &iomuxc {
H A Dimx8mm-icore-mx8mm-ctouch2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "imx8mm.dtsi"
10 #include "imx8mm-icore-mx8mm.dtsi"
14 compatible = "engicam,icore-mx8mm-ctouch2", "engicam,icore-mx8mm",
15 "fsl,imx8mm";
18 stdout-path = &uart2;
27 clock-frequency = <400000>;
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_i2c2>;
[all …]
H A Dimx8mm-icore-mx8mm-edimm2.2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "imx8mm.dtsi"
10 #include "imx8mm-icore-mx8mm.dtsi"
14 compatible = "engicam,icore-mx8mm-edimm2.2", "engicam,icore-mx8mm",
15 "fsl,imx8mm";
18 stdout-path = &uart2;
27 clock-frequency = <400000>;
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_i2c2>;
[all …]
H A Dimx8mm-beacon-kit.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
8 #include "imx8mm.dtsi"
9 #include "imx8mm-beacon-som.dtsi"
10 #include "imx8mm-beacon-baseboard.dtsi"
14 compatible = "beacon,imx8mm-beacon-kit", "fsl,imx8mm";
17 stdout-path = &uart2;
21 compatible = "hdmi-connector";
26 remote-endpoint = <&adv7535_out>;
31 reg_hdmi: regulator-hdmi-dvdd {
[all …]
H A Dimx8mm-venice-gw73xx-0x-imx219.dtso1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
8 #include "imx8mm-pinfunc.h"
10 /dts-v1/;
14 compatible = "gw,imx8mm-gw73xx-0x", "fsl,imx8mm";
16 reg_cam: regulator-cam {
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_reg_cam>;
19 compatible = "regulator-fixed";
20 regulator-name = "reg_cam";
[all …]
H A Dimx8mm-venice-gw72xx-0x-imx219.dtso1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
8 #include "imx8mm-pinfunc.h"
10 /dts-v1/;
14 compatible = "gw,imx8mm-gw72xx-0x", "fsl,imx8mm";
16 reg_cam: regulator-cam {
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_reg_cam>;
19 compatible = "regulator-fixed";
20 regulator-name = "reg_cam";
[all …]
H A Dimx8mm-venice-gw73xx-0x-rs232-rts.dtso1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * - GPIO4_0 rs485_en needs to be driven low (in-active)
7 * - UART4_TX becomes RTS
8 * - UART4_RX becomes CTS
11 #include <dt-bindings/gpio/gpio.h>
13 #include "imx8mm-pinfunc.h"
15 /dts-v1/;
19 compatible = "gw,imx8mm-gw73xx-0x";
24 gpio-hog;
26 output-low;
[all …]
H A Dimx8mm-venice-gw72xx-0x-rs232-rts.dtso1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * - GPIO4_0 rs485_en needs to be driven low (in-active)
7 * - UART4_TX becomes RTS
8 * - UART4_RX becomes CTS
11 #include <dt-bindings/gpio/gpio.h>
13 #include "imx8mm-pinfunc.h"
15 /dts-v1/;
19 compatible = "gw,imx8mm-gw72xx-0x";
24 gpio-hog;
26 output-low;
[all …]
H A Dimx8mm-venice-gw72xx-0x-rs422.dtso1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * - GPIO1_0 rs485_term selects on-chip termination
7 * - GPIO4_0 rs485_en needs to be driven high (active)
8 * - GPIO4_2 rs485_hd needs to be driven low (in-active)
9 * - UART4_TX is DE for RS485 transmitter
10 * - RS485_EN needs to be pulled high
11 * - RS485_HALF needs to be low
14 #include <dt-bindings/gpio/gpio.h>
16 #include "imx8mm-pinfunc.h"
18 /dts-v1/;
[all …]
H A Dimx8mm-venice-gw73xx-0x-rs422.dtso1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * - GPIO1_0 rs485_term selects on-chip termination
7 * - GPIO4_0 rs485_en needs to be driven high (active)
8 * - GPIO4_2 rs485_hd needs to be driven low (in-active)
9 * - UART4_TX is DE for RS485 transmitter
10 * - RS485_EN needs to be pulled high
11 * - RS485_HALF needs to be low
14 #include <dt-bindings/gpio/gpio.h>
16 #include "imx8mm-pinfunc.h"
18 /dts-v1/;
[all …]
H A Dimx8mm-venice-gw72xx-0x-rs485.dtso1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * - GPIO1_0 rs485_term selects on-chip termination
7 * - GPIO4_0 rs485_en needs to be driven high (active)
8 * - GPIO4_2 rs485_hd needs to be driven high (active)
9 * - UART4_TX is DE for RS485 transmitter
10 * - RS485_EN needs to be pulled high
11 * - RS485_HALF needs to be pulled high
14 #include <dt-bindings/gpio/gpio.h>
16 #include "imx8mm-pinfunc.h"
18 /dts-v1/;
[all …]
H A Dimx8mm-venice-gw73xx-0x-rs485.dtso1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * - GPIO1_0 rs485_term selects on-chip termination
7 * - GPIO4_0 rs485_en needs to be driven high (active)
8 * - GPIO4_2 rs485_hd needs to be driven high (active)
9 * - UART4_TX is DE for RS485 transmitter
10 * - RS485_EN needs to be pulled high
11 * - RS485_HALF needs to be pulled high
14 #include <dt-bindings/gpio/gpio.h>
16 #include "imx8mm-pinfunc.h"
18 /dts-v1/;
[all …]
H A Dimx8mm-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2019-2020 NXP
6 /dts-v1/;
8 #include <dt-bindings/usb/pd.h>
9 #include "imx8mm-evk.dtsi"
13 compatible = "fsl,imx8mm-evk", "fsl,imx8mm";
21 operating-points-v2 = <&ddrc_opp_table>;
23 ddrc_opp_table: opp-table {
24 compatible = "operating-points-v2";
26 opp-25000000 {
[all …]
H A Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/power/imx8mn-power.h>
8 #include <dt-bindings/reset/imx8mq-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mn-pinfunc.h"
17 interrupt-parent = <&gic>;
[all …]
H A Dimx8mm-innocomm-wb15-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "imx8mm-innocomm-wb15.dtsi"
12 model = "InnoComm WB15-EVK";
13 compatible = "innocomm,wb15-evk", "fsl,imx8mm";
16 stdout-path = &uart2;
20 compatible = "gpio-leds";
21 pinctrl-names = "default";
22 pinctrl-0 = <&pinctrl_gpio_leds>;
24 led-0 {
[all …]
H A Dimx8mm-phg.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "imx8mm-tqma8mqml.dtsi"
12 compatible = "cloos,imx8mm-phg", "tq,imx8mm-tqma8mqml", "fsl,imx8mm";
20 stdout-path = &uart2;
24 compatible = "gpio-beeper";
25 pinctrl-0 = <&pinctrl_beeper>;
30 compatible = "gpio-leds";
31 pinctrl-names = "default";
32 pinctrl-0 = <&pinctrl_gpio_led>;
[all …]
H A Dimx8mm-kontron-bl.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 /dts-v1/;
8 #include "imx8mm-kontron-sl.dtsi"
12 compatible = "kontron,imx8mm-bl", "kontron,imx8mm-sl", "fsl,imx8mm";
21 osc_can: clock-osc-can {
22 compatible = "fixed-clock";
23 #clock-cells = <0>;
24 clock-frequency = <16000000>;
25 clock-output-names = "osc-can";
29 compatible = "gpio-leds";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/soc/imx/
H A Dfsl,imx-iomuxc-gpr.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx-iomuxc-gpr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peng Fan <peng.fan@nxp.com>
13 i.MX Processors have an IOMUXC General Purpose Register group for
19 - items:
20 - const: fsl,imx8mq-iomuxc-gpr
21 - const: syscon
22 - const: simple-mfd
[all …]
/openbmc/u-boot/drivers/pinctrl/nxp/
H A Dpinctrl-imx8m.c1 // SPDX-License-Identifier: GPL-2.0+
9 #include "pinctrl-imx.h"
22 { .compatible = "fsl,imx8mq-iomuxc", .data = (ulong)&imx8mq_pinctrl_soc_info },
23 { .compatible = "fsl,imx8mm-iomuxc", .data = (ulong)&imx8mq_pinctrl_soc_info },
28 .name = "imx8mq-pinctrl",
/openbmc/linux/drivers/pinctrl/freescale/
H A Dpinctrl-imx8mm.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2017-2018 NXP
13 #include "pinctrl-imx.h"
323 .gpr_compatible = "fsl,imx8mm-iomuxc-gpr",
327 { .compatible = "fsl,imx8mm-iomuxc", .data = &imx8mm_pinctrl_info, },
339 .name = "imx8mm-pinctrl",

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