1*4c33cb31SAndrew Davis// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4c33cb31SAndrew Davis/*
3*4c33cb31SAndrew Davis * Copyright 2022 Gateworks Corporation
4*4c33cb31SAndrew Davis *
5*4c33cb31SAndrew Davis * GW73xx RS232 with RTS/CTS hardware flow control:
6*4c33cb31SAndrew Davis *  - GPIO4_0 rs485_en needs to be driven low (in-active)
7*4c33cb31SAndrew Davis *  - UART4_TX becomes RTS
8*4c33cb31SAndrew Davis *  - UART4_RX becomes CTS
9*4c33cb31SAndrew Davis */
10*4c33cb31SAndrew Davis
11*4c33cb31SAndrew Davis#include <dt-bindings/gpio/gpio.h>
12*4c33cb31SAndrew Davis
13*4c33cb31SAndrew Davis#include "imx8mm-pinfunc.h"
14*4c33cb31SAndrew Davis
15*4c33cb31SAndrew Davis/dts-v1/;
16*4c33cb31SAndrew Davis/plugin/;
17*4c33cb31SAndrew Davis
18*4c33cb31SAndrew Davis&{/} {
19*4c33cb31SAndrew Davis	compatible = "gw,imx8mm-gw73xx-0x";
20*4c33cb31SAndrew Davis};
21*4c33cb31SAndrew Davis
22*4c33cb31SAndrew Davis&gpio4 {
23*4c33cb31SAndrew Davis	rs485_en {
24*4c33cb31SAndrew Davis		gpio-hog;
25*4c33cb31SAndrew Davis		gpios = <0 GPIO_ACTIVE_HIGH>;
26*4c33cb31SAndrew Davis		output-low;
27*4c33cb31SAndrew Davis		line-name = "rs485_en";
28*4c33cb31SAndrew Davis	};
29*4c33cb31SAndrew Davis};
30*4c33cb31SAndrew Davis
31*4c33cb31SAndrew Davis&uart2 {
32*4c33cb31SAndrew Davis	pinctrl-names = "default";
33*4c33cb31SAndrew Davis	pinctrl-0 = <&pinctrl_uart2>;
34*4c33cb31SAndrew Davis	rts-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
35*4c33cb31SAndrew Davis	cts-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>;
36*4c33cb31SAndrew Davis	status = "okay";
37*4c33cb31SAndrew Davis};
38*4c33cb31SAndrew Davis
39*4c33cb31SAndrew Davis&uart4 {
40*4c33cb31SAndrew Davis	status = "disabled";
41*4c33cb31SAndrew Davis};
42*4c33cb31SAndrew Davis
43*4c33cb31SAndrew Davis&iomuxc {
44*4c33cb31SAndrew Davis	pinctrl_uart2: uart2grp {
45*4c33cb31SAndrew Davis		fsl,pins = <
46*4c33cb31SAndrew Davis			MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX     0x140
47*4c33cb31SAndrew Davis			MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX     0x140
48*4c33cb31SAndrew Davis			MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29	0x140
49*4c33cb31SAndrew Davis			MX8MM_IOMUXC_UART4_RXD_GPIO5_IO28	0x140
50*4c33cb31SAndrew Davis		>;
51*4c33cb31SAndrew Davis	};
52*4c33cb31SAndrew Davis};
53